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authorGeliang Tang <geliangtang@163.com>2015-10-18 11:29:48 -0400
committerAlex Deucher <alexander.deucher@amd.com>2015-10-21 11:35:11 -0400
commitd0be9f4ec1c4ad8a8b6be1efa5bc81e5bce957a3 (patch)
tree8b14d277bbdd84f817bdc57478fc6c5fdb7edaa4
parentf9fff064bb83c55b3fc6291e3b59e3bc78fedddf (diff)
drm: fix trivial typos
s/regsiter/register/ Signed-off-by: Geliang Tang <geliangtang@163.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/include/atombios.h2
-rw-r--r--drivers/gpu/drm/radeon/cayman_blit_shaders.c2
-rw-r--r--drivers/gpu/drm/radeon/evergreen_blit_shaders.c2
-rw-r--r--drivers/gpu/drm/radeon/r600_blit_shaders.c2
4 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/include/atombios.h b/drivers/gpu/drm/amd/include/atombios.h
index 44c5d4a4d1bf..552622675ace 100644
--- a/drivers/gpu/drm/amd/include/atombios.h
+++ b/drivers/gpu/drm/amd/include/atombios.h
@@ -6784,7 +6784,7 @@ typedef struct _ATOM_MC_INIT_PARAM_TABLE_V2_1
6784 ULONG ulMCUcodeRomStartAddr; 6784 ULONG ulMCUcodeRomStartAddr;
6785 ULONG ulMCUcodeLength; 6785 ULONG ulMCUcodeLength;
6786 USHORT usMcRegInitTableOffset; // offset of ATOM_REG_INIT_SETTING array for MC core register settings. 6786 USHORT usMcRegInitTableOffset; // offset of ATOM_REG_INIT_SETTING array for MC core register settings.
6787 USHORT usReserved; // offset of ATOM_INIT_REG_BLOCK for MC SEQ/PHY regsiter setting 6787 USHORT usReserved; // offset of ATOM_INIT_REG_BLOCK for MC SEQ/PHY register setting
6788}ATOM_MC_INIT_PARAM_TABLE_V2_1; 6788}ATOM_MC_INIT_PARAM_TABLE_V2_1;
6789 6789
6790 6790
diff --git a/drivers/gpu/drm/radeon/cayman_blit_shaders.c b/drivers/gpu/drm/radeon/cayman_blit_shaders.c
index 98d009e154bf..9fec4d09f383 100644
--- a/drivers/gpu/drm/radeon/cayman_blit_shaders.c
+++ b/drivers/gpu/drm/radeon/cayman_blit_shaders.c
@@ -32,7 +32,7 @@
32 * evergreen cards need to use the 3D engine to blit data which requires 32 * evergreen cards need to use the 3D engine to blit data which requires
33 * quite a bit of hw state setup. Rather than pull the whole 3D driver 33 * quite a bit of hw state setup. Rather than pull the whole 3D driver
34 * (which normally generates the 3D state) into the DRM, we opt to use 34 * (which normally generates the 3D state) into the DRM, we opt to use
35 * statically generated state tables. The regsiter state and shaders 35 * statically generated state tables. The register state and shaders
36 * were hand generated to support blitting functionality. See the 3D 36 * were hand generated to support blitting functionality. See the 3D
37 * driver or documentation for descriptions of the registers and 37 * driver or documentation for descriptions of the registers and
38 * shader instructions. 38 * shader instructions.
diff --git a/drivers/gpu/drm/radeon/evergreen_blit_shaders.c b/drivers/gpu/drm/radeon/evergreen_blit_shaders.c
index d43383470cdf..1a96ddb3e5ed 100644
--- a/drivers/gpu/drm/radeon/evergreen_blit_shaders.c
+++ b/drivers/gpu/drm/radeon/evergreen_blit_shaders.c
@@ -32,7 +32,7 @@
32 * evergreen cards need to use the 3D engine to blit data which requires 32 * evergreen cards need to use the 3D engine to blit data which requires
33 * quite a bit of hw state setup. Rather than pull the whole 3D driver 33 * quite a bit of hw state setup. Rather than pull the whole 3D driver
34 * (which normally generates the 3D state) into the DRM, we opt to use 34 * (which normally generates the 3D state) into the DRM, we opt to use
35 * statically generated state tables. The regsiter state and shaders 35 * statically generated state tables. The register state and shaders
36 * were hand generated to support blitting functionality. See the 3D 36 * were hand generated to support blitting functionality. See the 3D
37 * driver or documentation for descriptions of the registers and 37 * driver or documentation for descriptions of the registers and
38 * shader instructions. 38 * shader instructions.
diff --git a/drivers/gpu/drm/radeon/r600_blit_shaders.c b/drivers/gpu/drm/radeon/r600_blit_shaders.c
index 34c8b2340f33..443cbe59b274 100644
--- a/drivers/gpu/drm/radeon/r600_blit_shaders.c
+++ b/drivers/gpu/drm/radeon/r600_blit_shaders.c
@@ -32,7 +32,7 @@
32 * R6xx+ cards need to use the 3D engine to blit data which requires 32 * R6xx+ cards need to use the 3D engine to blit data which requires
33 * quite a bit of hw state setup. Rather than pull the whole 3D driver 33 * quite a bit of hw state setup. Rather than pull the whole 3D driver
34 * (which normally generates the 3D state) into the DRM, we opt to use 34 * (which normally generates the 3D state) into the DRM, we opt to use
35 * statically generated state tables. The regsiter state and shaders 35 * statically generated state tables. The register state and shaders
36 * were hand generated to support blitting functionality. See the 3D 36 * were hand generated to support blitting functionality. See the 3D
37 * driver or documentation for descriptions of the registers and 37 * driver or documentation for descriptions of the registers and
38 * shader instructions. 38 * shader instructions.