Merge tag 'mvebu-dt64-4.12-2' of git://git.infradead.org/linux-mvebu into next/dt64

mvebu dt64 for 4.12 (part 2)

- crypto engine description for the Armada 7k/8k SoCs and the boards
  using it
- SDHCI description for the Armada 37xx and 7k/8k SoCs and the boards
  using it

* tag 'mvebu-dt64-4.12-2' of git://git.infradead.org/linux-mvebu:
  arm64: marvell: dts: enable the crypto engine on the Armada 8040 DB
  arm64: marvell: dts: enable the crypto engine on the Armada 7040 DB
  arm64: marvell: dts: add crypto engine description for 7k/8k
  arm64: dts: marvell: add sdhci support for Armada 7K/8K
  arm64: dts: marvell: add eMMC support for Armada 37xx

Signed-off-by: Olof Johansson <olof@lixom.net>

7 files changed, 107 insertions, 0 deletions

diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index 2a6eef2d4d66..950cbd23a5bd 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -146,6 +146,15 @@
         status = "okay";
 };
 
+&sdhci0 {
+        non-removable;
+        bus-width = <8>;
+        mmc-ddr-1_8v;
+        mmc-hs400-1_8v;
+        marvell,pad-type = "fixed-1-8v";
+        status = "okay";
+};
+
 /* CON31 */
 &usb3 {
         status = "okay";
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index 2a4e8dbe33aa..311b97c80c7b 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -218,6 +218,17 @@
                                 };
                         };
 
+                        sdhci0: sdhci@d8000 {
+                                compatible = "marvell,armada-3700-sdhci",
+                                "marvell,sdhci-xenon";
+                                reg = <0xd8000 0x300
+                                       0x17808 0x4>;
+                                interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+                                clocks = <&nb_periph_clk 0>;
+                                clock-names = "core";
+                                status = "disabled";
+                        };
+
                         sata: sata@e0000 {
                                 compatible = "marvell,armada-3700-ahci";
                                 reg = <0xe0000 0x2000>;
diff --git a/arch/arm64/boot/dts/marvell/armada-7040-db.dts b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
index bb0e1e8e7138..12442329b80f 100644
--- a/arch/arm64/boot/dts/marvell/armada-7040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
@@ -147,6 +147,20 @@
         status = "okay";
 };
 
+&ap_sdhci0 {
+        status = "okay";
+        bus-width = <4>;
+        no-1-8-v;
+        non-removable;
+};
+
+&cpm_sdhci0 {
+        status = "okay";
+        bus-width = <4>;
+        no-1-8-v;
+        non-removable;
+};
+
 &cpm_mdio {
         phy0: ethernet-phy@0 {
                 reg = <0>;
@@ -171,3 +185,7 @@
         phy = <&phy1>;
         phy-mode = "rgmii-id";
 };
+
+&cpm_crypto {
+        status = "okay";
+};
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-db.dts b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
index 80e685e4235d..dc0d084005b2 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
@@ -140,6 +140,10 @@
         phy-mode = "rgmii-id";
 };
 
+&cpm_crypto {
+        status = "okay";
+};
+
 /* CON5 on CP1 expansion */
 &cps_pcie2 {
         status = "okay";
@@ -164,3 +168,15 @@
 &cps_usb3_1 {
         status = "okay";
 };
+
+&ap_sdhci0 {
+        status = "okay";
+        bus-width = <4>;
+        non-removable;
+};
+
+&cpm_sdhci0 {
+        status = "okay";
+        bus-width = <8>;
+        non-removable;
+};
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
index a749ba2edec4..9e9a4025e799 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
@@ -229,6 +229,17 @@
 
                         };
 
+                        ap_sdhci0: sdhci@6e0000 {
+                                compatible = "marvell,armada-ap806-sdhci";
+                                reg = <0x6e0000 0x300>;
+                                interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+                                clock-names = "core";
+                                clocks = <&ap_syscon 4>;
+                                dma-coherent;
+                                marvell,xenon-phy-slow-mode;
+                                status = "disabled";
+                        };
+
                         ap_syscon: system-controller@6f4000 {
                                 compatible = "marvell,ap806-system-controller",
                                              "syscon";
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
index a035f5955282..ac8df5201cd6 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
@@ -217,6 +217,32 @@
                                 clocks = <&cpm_syscon0 1 25>;
                                 status = "okay";
                         };
+
+                        cpm_sdhci0: sdhci@780000 {
+                                compatible = "marvell,armada-cp110-sdhci";
+                                reg = <0x780000 0x300>;
+                                interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+                                clock-names = "core";
+                                clocks = <&cpm_syscon0 1 4>;
+                                dma-coherent;
+                                status = "disabled";
+                        };
+
+                        cpm_crypto: crypto@800000 {
+                                compatible = "inside-secure,safexcel-eip197";
+                                reg = <0x800000 0x200000>;
+                                interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING
+                                | IRQ_TYPE_LEVEL_HIGH)>,
+                                             <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+                                interrupt-names = "mem", "ring0", "ring1",
+                                "ring2", "ring3", "eip";
+                                clocks = <&cpm_syscon0 1 26>;
+                                status = "disabled";
+                        };
                 };
 
                 cpm_pcie0: pcie@f2600000 {
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
index fb9141ab9b37..7740a75a8230 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
@@ -217,6 +217,22 @@
                                 clocks = <&cps_syscon0 1 25>;
                                 status = "okay";
                         };
+
+                        cps_crypto: crypto@800000 {
+                                compatible = "inside-secure,safexcel-eip197";
+                                reg = <0x800000 0x200000>;
+                                interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING
+                                | IRQ_TYPE_LEVEL_HIGH)>,
+                                             <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>;
+                                interrupt-names = "mem", "ring0", "ring1",
+                                                  "ring2", "ring3", "eip";
+                                clocks = <&cps_syscon0 1 26>;
+                                status = "disabled";
+                        };
                 };
 
                 cps_pcie0: pcie@f4600000 {