diff options
author | Marcus Cooper <codekipper@gmail.com> | 2017-08-19 08:48:37 -0400 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2017-08-21 12:16:05 -0400 |
commit | d03d2737e2d20c6ffb242154a69e1a9313adb632 (patch) | |
tree | aae6d2c24e82113c0788c9bb12464045fe82fb9b | |
parent | dfd2293c8626f1282e6a6e30f591c0a83146f3d4 (diff) |
ASoC: sun4i-i2s: Check for slave select bit
The newer SoCs do not have this setting. Instead they set the pin
direction. Add a check to see if the bit is valid and if so set
it accordingly.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | sound/soc/sunxi/sun4i-i2s.c | 37 |
1 files changed, 21 insertions, 16 deletions
diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c index d9910f6617ad..573acca24a2c 100644 --- a/sound/soc/sunxi/sun4i-i2s.c +++ b/sound/soc/sunxi/sun4i-i2s.c | |||
@@ -96,6 +96,7 @@ | |||
96 | * struct sun4i_i2s_quirks - Differences between SoC variants. | 96 | * struct sun4i_i2s_quirks - Differences between SoC variants. |
97 | * | 97 | * |
98 | * @has_reset: SoC needs reset deasserted. | 98 | * @has_reset: SoC needs reset deasserted. |
99 | * @has_slave_select_bit: SoC has a bit to enable slave mode. | ||
99 | * @reg_offset_txdata: offset of the tx fifo. | 100 | * @reg_offset_txdata: offset of the tx fifo. |
100 | * @sun4i_i2s_regmap: regmap config to use. | 101 | * @sun4i_i2s_regmap: regmap config to use. |
101 | * @mclk_offset: Value by which mclkdiv needs to be adjusted. | 102 | * @mclk_offset: Value by which mclkdiv needs to be adjusted. |
@@ -114,6 +115,7 @@ | |||
114 | */ | 115 | */ |
115 | struct sun4i_i2s_quirks { | 116 | struct sun4i_i2s_quirks { |
116 | bool has_reset; | 117 | bool has_reset; |
118 | bool has_slave_select_bit; | ||
117 | unsigned int reg_offset_txdata; /* TX FIFO */ | 119 | unsigned int reg_offset_txdata; /* TX FIFO */ |
118 | const struct regmap_config *sun4i_i2s_regmap; | 120 | const struct regmap_config *sun4i_i2s_regmap; |
119 | unsigned int mclk_offset; | 121 | unsigned int mclk_offset; |
@@ -394,24 +396,25 @@ static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) | |||
394 | regmap_field_write(i2s->field_fmt_bclk, bclk_polarity); | 396 | regmap_field_write(i2s->field_fmt_bclk, bclk_polarity); |
395 | regmap_field_write(i2s->field_fmt_lrclk, lrclk_polarity); | 397 | regmap_field_write(i2s->field_fmt_lrclk, lrclk_polarity); |
396 | 398 | ||
397 | /* DAI clock master masks */ | 399 | if (i2s->variant->has_slave_select_bit) { |
398 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | 400 | /* DAI clock master masks */ |
399 | case SND_SOC_DAIFMT_CBS_CFS: | 401 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
400 | /* BCLK and LRCLK master */ | 402 | case SND_SOC_DAIFMT_CBS_CFS: |
401 | val = SUN4I_I2S_CTRL_MODE_MASTER; | 403 | /* BCLK and LRCLK master */ |
402 | break; | 404 | val = SUN4I_I2S_CTRL_MODE_MASTER; |
403 | case SND_SOC_DAIFMT_CBM_CFM: | 405 | break; |
404 | /* BCLK and LRCLK slave */ | 406 | case SND_SOC_DAIFMT_CBM_CFM: |
405 | val = SUN4I_I2S_CTRL_MODE_SLAVE; | 407 | /* BCLK and LRCLK slave */ |
406 | break; | 408 | val = SUN4I_I2S_CTRL_MODE_SLAVE; |
407 | default: | 409 | break; |
408 | return -EINVAL; | 410 | default: |
411 | return -EINVAL; | ||
412 | } | ||
413 | regmap_update_bits(i2s->regmap, SUN4I_I2S_CTRL_REG, | ||
414 | SUN4I_I2S_CTRL_MODE_MASK, | ||
415 | val); | ||
409 | } | 416 | } |
410 | 417 | ||
411 | regmap_update_bits(i2s->regmap, SUN4I_I2S_CTRL_REG, | ||
412 | SUN4I_I2S_CTRL_MODE_MASK, | ||
413 | val); | ||
414 | |||
415 | /* Set significant bits in our FIFOs */ | 418 | /* Set significant bits in our FIFOs */ |
416 | regmap_update_bits(i2s->regmap, SUN4I_I2S_FIFO_CTRL_REG, | 419 | regmap_update_bits(i2s->regmap, SUN4I_I2S_FIFO_CTRL_REG, |
417 | SUN4I_I2S_FIFO_CTRL_TX_MODE_MASK | | 420 | SUN4I_I2S_FIFO_CTRL_TX_MODE_MASK | |
@@ -723,6 +726,7 @@ static const struct sun4i_i2s_quirks sun4i_a10_i2s_quirks = { | |||
723 | .field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 5), | 726 | .field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 5), |
724 | .field_fmt_bclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 6, 6), | 727 | .field_fmt_bclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 6, 6), |
725 | .field_fmt_lrclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7), | 728 | .field_fmt_lrclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7), |
729 | .has_slave_select_bit = true, | ||
726 | .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1), | 730 | .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1), |
727 | .field_txchanmap = REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31), | 731 | .field_txchanmap = REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31), |
728 | .field_rxchanmap = REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31), | 732 | .field_rxchanmap = REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31), |
@@ -739,6 +743,7 @@ static const struct sun4i_i2s_quirks sun6i_a31_i2s_quirks = { | |||
739 | .field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 5), | 743 | .field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 5), |
740 | .field_fmt_bclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 6, 6), | 744 | .field_fmt_bclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 6, 6), |
741 | .field_fmt_lrclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7), | 745 | .field_fmt_lrclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7), |
746 | .has_slave_select_bit = true, | ||
742 | .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1), | 747 | .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1), |
743 | .field_txchanmap = REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31), | 748 | .field_txchanmap = REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31), |
744 | .field_rxchanmap = REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31), | 749 | .field_rxchanmap = REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31), |