diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-04-01 20:57:13 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-04-01 20:57:13 -0400 |
commit | cf78031a659c05905f817f398df8e749dcd6e75d (patch) | |
tree | e2d6673337bbc27faf36bb0c233fc28eb1a17117 | |
parent | 1826907c1f591f820748d33ac77736fe42d18a08 (diff) | |
parent | 2aac7ddf9a410e3418c9cc69618f304550466793 (diff) |
Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk fixes from Stephen Boyd:
"A handful of const updates for reset ops and a couple fixes to the
newly introduced IPQ4019 clock driver"
* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk: qcom: ipq4019: add some fixed clocks for ddrppl and fepll
clk: qcom: ipq4019: switch remaining defines to enums
clk: qcom: Make reset_control_ops const
clk: tegra: Make reset_control_ops const
clk: sunxi: Make reset_control_ops const
clk: atlas7: Make reset_control_ops const
clk: rockchip: Make reset_control_ops const
clk: mmp: Make reset_control_ops const
clk: mediatek: Make reset_control_ops const
-rw-r--r-- | drivers/clk/mediatek/reset.c | 2 | ||||
-rw-r--r-- | drivers/clk/mmp/reset.c | 2 | ||||
-rw-r--r-- | drivers/clk/qcom/gcc-ipq4019.c | 70 | ||||
-rw-r--r-- | drivers/clk/qcom/reset.c | 2 | ||||
-rw-r--r-- | drivers/clk/qcom/reset.h | 2 | ||||
-rw-r--r-- | drivers/clk/rockchip/softrst.c | 2 | ||||
-rw-r--r-- | drivers/clk/sirf/clk-atlas7.c | 2 | ||||
-rw-r--r-- | drivers/clk/sunxi/clk-a10-ve.c | 2 | ||||
-rw-r--r-- | drivers/clk/sunxi/clk-sun9i-mmc.c | 2 | ||||
-rw-r--r-- | drivers/clk/sunxi/clk-usb.c | 2 | ||||
-rw-r--r-- | drivers/clk/tegra/clk.c | 2 |
11 files changed, 45 insertions, 45 deletions
diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c index 9e9fe4b19ac4..309049d41f1b 100644 --- a/drivers/clk/mediatek/reset.c +++ b/drivers/clk/mediatek/reset.c | |||
@@ -57,7 +57,7 @@ static int mtk_reset(struct reset_controller_dev *rcdev, | |||
57 | return mtk_reset_deassert(rcdev, id); | 57 | return mtk_reset_deassert(rcdev, id); |
58 | } | 58 | } |
59 | 59 | ||
60 | static struct reset_control_ops mtk_reset_ops = { | 60 | static const struct reset_control_ops mtk_reset_ops = { |
61 | .assert = mtk_reset_assert, | 61 | .assert = mtk_reset_assert, |
62 | .deassert = mtk_reset_deassert, | 62 | .deassert = mtk_reset_deassert, |
63 | .reset = mtk_reset, | 63 | .reset = mtk_reset, |
diff --git a/drivers/clk/mmp/reset.c b/drivers/clk/mmp/reset.c index b54da1fe73f0..b4e4d6aa2631 100644 --- a/drivers/clk/mmp/reset.c +++ b/drivers/clk/mmp/reset.c | |||
@@ -74,7 +74,7 @@ static int mmp_clk_reset_deassert(struct reset_controller_dev *rcdev, | |||
74 | return 0; | 74 | return 0; |
75 | } | 75 | } |
76 | 76 | ||
77 | static struct reset_control_ops mmp_clk_reset_ops = { | 77 | static const struct reset_control_ops mmp_clk_reset_ops = { |
78 | .assert = mmp_clk_reset_assert, | 78 | .assert = mmp_clk_reset_assert, |
79 | .deassert = mmp_clk_reset_deassert, | 79 | .deassert = mmp_clk_reset_deassert, |
80 | }; | 80 | }; |
diff --git a/drivers/clk/qcom/gcc-ipq4019.c b/drivers/clk/qcom/gcc-ipq4019.c index 5428efb9fbf5..3cd1af0af0d9 100644 --- a/drivers/clk/qcom/gcc-ipq4019.c +++ b/drivers/clk/qcom/gcc-ipq4019.c | |||
@@ -129,20 +129,10 @@ static const char * const gcc_xo_ddr_500_200[] = { | |||
129 | }; | 129 | }; |
130 | 130 | ||
131 | #define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } | 131 | #define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } |
132 | #define P_XO 0 | ||
133 | #define FE_PLL_200 1 | ||
134 | #define FE_PLL_500 2 | ||
135 | #define DDRC_PLL_666 3 | ||
136 | |||
137 | #define DDRC_PLL_666_SDCC 1 | ||
138 | #define FE_PLL_125_DLY 1 | ||
139 | |||
140 | #define FE_PLL_WCSS2G 1 | ||
141 | #define FE_PLL_WCSS5G 1 | ||
142 | 132 | ||
143 | static const struct freq_tbl ftbl_gcc_audio_pwm_clk[] = { | 133 | static const struct freq_tbl ftbl_gcc_audio_pwm_clk[] = { |
144 | F(48000000, P_XO, 1, 0, 0), | 134 | F(48000000, P_XO, 1, 0, 0), |
145 | F(200000000, FE_PLL_200, 1, 0, 0), | 135 | F(200000000, P_FEPLL200, 1, 0, 0), |
146 | { } | 136 | { } |
147 | }; | 137 | }; |
148 | 138 | ||
@@ -334,15 +324,15 @@ static struct clk_branch gcc_blsp1_qup2_spi_apps_clk = { | |||
334 | }; | 324 | }; |
335 | 325 | ||
336 | static const struct freq_tbl ftbl_gcc_blsp1_uart1_2_apps_clk[] = { | 326 | static const struct freq_tbl ftbl_gcc_blsp1_uart1_2_apps_clk[] = { |
337 | F(1843200, FE_PLL_200, 1, 144, 15625), | 327 | F(1843200, P_FEPLL200, 1, 144, 15625), |
338 | F(3686400, FE_PLL_200, 1, 288, 15625), | 328 | F(3686400, P_FEPLL200, 1, 288, 15625), |
339 | F(7372800, FE_PLL_200, 1, 576, 15625), | 329 | F(7372800, P_FEPLL200, 1, 576, 15625), |
340 | F(14745600, FE_PLL_200, 1, 1152, 15625), | 330 | F(14745600, P_FEPLL200, 1, 1152, 15625), |
341 | F(16000000, FE_PLL_200, 1, 2, 25), | 331 | F(16000000, P_FEPLL200, 1, 2, 25), |
342 | F(24000000, P_XO, 1, 1, 2), | 332 | F(24000000, P_XO, 1, 1, 2), |
343 | F(32000000, FE_PLL_200, 1, 4, 25), | 333 | F(32000000, P_FEPLL200, 1, 4, 25), |
344 | F(40000000, FE_PLL_200, 1, 1, 5), | 334 | F(40000000, P_FEPLL200, 1, 1, 5), |
345 | F(46400000, FE_PLL_200, 1, 29, 125), | 335 | F(46400000, P_FEPLL200, 1, 29, 125), |
346 | F(48000000, P_XO, 1, 0, 0), | 336 | F(48000000, P_XO, 1, 0, 0), |
347 | { } | 337 | { } |
348 | }; | 338 | }; |
@@ -410,9 +400,9 @@ static struct clk_branch gcc_blsp1_uart2_apps_clk = { | |||
410 | }; | 400 | }; |
411 | 401 | ||
412 | static const struct freq_tbl ftbl_gcc_gp_clk[] = { | 402 | static const struct freq_tbl ftbl_gcc_gp_clk[] = { |
413 | F(1250000, FE_PLL_200, 1, 16, 0), | 403 | F(1250000, P_FEPLL200, 1, 16, 0), |
414 | F(2500000, FE_PLL_200, 1, 8, 0), | 404 | F(2500000, P_FEPLL200, 1, 8, 0), |
415 | F(5000000, FE_PLL_200, 1, 4, 0), | 405 | F(5000000, P_FEPLL200, 1, 4, 0), |
416 | { } | 406 | { } |
417 | }; | 407 | }; |
418 | 408 | ||
@@ -512,11 +502,11 @@ static struct clk_branch gcc_gp3_clk = { | |||
512 | static const struct freq_tbl ftbl_gcc_sdcc1_apps_clk[] = { | 502 | static const struct freq_tbl ftbl_gcc_sdcc1_apps_clk[] = { |
513 | F(144000, P_XO, 1, 3, 240), | 503 | F(144000, P_XO, 1, 3, 240), |
514 | F(400000, P_XO, 1, 1, 0), | 504 | F(400000, P_XO, 1, 1, 0), |
515 | F(20000000, FE_PLL_500, 1, 1, 25), | 505 | F(20000000, P_FEPLL500, 1, 1, 25), |
516 | F(25000000, FE_PLL_500, 1, 1, 20), | 506 | F(25000000, P_FEPLL500, 1, 1, 20), |
517 | F(50000000, FE_PLL_500, 1, 1, 10), | 507 | F(50000000, P_FEPLL500, 1, 1, 10), |
518 | F(100000000, FE_PLL_500, 1, 1, 5), | 508 | F(100000000, P_FEPLL500, 1, 1, 5), |
519 | F(193000000, DDRC_PLL_666_SDCC, 1, 0, 0), | 509 | F(193000000, P_DDRPLL, 1, 0, 0), |
520 | { } | 510 | { } |
521 | }; | 511 | }; |
522 | 512 | ||
@@ -536,9 +526,9 @@ static struct clk_rcg2 sdcc1_apps_clk_src = { | |||
536 | 526 | ||
537 | static const struct freq_tbl ftbl_gcc_apps_clk[] = { | 527 | static const struct freq_tbl ftbl_gcc_apps_clk[] = { |
538 | F(48000000, P_XO, 1, 0, 0), | 528 | F(48000000, P_XO, 1, 0, 0), |
539 | F(200000000, FE_PLL_200, 1, 0, 0), | 529 | F(200000000, P_FEPLL200, 1, 0, 0), |
540 | F(500000000, FE_PLL_500, 1, 0, 0), | 530 | F(500000000, P_FEPLL500, 1, 0, 0), |
541 | F(626000000, DDRC_PLL_666, 1, 0, 0), | 531 | F(626000000, P_DDRPLLAPSS, 1, 0, 0), |
542 | { } | 532 | { } |
543 | }; | 533 | }; |
544 | 534 | ||
@@ -557,7 +547,7 @@ static struct clk_rcg2 apps_clk_src = { | |||
557 | 547 | ||
558 | static const struct freq_tbl ftbl_gcc_apps_ahb_clk[] = { | 548 | static const struct freq_tbl ftbl_gcc_apps_ahb_clk[] = { |
559 | F(48000000, P_XO, 1, 0, 0), | 549 | F(48000000, P_XO, 1, 0, 0), |
560 | F(100000000, FE_PLL_200, 2, 0, 0), | 550 | F(100000000, P_FEPLL200, 2, 0, 0), |
561 | { } | 551 | { } |
562 | }; | 552 | }; |
563 | 553 | ||
@@ -940,7 +930,7 @@ static struct clk_branch gcc_usb2_mock_utmi_clk = { | |||
940 | }; | 930 | }; |
941 | 931 | ||
942 | static const struct freq_tbl ftbl_gcc_usb30_mock_utmi_clk[] = { | 932 | static const struct freq_tbl ftbl_gcc_usb30_mock_utmi_clk[] = { |
943 | F(2000000, FE_PLL_200, 10, 0, 0), | 933 | F(2000000, P_FEPLL200, 10, 0, 0), |
944 | { } | 934 | { } |
945 | }; | 935 | }; |
946 | 936 | ||
@@ -1007,7 +997,7 @@ static struct clk_branch gcc_usb3_mock_utmi_clk = { | |||
1007 | }; | 997 | }; |
1008 | 998 | ||
1009 | static const struct freq_tbl ftbl_gcc_fephy_dly_clk[] = { | 999 | static const struct freq_tbl ftbl_gcc_fephy_dly_clk[] = { |
1010 | F(125000000, FE_PLL_125_DLY, 1, 0, 0), | 1000 | F(125000000, P_FEPLL125DLY, 1, 0, 0), |
1011 | { } | 1001 | { } |
1012 | }; | 1002 | }; |
1013 | 1003 | ||
@@ -1027,7 +1017,7 @@ static struct clk_rcg2 fephy_125m_dly_clk_src = { | |||
1027 | 1017 | ||
1028 | static const struct freq_tbl ftbl_gcc_wcss2g_clk[] = { | 1018 | static const struct freq_tbl ftbl_gcc_wcss2g_clk[] = { |
1029 | F(48000000, P_XO, 1, 0, 0), | 1019 | F(48000000, P_XO, 1, 0, 0), |
1030 | F(250000000, FE_PLL_WCSS2G, 1, 0, 0), | 1020 | F(250000000, P_FEPLLWCSS2G, 1, 0, 0), |
1031 | { } | 1021 | { } |
1032 | }; | 1022 | }; |
1033 | 1023 | ||
@@ -1097,7 +1087,7 @@ static struct clk_branch gcc_wcss2g_rtc_clk = { | |||
1097 | 1087 | ||
1098 | static const struct freq_tbl ftbl_gcc_wcss5g_clk[] = { | 1088 | static const struct freq_tbl ftbl_gcc_wcss5g_clk[] = { |
1099 | F(48000000, P_XO, 1, 0, 0), | 1089 | F(48000000, P_XO, 1, 0, 0), |
1100 | F(250000000, FE_PLL_WCSS5G, 1, 0, 0), | 1090 | F(250000000, P_FEPLLWCSS5G, 1, 0, 0), |
1101 | { } | 1091 | { } |
1102 | }; | 1092 | }; |
1103 | 1093 | ||
@@ -1325,6 +1315,16 @@ MODULE_DEVICE_TABLE(of, gcc_ipq4019_match_table); | |||
1325 | 1315 | ||
1326 | static int gcc_ipq4019_probe(struct platform_device *pdev) | 1316 | static int gcc_ipq4019_probe(struct platform_device *pdev) |
1327 | { | 1317 | { |
1318 | struct device *dev = &pdev->dev; | ||
1319 | |||
1320 | clk_register_fixed_rate(dev, "fepll125", "xo", 0, 200000000); | ||
1321 | clk_register_fixed_rate(dev, "fepll125dly", "xo", 0, 200000000); | ||
1322 | clk_register_fixed_rate(dev, "fepllwcss2g", "xo", 0, 200000000); | ||
1323 | clk_register_fixed_rate(dev, "fepllwcss5g", "xo", 0, 200000000); | ||
1324 | clk_register_fixed_rate(dev, "fepll200", "xo", 0, 200000000); | ||
1325 | clk_register_fixed_rate(dev, "fepll500", "xo", 0, 200000000); | ||
1326 | clk_register_fixed_rate(dev, "ddrpllapss", "xo", 0, 666000000); | ||
1327 | |||
1328 | return qcom_cc_probe(pdev, &gcc_ipq4019_desc); | 1328 | return qcom_cc_probe(pdev, &gcc_ipq4019_desc); |
1329 | } | 1329 | } |
1330 | 1330 | ||
diff --git a/drivers/clk/qcom/reset.c b/drivers/clk/qcom/reset.c index 6c977d3a8590..0324d8daab9b 100644 --- a/drivers/clk/qcom/reset.c +++ b/drivers/clk/qcom/reset.c | |||
@@ -55,7 +55,7 @@ qcom_reset_deassert(struct reset_controller_dev *rcdev, unsigned long id) | |||
55 | return regmap_update_bits(rst->regmap, map->reg, mask, 0); | 55 | return regmap_update_bits(rst->regmap, map->reg, mask, 0); |
56 | } | 56 | } |
57 | 57 | ||
58 | struct reset_control_ops qcom_reset_ops = { | 58 | const struct reset_control_ops qcom_reset_ops = { |
59 | .reset = qcom_reset, | 59 | .reset = qcom_reset, |
60 | .assert = qcom_reset_assert, | 60 | .assert = qcom_reset_assert, |
61 | .deassert = qcom_reset_deassert, | 61 | .deassert = qcom_reset_deassert, |
diff --git a/drivers/clk/qcom/reset.h b/drivers/clk/qcom/reset.h index 0e11e2130f97..cda877927d43 100644 --- a/drivers/clk/qcom/reset.h +++ b/drivers/clk/qcom/reset.h | |||
@@ -32,6 +32,6 @@ struct qcom_reset_controller { | |||
32 | #define to_qcom_reset_controller(r) \ | 32 | #define to_qcom_reset_controller(r) \ |
33 | container_of(r, struct qcom_reset_controller, rcdev); | 33 | container_of(r, struct qcom_reset_controller, rcdev); |
34 | 34 | ||
35 | extern struct reset_control_ops qcom_reset_ops; | 35 | extern const struct reset_control_ops qcom_reset_ops; |
36 | 36 | ||
37 | #endif | 37 | #endif |
diff --git a/drivers/clk/rockchip/softrst.c b/drivers/clk/rockchip/softrst.c index 552f7bb15bc5..21218987bbc3 100644 --- a/drivers/clk/rockchip/softrst.c +++ b/drivers/clk/rockchip/softrst.c | |||
@@ -81,7 +81,7 @@ static int rockchip_softrst_deassert(struct reset_controller_dev *rcdev, | |||
81 | return 0; | 81 | return 0; |
82 | } | 82 | } |
83 | 83 | ||
84 | static struct reset_control_ops rockchip_softrst_ops = { | 84 | static const struct reset_control_ops rockchip_softrst_ops = { |
85 | .assert = rockchip_softrst_assert, | 85 | .assert = rockchip_softrst_assert, |
86 | .deassert = rockchip_softrst_deassert, | 86 | .deassert = rockchip_softrst_deassert, |
87 | }; | 87 | }; |
diff --git a/drivers/clk/sirf/clk-atlas7.c b/drivers/clk/sirf/clk-atlas7.c index 957aae63e7cc..d0c6c9a2d06a 100644 --- a/drivers/clk/sirf/clk-atlas7.c +++ b/drivers/clk/sirf/clk-atlas7.c | |||
@@ -1423,7 +1423,7 @@ static int atlas7_reset_module(struct reset_controller_dev *rcdev, | |||
1423 | return 0; | 1423 | return 0; |
1424 | } | 1424 | } |
1425 | 1425 | ||
1426 | static struct reset_control_ops atlas7_rst_ops = { | 1426 | static const struct reset_control_ops atlas7_rst_ops = { |
1427 | .reset = atlas7_reset_module, | 1427 | .reset = atlas7_reset_module, |
1428 | }; | 1428 | }; |
1429 | 1429 | ||
diff --git a/drivers/clk/sunxi/clk-a10-ve.c b/drivers/clk/sunxi/clk-a10-ve.c index 044c1717b762..d9ea22ec4e25 100644 --- a/drivers/clk/sunxi/clk-a10-ve.c +++ b/drivers/clk/sunxi/clk-a10-ve.c | |||
@@ -85,7 +85,7 @@ static int sunxi_ve_of_xlate(struct reset_controller_dev *rcdev, | |||
85 | return 0; | 85 | return 0; |
86 | } | 86 | } |
87 | 87 | ||
88 | static struct reset_control_ops sunxi_ve_reset_ops = { | 88 | static const struct reset_control_ops sunxi_ve_reset_ops = { |
89 | .assert = sunxi_ve_reset_assert, | 89 | .assert = sunxi_ve_reset_assert, |
90 | .deassert = sunxi_ve_reset_deassert, | 90 | .deassert = sunxi_ve_reset_deassert, |
91 | }; | 91 | }; |
diff --git a/drivers/clk/sunxi/clk-sun9i-mmc.c b/drivers/clk/sunxi/clk-sun9i-mmc.c index a9b176139aca..028dd832a39f 100644 --- a/drivers/clk/sunxi/clk-sun9i-mmc.c +++ b/drivers/clk/sunxi/clk-sun9i-mmc.c | |||
@@ -83,7 +83,7 @@ static int sun9i_mmc_reset_deassert(struct reset_controller_dev *rcdev, | |||
83 | return 0; | 83 | return 0; |
84 | } | 84 | } |
85 | 85 | ||
86 | static struct reset_control_ops sun9i_mmc_reset_ops = { | 86 | static const struct reset_control_ops sun9i_mmc_reset_ops = { |
87 | .assert = sun9i_mmc_reset_assert, | 87 | .assert = sun9i_mmc_reset_assert, |
88 | .deassert = sun9i_mmc_reset_deassert, | 88 | .deassert = sun9i_mmc_reset_deassert, |
89 | }; | 89 | }; |
diff --git a/drivers/clk/sunxi/clk-usb.c b/drivers/clk/sunxi/clk-usb.c index 5432b1c198a4..fe0c3d169377 100644 --- a/drivers/clk/sunxi/clk-usb.c +++ b/drivers/clk/sunxi/clk-usb.c | |||
@@ -76,7 +76,7 @@ static int sunxi_usb_reset_deassert(struct reset_controller_dev *rcdev, | |||
76 | return 0; | 76 | return 0; |
77 | } | 77 | } |
78 | 78 | ||
79 | static struct reset_control_ops sunxi_usb_reset_ops = { | 79 | static const struct reset_control_ops sunxi_usb_reset_ops = { |
80 | .assert = sunxi_usb_reset_assert, | 80 | .assert = sunxi_usb_reset_assert, |
81 | .deassert = sunxi_usb_reset_deassert, | 81 | .deassert = sunxi_usb_reset_deassert, |
82 | }; | 82 | }; |
diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c index 2a3a4fe803d6..f60fe2e344ca 100644 --- a/drivers/clk/tegra/clk.c +++ b/drivers/clk/tegra/clk.c | |||
@@ -271,7 +271,7 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl, | |||
271 | } | 271 | } |
272 | } | 272 | } |
273 | 273 | ||
274 | static struct reset_control_ops rst_ops = { | 274 | static const struct reset_control_ops rst_ops = { |
275 | .assert = tegra_clk_rst_assert, | 275 | .assert = tegra_clk_rst_assert, |
276 | .deassert = tegra_clk_rst_deassert, | 276 | .deassert = tegra_clk_rst_deassert, |
277 | }; | 277 | }; |