diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2017-09-21 05:57:08 -0400 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2017-09-21 05:57:08 -0400 |
commit | cf00ab842eec7cd4923a3f0f3b5ddcead9b11306 (patch) | |
tree | 07ed14114821cd8eadf3ecde2a1cbaea045bf85d | |
parent | 0551968add53777fddd18f4ffb4e3bbc1f646d79 (diff) | |
parent | 90019f8fcd71bf71653690329e32f41489e96122 (diff) |
Merge tag 'irqchip-4.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Pull irqchip updates from Marc Zyngier
- A GICv3 initialisation fix when some CPUs fail to be brought up
- A GICv4 compile fix for GCC 4.5 (!)
- A MIPS-GIC fix for the PCIe support
-rw-r--r-- | drivers/irqchip/irq-gic-v3.c | 8 | ||||
-rw-r--r-- | drivers/irqchip/irq-gic-v4.c | 12 | ||||
-rw-r--r-- | drivers/irqchip/irq-mips-gic.c | 6 |
3 files changed, 16 insertions, 10 deletions
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 519149ec9053..b5df99c6f680 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c | |||
@@ -1042,7 +1042,7 @@ static int get_cpu_number(struct device_node *dn) | |||
1042 | { | 1042 | { |
1043 | const __be32 *cell; | 1043 | const __be32 *cell; |
1044 | u64 hwid; | 1044 | u64 hwid; |
1045 | int i; | 1045 | int cpu; |
1046 | 1046 | ||
1047 | cell = of_get_property(dn, "reg", NULL); | 1047 | cell = of_get_property(dn, "reg", NULL); |
1048 | if (!cell) | 1048 | if (!cell) |
@@ -1056,9 +1056,9 @@ static int get_cpu_number(struct device_node *dn) | |||
1056 | if (hwid & ~MPIDR_HWID_BITMASK) | 1056 | if (hwid & ~MPIDR_HWID_BITMASK) |
1057 | return -1; | 1057 | return -1; |
1058 | 1058 | ||
1059 | for (i = 0; i < num_possible_cpus(); i++) | 1059 | for_each_possible_cpu(cpu) |
1060 | if (cpu_logical_map(i) == hwid) | 1060 | if (cpu_logical_map(cpu) == hwid) |
1061 | return i; | 1061 | return cpu; |
1062 | 1062 | ||
1063 | return -1; | 1063 | return -1; |
1064 | } | 1064 | } |
diff --git a/drivers/irqchip/irq-gic-v4.c b/drivers/irqchip/irq-gic-v4.c index 2370e6d9e603..cd0bcc3b7e33 100644 --- a/drivers/irqchip/irq-gic-v4.c +++ b/drivers/irqchip/irq-gic-v4.c | |||
@@ -173,7 +173,9 @@ int its_map_vlpi(int irq, struct its_vlpi_map *map) | |||
173 | { | 173 | { |
174 | struct its_cmd_info info = { | 174 | struct its_cmd_info info = { |
175 | .cmd_type = MAP_VLPI, | 175 | .cmd_type = MAP_VLPI, |
176 | .map = map, | 176 | { |
177 | .map = map, | ||
178 | }, | ||
177 | }; | 179 | }; |
178 | 180 | ||
179 | /* | 181 | /* |
@@ -189,7 +191,9 @@ int its_get_vlpi(int irq, struct its_vlpi_map *map) | |||
189 | { | 191 | { |
190 | struct its_cmd_info info = { | 192 | struct its_cmd_info info = { |
191 | .cmd_type = GET_VLPI, | 193 | .cmd_type = GET_VLPI, |
192 | .map = map, | 194 | { |
195 | .map = map, | ||
196 | }, | ||
193 | }; | 197 | }; |
194 | 198 | ||
195 | return irq_set_vcpu_affinity(irq, &info); | 199 | return irq_set_vcpu_affinity(irq, &info); |
@@ -205,7 +209,9 @@ int its_prop_update_vlpi(int irq, u8 config, bool inv) | |||
205 | { | 209 | { |
206 | struct its_cmd_info info = { | 210 | struct its_cmd_info info = { |
207 | .cmd_type = inv ? PROP_UPDATE_AND_INV_VLPI : PROP_UPDATE_VLPI, | 211 | .cmd_type = inv ? PROP_UPDATE_AND_INV_VLPI : PROP_UPDATE_VLPI, |
208 | .config = config, | 212 | { |
213 | .config = config, | ||
214 | }, | ||
209 | }; | 215 | }; |
210 | 216 | ||
211 | return irq_set_vcpu_affinity(irq, &info); | 217 | return irq_set_vcpu_affinity(irq, &info); |
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c index 6e52a88bbd9e..40159ac12ac8 100644 --- a/drivers/irqchip/irq-mips-gic.c +++ b/drivers/irqchip/irq-mips-gic.c | |||
@@ -169,7 +169,7 @@ static void gic_mask_irq(struct irq_data *d) | |||
169 | { | 169 | { |
170 | unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq); | 170 | unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq); |
171 | 171 | ||
172 | write_gic_rmask(BIT(intr)); | 172 | write_gic_rmask(intr); |
173 | gic_clear_pcpu_masks(intr); | 173 | gic_clear_pcpu_masks(intr); |
174 | } | 174 | } |
175 | 175 | ||
@@ -179,7 +179,7 @@ static void gic_unmask_irq(struct irq_data *d) | |||
179 | unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq); | 179 | unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq); |
180 | unsigned int cpu; | 180 | unsigned int cpu; |
181 | 181 | ||
182 | write_gic_smask(BIT(intr)); | 182 | write_gic_smask(intr); |
183 | 183 | ||
184 | gic_clear_pcpu_masks(intr); | 184 | gic_clear_pcpu_masks(intr); |
185 | cpu = cpumask_first_and(affinity, cpu_online_mask); | 185 | cpu = cpumask_first_and(affinity, cpu_online_mask); |
@@ -767,7 +767,7 @@ static int __init gic_of_init(struct device_node *node, | |||
767 | for (i = 0; i < gic_shared_intrs; i++) { | 767 | for (i = 0; i < gic_shared_intrs; i++) { |
768 | change_gic_pol(i, GIC_POL_ACTIVE_HIGH); | 768 | change_gic_pol(i, GIC_POL_ACTIVE_HIGH); |
769 | change_gic_trig(i, GIC_TRIG_LEVEL); | 769 | change_gic_trig(i, GIC_TRIG_LEVEL); |
770 | write_gic_rmask(BIT(i)); | 770 | write_gic_rmask(i); |
771 | } | 771 | } |
772 | 772 | ||
773 | for (i = 0; i < gic_vpes; i++) { | 773 | for (i = 0; i < gic_vpes; i++) { |