diff options
author | Deepak Rawat <drawat@vmware.com> | 2018-06-20 17:20:23 -0400 |
---|---|---|
committer | Thomas Hellstrom <thellstrom@vmware.com> | 2018-07-06 14:16:08 -0400 |
commit | cdff8e73006c05ee342dd588b5ba90b5def56184 (patch) | |
tree | 3f6043df4bd4b208221fa2bc56dbe9f61f3d1b45 | |
parent | 30aeee6728abf29b29d625061782519a15be88db (diff) |
drm/vmwgfx: Add support for SVGA3dCmdDefineGBSurface_v3
SVGA device added new command SVGA3dCmdDefineGBSurface_v3 which allows
64-bit SVGA3dSurfaceAllFlags. This commit adds support for
SVGA3dCmdDefineGBSurface_v3 command in vmwgfx.
Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
-rw-r--r-- | drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/vmwgfx/vmwgfx_surface.c | 32 |
3 files changed, 35 insertions, 2 deletions
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h index 7bb08bac728e..06cce72b7b9e 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | |||
@@ -180,6 +180,8 @@ struct vmw_surface { | |||
180 | SVGA3dTextureFilter autogen_filter; | 180 | SVGA3dTextureFilter autogen_filter; |
181 | uint32_t multisample_count; | 181 | uint32_t multisample_count; |
182 | struct list_head view_list; | 182 | struct list_head view_list; |
183 | SVGA3dMSPattern multisample_pattern; | ||
184 | SVGA3dMSQualityLevel quality_level; | ||
183 | }; | 185 | }; |
184 | 186 | ||
185 | struct vmw_marker_queue { | 187 | struct vmw_marker_queue { |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c index 15f2cb2a151b..6630abf3a95c 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | |||
@@ -1157,6 +1157,9 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane, | |||
1157 | content_srf.flags = 0; | 1157 | content_srf.flags = 0; |
1158 | content_srf.mip_levels[0] = 1; | 1158 | content_srf.mip_levels[0] = 1; |
1159 | content_srf.multisample_count = 0; | 1159 | content_srf.multisample_count = 0; |
1160 | content_srf.multisample_pattern = | ||
1161 | SVGA3D_MS_PATTERN_NONE; | ||
1162 | content_srf.quality_level = SVGA3D_MS_QUALITY_NONE; | ||
1160 | } else { | 1163 | } else { |
1161 | content_srf = *new_vfbs->surface; | 1164 | content_srf = *new_vfbs->surface; |
1162 | } | 1165 | } |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c index e90f8d39de53..2abf9a895605 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c | |||
@@ -785,6 +785,8 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data, | |||
785 | srf->base_size = *srf->sizes; | 785 | srf->base_size = *srf->sizes; |
786 | srf->autogen_filter = SVGA3D_TEX_FILTER_NONE; | 786 | srf->autogen_filter = SVGA3D_TEX_FILTER_NONE; |
787 | srf->multisample_count = 0; | 787 | srf->multisample_count = 0; |
788 | srf->multisample_pattern = SVGA3D_MS_PATTERN_NONE; | ||
789 | srf->quality_level = SVGA3D_MS_QUALITY_NONE; | ||
788 | 790 | ||
789 | cur_bo_offset = 0; | 791 | cur_bo_offset = 0; |
790 | cur_offset = srf->offsets; | 792 | cur_offset = srf->offsets; |
@@ -1031,6 +1033,10 @@ static int vmw_gb_surface_create(struct vmw_resource *res) | |||
1031 | SVGA3dCmdHeader header; | 1033 | SVGA3dCmdHeader header; |
1032 | SVGA3dCmdDefineGBSurface_v2 body; | 1034 | SVGA3dCmdDefineGBSurface_v2 body; |
1033 | } *cmd2; | 1035 | } *cmd2; |
1036 | struct { | ||
1037 | SVGA3dCmdHeader header; | ||
1038 | SVGA3dCmdDefineGBSurface_v3 body; | ||
1039 | } *cmd3; | ||
1034 | 1040 | ||
1035 | if (likely(res->id != -1)) | 1041 | if (likely(res->id != -1)) |
1036 | return 0; | 1042 | return 0; |
@@ -1047,7 +1053,11 @@ static int vmw_gb_surface_create(struct vmw_resource *res) | |||
1047 | goto out_no_fifo; | 1053 | goto out_no_fifo; |
1048 | } | 1054 | } |
1049 | 1055 | ||
1050 | if (srf->array_size > 0) { | 1056 | if (dev_priv->has_sm4_1 && srf->array_size > 0) { |
1057 | cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V3; | ||
1058 | cmd_len = sizeof(cmd3->body); | ||
1059 | submit_len = sizeof(*cmd3); | ||
1060 | } else if (srf->array_size > 0) { | ||
1051 | /* has_dx checked on creation time. */ | 1061 | /* has_dx checked on creation time. */ |
1052 | cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V2; | 1062 | cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V2; |
1053 | cmd_len = sizeof(cmd2->body); | 1063 | cmd_len = sizeof(cmd2->body); |
@@ -1060,6 +1070,7 @@ static int vmw_gb_surface_create(struct vmw_resource *res) | |||
1060 | 1070 | ||
1061 | cmd = vmw_fifo_reserve(dev_priv, submit_len); | 1071 | cmd = vmw_fifo_reserve(dev_priv, submit_len); |
1062 | cmd2 = (typeof(cmd2))cmd; | 1072 | cmd2 = (typeof(cmd2))cmd; |
1073 | cmd3 = (typeof(cmd3))cmd; | ||
1063 | if (unlikely(!cmd)) { | 1074 | if (unlikely(!cmd)) { |
1064 | DRM_ERROR("Failed reserving FIFO space for surface " | 1075 | DRM_ERROR("Failed reserving FIFO space for surface " |
1065 | "creation.\n"); | 1076 | "creation.\n"); |
@@ -1067,7 +1078,22 @@ static int vmw_gb_surface_create(struct vmw_resource *res) | |||
1067 | goto out_no_fifo; | 1078 | goto out_no_fifo; |
1068 | } | 1079 | } |
1069 | 1080 | ||
1070 | if (srf->array_size > 0) { | 1081 | if (dev_priv->has_sm4_1 && srf->array_size > 0) { |
1082 | cmd3->header.id = cmd_id; | ||
1083 | cmd3->header.size = cmd_len; | ||
1084 | cmd3->body.sid = srf->res.id; | ||
1085 | cmd3->body.surfaceFlags = (SVGA3dSurfaceAllFlags)srf->flags; | ||
1086 | cmd3->body.format = srf->format; | ||
1087 | cmd3->body.numMipLevels = srf->mip_levels[0]; | ||
1088 | cmd3->body.multisampleCount = srf->multisample_count; | ||
1089 | cmd3->body.multisamplePattern = srf->multisample_pattern; | ||
1090 | cmd3->body.qualityLevel = srf->quality_level; | ||
1091 | cmd3->body.autogenFilter = srf->autogen_filter; | ||
1092 | cmd3->body.size.width = srf->base_size.width; | ||
1093 | cmd3->body.size.height = srf->base_size.height; | ||
1094 | cmd3->body.size.depth = srf->base_size.depth; | ||
1095 | cmd3->body.arraySize = srf->array_size; | ||
1096 | } else if (srf->array_size > 0) { | ||
1071 | cmd2->header.id = cmd_id; | 1097 | cmd2->header.id = cmd_id; |
1072 | cmd2->header.size = cmd_len; | 1098 | cmd2->header.size = cmd_len; |
1073 | cmd2->body.sid = srf->res.id; | 1099 | cmd2->body.sid = srf->res.id; |
@@ -1561,6 +1587,8 @@ int vmw_surface_gb_priv_define(struct drm_device *dev, | |||
1561 | srf->autogen_filter = SVGA3D_TEX_FILTER_NONE; | 1587 | srf->autogen_filter = SVGA3D_TEX_FILTER_NONE; |
1562 | srf->array_size = array_size; | 1588 | srf->array_size = array_size; |
1563 | srf->multisample_count = multisample_count; | 1589 | srf->multisample_count = multisample_count; |
1590 | srf->multisample_pattern = SVGA3D_MS_PATTERN_NONE; | ||
1591 | srf->quality_level = SVGA3D_MS_QUALITY_NONE; | ||
1564 | 1592 | ||
1565 | if (array_size) | 1593 | if (array_size) |
1566 | num_layers = array_size; | 1594 | num_layers = array_size; |