diff options
author | Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> | 2014-03-17 09:08:12 -0400 |
---|---|---|
committer | Tejun Heo <tj@kernel.org> | 2014-03-17 10:46:54 -0400 |
commit | cdf457a4fe30980f7c15a894af2f954f85cd71d2 (patch) | |
tree | 993c18facde9c31ef9fb3186e7857ee5785c906e | |
parent | 1bf9d885658cbee1bc8e4324d0e27b02b1540d58 (diff) |
ata: ahci_sunxi: fix code formatting
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
-rw-r--r-- | drivers/ata/ahci_sunxi.c | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c index 0af6cb83b23e..42d3f64e74b3 100644 --- a/drivers/ata/ahci_sunxi.c +++ b/drivers/ata/ahci_sunxi.c | |||
@@ -27,28 +27,28 @@ | |||
27 | #include <linux/regulator/consumer.h> | 27 | #include <linux/regulator/consumer.h> |
28 | #include "ahci.h" | 28 | #include "ahci.h" |
29 | 29 | ||
30 | #define AHCI_BISTAFR 0x00a0 | 30 | #define AHCI_BISTAFR 0x00a0 |
31 | #define AHCI_BISTCR 0x00a4 | 31 | #define AHCI_BISTCR 0x00a4 |
32 | #define AHCI_BISTFCTR 0x00a8 | 32 | #define AHCI_BISTFCTR 0x00a8 |
33 | #define AHCI_BISTSR 0x00ac | 33 | #define AHCI_BISTSR 0x00ac |
34 | #define AHCI_BISTDECR 0x00b0 | 34 | #define AHCI_BISTDECR 0x00b0 |
35 | #define AHCI_DIAGNR0 0x00b4 | 35 | #define AHCI_DIAGNR0 0x00b4 |
36 | #define AHCI_DIAGNR1 0x00b8 | 36 | #define AHCI_DIAGNR1 0x00b8 |
37 | #define AHCI_OOBR 0x00bc | 37 | #define AHCI_OOBR 0x00bc |
38 | #define AHCI_PHYCS0R 0x00c0 | 38 | #define AHCI_PHYCS0R 0x00c0 |
39 | #define AHCI_PHYCS1R 0x00c4 | 39 | #define AHCI_PHYCS1R 0x00c4 |
40 | #define AHCI_PHYCS2R 0x00c8 | 40 | #define AHCI_PHYCS2R 0x00c8 |
41 | #define AHCI_TIMER1MS 0x00e0 | 41 | #define AHCI_TIMER1MS 0x00e0 |
42 | #define AHCI_GPARAM1R 0x00e8 | 42 | #define AHCI_GPARAM1R 0x00e8 |
43 | #define AHCI_GPARAM2R 0x00ec | 43 | #define AHCI_GPARAM2R 0x00ec |
44 | #define AHCI_PPARAMR 0x00f0 | 44 | #define AHCI_PPARAMR 0x00f0 |
45 | #define AHCI_TESTR 0x00f4 | 45 | #define AHCI_TESTR 0x00f4 |
46 | #define AHCI_VERSIONR 0x00f8 | 46 | #define AHCI_VERSIONR 0x00f8 |
47 | #define AHCI_IDR 0x00fc | 47 | #define AHCI_IDR 0x00fc |
48 | #define AHCI_RWCR 0x00fc | 48 | #define AHCI_RWCR 0x00fc |
49 | #define AHCI_P0DMACR 0x0170 | 49 | #define AHCI_P0DMACR 0x0170 |
50 | #define AHCI_P0PHYCR 0x0178 | 50 | #define AHCI_P0PHYCR 0x0178 |
51 | #define AHCI_P0PHYSR 0x017c | 51 | #define AHCI_P0PHYSR 0x017c |
52 | 52 | ||
53 | static void sunxi_clrbits(void __iomem *reg, u32 clr_val) | 53 | static void sunxi_clrbits(void __iomem *reg, u32 clr_val) |
54 | { | 54 | { |