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authorKevin Cernekee <cernekee@gmail.com>2014-12-25 12:49:18 -0500
committerRalf Baechle <ralf@linux-mips.org>2015-04-01 11:21:42 -0400
commitcd586ebc324d7514ca1129f5847fbf83b0a59b60 (patch)
treecbdbbaf62f9618ae8529d80bffe3c46951cb9476
parent60b858f225256a574d33e7321246ae501b7d8693 (diff)
MIPS: BMIPS: Refresh BCM3384 DTS files
The DT bindings for this platform have changed as the bootloader and product requirements evolved. In particular, there are both Linux-on-Zephyr and Linux-on-Viper configurations. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: jaedon.shin@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8856/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/boot/dts/brcm/bcm3384.dtsi109
-rw-r--r--arch/mips/boot/dts/brcm/bcm3384_zephyr.dtsi126
-rw-r--r--arch/mips/boot/dts/brcm/bcm93384wvg.dts9
3 files changed, 127 insertions, 117 deletions
diff --git a/arch/mips/boot/dts/brcm/bcm3384.dtsi b/arch/mips/boot/dts/brcm/bcm3384.dtsi
deleted file mode 100644
index 21b074a99c94..000000000000
--- a/arch/mips/boot/dts/brcm/bcm3384.dtsi
+++ /dev/null
@@ -1,109 +0,0 @@
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm3384", "brcm,bcm33843";
5
6 cpus {
7 #address-cells = <1>;
8 #size-cells = <0>;
9
10 /* On BMIPS5000 this is 1/8th of the CPU core clock */
11 mips-hpt-frequency = <100000000>;
12
13 cpu@0 {
14 compatible = "brcm,bmips5000";
15 device_type = "cpu";
16 reg = <0>;
17 };
18
19 cpu@1 {
20 compatible = "brcm,bmips5000";
21 device_type = "cpu";
22 reg = <1>;
23 };
24 };
25
26 clocks {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 periph_clk: periph_clk@0 {
31 compatible = "fixed-clock";
32 #clock-cells = <0>;
33 clock-frequency = <54000000>;
34 };
35 };
36
37 aliases {
38 uart0 = &uart0;
39 };
40
41 cpu_intc: cpu_intc@0 {
42 #address-cells = <0>;
43 compatible = "mti,cpu-interrupt-controller";
44
45 interrupt-controller;
46 #interrupt-cells = <1>;
47 };
48
49 periph_intc: periph_intc@14e00038 {
50 compatible = "brcm,bcm3384-intc";
51 reg = <0x14e00038 0x8 0x14e00340 0x8>;
52
53 interrupt-controller;
54 #interrupt-cells = <1>;
55
56 interrupt-parent = <&cpu_intc>;
57 interrupts = <4>;
58 };
59
60 zmips_intc: zmips_intc@104b0060 {
61 compatible = "brcm,bcm3384-intc";
62 reg = <0x104b0060 0x8>;
63
64 interrupt-controller;
65 #interrupt-cells = <1>;
66
67 interrupt-parent = <&periph_intc>;
68 interrupts = <29>;
69 };
70
71 iop_intc: iop_intc@14e00058 {
72 compatible = "brcm,bcm3384-intc";
73 reg = <0x14e00058 0x8>;
74
75 interrupt-controller;
76 #interrupt-cells = <1>;
77
78 interrupt-parent = <&cpu_intc>;
79 interrupts = <6>;
80 };
81
82 uart0: serial@14e00520 {
83 compatible = "brcm,bcm6345-uart";
84 reg = <0x14e00520 0x18>;
85 interrupt-parent = <&periph_intc>;
86 interrupts = <2>;
87 clocks = <&periph_clk>;
88 status = "disabled";
89 };
90
91 ehci0: usb@15400300 {
92 compatible = "brcm,bcm3384-ehci", "generic-ehci";
93 reg = <0x15400300 0x100>;
94 big-endian;
95 interrupt-parent = <&periph_intc>;
96 interrupts = <41>;
97 status = "disabled";
98 };
99
100 ohci0: usb@15400400 {
101 compatible = "brcm,bcm3384-ohci", "generic-ohci";
102 reg = <0x15400400 0x100>;
103 big-endian;
104 no-big-frame-no;
105 interrupt-parent = <&periph_intc>;
106 interrupts = <40>;
107 status = "disabled";
108 };
109};
diff --git a/arch/mips/boot/dts/brcm/bcm3384_zephyr.dtsi b/arch/mips/boot/dts/brcm/bcm3384_zephyr.dtsi
new file mode 100644
index 000000000000..a7bd8564e9f6
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm3384_zephyr.dtsi
@@ -0,0 +1,126 @@
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm3384", "brcm,bcm33843";
5
6 memory@0 {
7 device_type = "memory";
8
9 /* Typical range. The bootloader should fill this in. */
10 reg = <0x0 0x08000000>;
11 };
12
13 cpus {
14 #address-cells = <1>;
15 #size-cells = <0>;
16
17 /* On BMIPS5000 this is 1/8th of the CPU core clock */
18 mips-hpt-frequency = <100000000>;
19
20 cpu@0 {
21 compatible = "brcm,bmips5000";
22 device_type = "cpu";
23 reg = <0>;
24 };
25
26 cpu@1 {
27 compatible = "brcm,bmips5000";
28 device_type = "cpu";
29 reg = <1>;
30 };
31 };
32
33 cpu_intc: cpu_intc {
34 #address-cells = <0>;
35 compatible = "mti,cpu-interrupt-controller";
36
37 interrupt-controller;
38 #interrupt-cells = <1>;
39 };
40
41 clocks {
42 periph_clk: periph_clk {
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 clock-frequency = <54000000>;
46 };
47 };
48
49 aliases {
50 uart0 = &uart0;
51 };
52
53 ubus {
54 #address-cells = <1>;
55 #size-cells = <1>;
56
57 compatible = "brcm,ubus", "simple-bus";
58 ranges;
59 dma-ranges = <0x00000000 0x08000000 0x08000000>,
60 <0x08000000 0x00000000 0x08000000>;
61
62 periph_intc: periph_intc@14e00038 {
63 compatible = "brcm,bcm3380-l2-intc";
64 reg = <0x14e00038 0x4 0x14e0003c 0x4>,
65 <0x14e00340 0x4 0x14e00344 0x4>;
66
67 interrupt-controller;
68 #interrupt-cells = <1>;
69
70 interrupt-parent = <&cpu_intc>;
71 interrupts = <4>;
72 };
73
74 zmips_intc: zmips_intc@104b0060 {
75 compatible = "brcm,bcm3380-l2-intc";
76 reg = <0x104b0060 0x4 0x104b0064 0x4>;
77
78 interrupt-controller;
79 #interrupt-cells = <1>;
80
81 interrupt-parent = <&periph_intc>;
82 interrupts = <29>;
83 brcm,int-map-mask = <0xffffffff>;
84 };
85
86 iop_intc: iop_intc@14e00058 {
87 compatible = "brcm,bcm3380-l2-intc";
88 reg = <0x14e00058 0x4 0x14e0005c 0x4>;
89
90 interrupt-controller;
91 #interrupt-cells = <1>;
92
93 interrupt-parent = <&cpu_intc>;
94 interrupts = <6>;
95 brcm,int-map-mask = <0xffffffff>;
96 };
97
98 uart0: serial@14e00520 {
99 compatible = "brcm,bcm6345-uart";
100 reg = <0x14e00520 0x18>;
101 interrupt-parent = <&periph_intc>;
102 interrupts = <2>;
103 clocks = <&periph_clk>;
104 status = "disabled";
105 };
106
107 ehci0: usb@15400300 {
108 compatible = "brcm,bcm3384-ehci", "generic-ehci";
109 reg = <0x15400300 0x100>;
110 big-endian;
111 interrupt-parent = <&periph_intc>;
112 interrupts = <41>;
113 status = "disabled";
114 };
115
116 ohci0: usb@15400400 {
117 compatible = "brcm,bcm3384-ohci", "generic-ohci";
118 reg = <0x15400400 0x100>;
119 big-endian;
120 no-big-frame-no;
121 interrupt-parent = <&periph_intc>;
122 interrupts = <40>;
123 status = "disabled";
124 };
125 };
126};
diff --git a/arch/mips/boot/dts/brcm/bcm93384wvg.dts b/arch/mips/boot/dts/brcm/bcm93384wvg.dts
index 831741179212..d1e44a17d41a 100644
--- a/arch/mips/boot/dts/brcm/bcm93384wvg.dts
+++ b/arch/mips/boot/dts/brcm/bcm93384wvg.dts
@@ -1,6 +1,6 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/include/ "bcm3384.dtsi" 3/include/ "bcm3384_zephyr.dtsi"
4 4
5/ { 5/ {
6 compatible = "brcm,bcm93384wvg", "brcm,bcm3384"; 6 compatible = "brcm,bcm93384wvg", "brcm,bcm3384";
@@ -10,13 +10,6 @@
10 bootargs = "console=ttyS0,115200"; 10 bootargs = "console=ttyS0,115200";
11 stdout-path = &uart0; 11 stdout-path = &uart0;
12 }; 12 };
13
14 memory@0 {
15 device_type = "memory";
16 reg = <0x0 0x04000000>;
17 dma-xor-mask = <0x08000000>;
18 dma-xor-limit = <0x0fffffff>;
19 };
20}; 13};
21 14
22&uart0 { 15&uart0 {