diff options
author | Krzysztof Kozlowski <k.kozlowski.k@gmail.com> | 2015-07-15 08:59:52 -0400 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2015-07-16 16:39:30 -0400 |
commit | cceb433a1e2930301b33c79016eff147eb555cea (patch) | |
tree | 7751f4bcde4487c7bda83e8e1c59721b6e2c67c3 | |
parent | bc1aadc18621ccf93fb33ecbb847b422c354899d (diff) |
mfd/extcon: max77693: Rename defines to allow inclusion with max77843
Add MAX77693 prefix to some of the defines used in max77693 extcon
driver so the max77693-private.h can be included simultaneously with
max77843-private.h.
Additionally use BIT() macro in header.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | drivers/extcon/extcon-max77693.c | 72 | ||||
-rw-r--r-- | include/linux/mfd/max77693-private.h | 102 |
2 files changed, 89 insertions, 85 deletions
diff --git a/drivers/extcon/extcon-max77693.c b/drivers/extcon/extcon-max77693.c index c7bb180cfff4..35b9e118b2fb 100644 --- a/drivers/extcon/extcon-max77693.c +++ b/drivers/extcon/extcon-max77693.c | |||
@@ -43,7 +43,7 @@ static struct max77693_reg_data default_init_data[] = { | |||
43 | { | 43 | { |
44 | /* STATUS2 - [3]ChgDetRun */ | 44 | /* STATUS2 - [3]ChgDetRun */ |
45 | .addr = MAX77693_MUIC_REG_STATUS2, | 45 | .addr = MAX77693_MUIC_REG_STATUS2, |
46 | .data = STATUS2_CHGDETRUN_MASK, | 46 | .data = MAX77693_STATUS2_CHGDETRUN_MASK, |
47 | }, { | 47 | }, { |
48 | /* INTMASK1 - Unmask [3]ADC1KM,[0]ADCM */ | 48 | /* INTMASK1 - Unmask [3]ADC1KM,[0]ADCM */ |
49 | .addr = MAX77693_MUIC_REG_INTMASK1, | 49 | .addr = MAX77693_MUIC_REG_INTMASK1, |
@@ -236,7 +236,7 @@ static int max77693_muic_set_debounce_time(struct max77693_muic_info *info, | |||
236 | */ | 236 | */ |
237 | ret = regmap_write(info->max77693->regmap_muic, | 237 | ret = regmap_write(info->max77693->regmap_muic, |
238 | MAX77693_MUIC_REG_CTRL3, | 238 | MAX77693_MUIC_REG_CTRL3, |
239 | time << CONTROL3_ADCDBSET_SHIFT); | 239 | time << MAX77693_CONTROL3_ADCDBSET_SHIFT); |
240 | if (ret) { | 240 | if (ret) { |
241 | dev_err(info->dev, "failed to set ADC debounce time\n"); | 241 | dev_err(info->dev, "failed to set ADC debounce time\n"); |
242 | return ret; | 242 | return ret; |
@@ -269,7 +269,7 @@ static int max77693_muic_set_path(struct max77693_muic_info *info, | |||
269 | if (attached) | 269 | if (attached) |
270 | ctrl1 = val; | 270 | ctrl1 = val; |
271 | else | 271 | else |
272 | ctrl1 = CONTROL1_SW_OPEN; | 272 | ctrl1 = MAX77693_CONTROL1_SW_OPEN; |
273 | 273 | ||
274 | ret = regmap_update_bits(info->max77693->regmap_muic, | 274 | ret = regmap_update_bits(info->max77693->regmap_muic, |
275 | MAX77693_MUIC_REG_CTRL1, COMP_SW_MASK, ctrl1); | 275 | MAX77693_MUIC_REG_CTRL1, COMP_SW_MASK, ctrl1); |
@@ -279,13 +279,14 @@ static int max77693_muic_set_path(struct max77693_muic_info *info, | |||
279 | } | 279 | } |
280 | 280 | ||
281 | if (attached) | 281 | if (attached) |
282 | ctrl2 |= CONTROL2_CPEN_MASK; /* LowPwr=0, CPEn=1 */ | 282 | ctrl2 |= MAX77693_CONTROL2_CPEN_MASK; /* LowPwr=0, CPEn=1 */ |
283 | else | 283 | else |
284 | ctrl2 |= CONTROL2_LOWPWR_MASK; /* LowPwr=1, CPEn=0 */ | 284 | ctrl2 |= MAX77693_CONTROL2_LOWPWR_MASK; /* LowPwr=1, CPEn=0 */ |
285 | 285 | ||
286 | ret = regmap_update_bits(info->max77693->regmap_muic, | 286 | ret = regmap_update_bits(info->max77693->regmap_muic, |
287 | MAX77693_MUIC_REG_CTRL2, | 287 | MAX77693_MUIC_REG_CTRL2, |
288 | CONTROL2_LOWPWR_MASK | CONTROL2_CPEN_MASK, ctrl2); | 288 | MAX77693_CONTROL2_LOWPWR_MASK | MAX77693_CONTROL2_CPEN_MASK, |
289 | ctrl2); | ||
289 | if (ret < 0) { | 290 | if (ret < 0) { |
290 | dev_err(info->dev, "failed to update MUIC register\n"); | 291 | dev_err(info->dev, "failed to update MUIC register\n"); |
291 | return ret; | 292 | return ret; |
@@ -327,8 +328,8 @@ static int max77693_muic_get_cable_type(struct max77693_muic_info *info, | |||
327 | * Read ADC value to check cable type and decide cable state | 328 | * Read ADC value to check cable type and decide cable state |
328 | * according to cable type | 329 | * according to cable type |
329 | */ | 330 | */ |
330 | adc = info->status[0] & STATUS1_ADC_MASK; | 331 | adc = info->status[0] & MAX77693_STATUS1_ADC_MASK; |
331 | adc >>= STATUS1_ADC_SHIFT; | 332 | adc >>= MAX77693_STATUS1_ADC_SHIFT; |
332 | 333 | ||
333 | /* | 334 | /* |
334 | * Check current cable state/cable type and store cable type | 335 | * Check current cable state/cable type and store cable type |
@@ -351,8 +352,8 @@ static int max77693_muic_get_cable_type(struct max77693_muic_info *info, | |||
351 | * Read ADC value to check cable type and decide cable state | 352 | * Read ADC value to check cable type and decide cable state |
352 | * according to cable type | 353 | * according to cable type |
353 | */ | 354 | */ |
354 | adc = info->status[0] & STATUS1_ADC_MASK; | 355 | adc = info->status[0] & MAX77693_STATUS1_ADC_MASK; |
355 | adc >>= STATUS1_ADC_SHIFT; | 356 | adc >>= MAX77693_STATUS1_ADC_SHIFT; |
356 | 357 | ||
357 | /* | 358 | /* |
358 | * Check current cable state/cable type and store cable type | 359 | * Check current cable state/cable type and store cable type |
@@ -367,13 +368,13 @@ static int max77693_muic_get_cable_type(struct max77693_muic_info *info, | |||
367 | } else { | 368 | } else { |
368 | *attached = true; | 369 | *attached = true; |
369 | 370 | ||
370 | adclow = info->status[0] & STATUS1_ADCLOW_MASK; | 371 | adclow = info->status[0] & MAX77693_STATUS1_ADCLOW_MASK; |
371 | adclow >>= STATUS1_ADCLOW_SHIFT; | 372 | adclow >>= MAX77693_STATUS1_ADCLOW_SHIFT; |
372 | adc1k = info->status[0] & STATUS1_ADC1K_MASK; | 373 | adc1k = info->status[0] & MAX77693_STATUS1_ADC1K_MASK; |
373 | adc1k >>= STATUS1_ADC1K_SHIFT; | 374 | adc1k >>= MAX77693_STATUS1_ADC1K_SHIFT; |
374 | 375 | ||
375 | vbvolt = info->status[1] & STATUS2_VBVOLT_MASK; | 376 | vbvolt = info->status[1] & MAX77693_STATUS2_VBVOLT_MASK; |
376 | vbvolt >>= STATUS2_VBVOLT_SHIFT; | 377 | vbvolt >>= MAX77693_STATUS2_VBVOLT_SHIFT; |
377 | 378 | ||
378 | /** | 379 | /** |
379 | * [0x1|VBVolt|ADCLow|ADC1K] | 380 | * [0x1|VBVolt|ADCLow|ADC1K] |
@@ -398,8 +399,8 @@ static int max77693_muic_get_cable_type(struct max77693_muic_info *info, | |||
398 | * Read charger type to check cable type and decide cable state | 399 | * Read charger type to check cable type and decide cable state |
399 | * according to type of charger cable. | 400 | * according to type of charger cable. |
400 | */ | 401 | */ |
401 | chg_type = info->status[1] & STATUS2_CHGTYP_MASK; | 402 | chg_type = info->status[1] & MAX77693_STATUS2_CHGTYP_MASK; |
402 | chg_type >>= STATUS2_CHGTYP_SHIFT; | 403 | chg_type >>= MAX77693_STATUS2_CHGTYP_SHIFT; |
403 | 404 | ||
404 | if (chg_type == MAX77693_CHARGER_TYPE_NONE) { | 405 | if (chg_type == MAX77693_CHARGER_TYPE_NONE) { |
405 | *attached = false; | 406 | *attached = false; |
@@ -423,10 +424,10 @@ static int max77693_muic_get_cable_type(struct max77693_muic_info *info, | |||
423 | * Read ADC value to check cable type and decide cable state | 424 | * Read ADC value to check cable type and decide cable state |
424 | * according to cable type | 425 | * according to cable type |
425 | */ | 426 | */ |
426 | adc = info->status[0] & STATUS1_ADC_MASK; | 427 | adc = info->status[0] & MAX77693_STATUS1_ADC_MASK; |
427 | adc >>= STATUS1_ADC_SHIFT; | 428 | adc >>= MAX77693_STATUS1_ADC_SHIFT; |
428 | chg_type = info->status[1] & STATUS2_CHGTYP_MASK; | 429 | chg_type = info->status[1] & MAX77693_STATUS2_CHGTYP_MASK; |
429 | chg_type >>= STATUS2_CHGTYP_SHIFT; | 430 | chg_type >>= MAX77693_STATUS2_CHGTYP_SHIFT; |
430 | 431 | ||
431 | if (adc == MAX77693_MUIC_ADC_OPEN | 432 | if (adc == MAX77693_MUIC_ADC_OPEN |
432 | && chg_type == MAX77693_CHARGER_TYPE_NONE) | 433 | && chg_type == MAX77693_CHARGER_TYPE_NONE) |
@@ -438,8 +439,8 @@ static int max77693_muic_get_cable_type(struct max77693_muic_info *info, | |||
438 | * Read vbvolt field, if vbvolt is 1, | 439 | * Read vbvolt field, if vbvolt is 1, |
439 | * this cable is used for charging. | 440 | * this cable is used for charging. |
440 | */ | 441 | */ |
441 | vbvolt = info->status[1] & STATUS2_VBVOLT_MASK; | 442 | vbvolt = info->status[1] & MAX77693_STATUS2_VBVOLT_MASK; |
442 | vbvolt >>= STATUS2_VBVOLT_SHIFT; | 443 | vbvolt >>= MAX77693_STATUS2_VBVOLT_SHIFT; |
443 | 444 | ||
444 | cable_type = vbvolt; | 445 | cable_type = vbvolt; |
445 | break; | 446 | break; |
@@ -521,7 +522,8 @@ static int max77693_muic_dock_handler(struct max77693_muic_info *info, | |||
521 | } | 522 | } |
522 | 523 | ||
523 | /* Dock-Car/Desk/Audio, PATH:AUDIO */ | 524 | /* Dock-Car/Desk/Audio, PATH:AUDIO */ |
524 | ret = max77693_muic_set_path(info, CONTROL1_SW_AUDIO, attached); | 525 | ret = max77693_muic_set_path(info, MAX77693_CONTROL1_SW_AUDIO, |
526 | attached); | ||
525 | if (ret < 0) | 527 | if (ret < 0) |
526 | return ret; | 528 | return ret; |
527 | extcon_set_cable_state_(info->edev, dock_id, attached); | 529 | extcon_set_cable_state_(info->edev, dock_id, attached); |
@@ -586,14 +588,16 @@ static int max77693_muic_adc_ground_handler(struct max77693_muic_info *info) | |||
586 | case MAX77693_MUIC_GND_USB_HOST: | 588 | case MAX77693_MUIC_GND_USB_HOST: |
587 | case MAX77693_MUIC_GND_USB_HOST_VB: | 589 | case MAX77693_MUIC_GND_USB_HOST_VB: |
588 | /* USB_HOST, PATH: AP_USB */ | 590 | /* USB_HOST, PATH: AP_USB */ |
589 | ret = max77693_muic_set_path(info, CONTROL1_SW_USB, attached); | 591 | ret = max77693_muic_set_path(info, MAX77693_CONTROL1_SW_USB, |
592 | attached); | ||
590 | if (ret < 0) | 593 | if (ret < 0) |
591 | return ret; | 594 | return ret; |
592 | extcon_set_cable_state_(info->edev, EXTCON_USB_HOST, attached); | 595 | extcon_set_cable_state_(info->edev, EXTCON_USB_HOST, attached); |
593 | break; | 596 | break; |
594 | case MAX77693_MUIC_GND_AV_CABLE_LOAD: | 597 | case MAX77693_MUIC_GND_AV_CABLE_LOAD: |
595 | /* Audio Video Cable with load, PATH:AUDIO */ | 598 | /* Audio Video Cable with load, PATH:AUDIO */ |
596 | ret = max77693_muic_set_path(info, CONTROL1_SW_AUDIO, attached); | 599 | ret = max77693_muic_set_path(info, MAX77693_CONTROL1_SW_AUDIO, |
600 | attached); | ||
597 | if (ret < 0) | 601 | if (ret < 0) |
598 | return ret; | 602 | return ret; |
599 | extcon_set_cable_state_(info->edev, EXTCON_USB, attached); | 603 | extcon_set_cable_state_(info->edev, EXTCON_USB, attached); |
@@ -616,7 +620,7 @@ static int max77693_muic_jig_handler(struct max77693_muic_info *info, | |||
616 | int cable_type, bool attached) | 620 | int cable_type, bool attached) |
617 | { | 621 | { |
618 | int ret = 0; | 622 | int ret = 0; |
619 | u8 path = CONTROL1_SW_OPEN; | 623 | u8 path = MAX77693_CONTROL1_SW_OPEN; |
620 | 624 | ||
621 | dev_info(info->dev, | 625 | dev_info(info->dev, |
622 | "external connector is %s (adc:0x%02x)\n", | 626 | "external connector is %s (adc:0x%02x)\n", |
@@ -626,12 +630,12 @@ static int max77693_muic_jig_handler(struct max77693_muic_info *info, | |||
626 | case MAX77693_MUIC_ADC_FACTORY_MODE_USB_OFF: /* ADC_JIG_USB_OFF */ | 630 | case MAX77693_MUIC_ADC_FACTORY_MODE_USB_OFF: /* ADC_JIG_USB_OFF */ |
627 | case MAX77693_MUIC_ADC_FACTORY_MODE_USB_ON: /* ADC_JIG_USB_ON */ | 631 | case MAX77693_MUIC_ADC_FACTORY_MODE_USB_ON: /* ADC_JIG_USB_ON */ |
628 | /* PATH:AP_USB */ | 632 | /* PATH:AP_USB */ |
629 | path = CONTROL1_SW_USB; | 633 | path = MAX77693_CONTROL1_SW_USB; |
630 | break; | 634 | break; |
631 | case MAX77693_MUIC_ADC_FACTORY_MODE_UART_OFF: /* ADC_JIG_UART_OFF */ | 635 | case MAX77693_MUIC_ADC_FACTORY_MODE_UART_OFF: /* ADC_JIG_UART_OFF */ |
632 | case MAX77693_MUIC_ADC_FACTORY_MODE_UART_ON: /* ADC_JIG_UART_ON */ | 636 | case MAX77693_MUIC_ADC_FACTORY_MODE_UART_ON: /* ADC_JIG_UART_ON */ |
633 | /* PATH:AP_UART */ | 637 | /* PATH:AP_UART */ |
634 | path = CONTROL1_SW_UART; | 638 | path = MAX77693_CONTROL1_SW_UART; |
635 | break; | 639 | break; |
636 | default: | 640 | default: |
637 | dev_err(info->dev, "failed to detect %s jig cable\n", | 641 | dev_err(info->dev, "failed to detect %s jig cable\n", |
@@ -1181,12 +1185,12 @@ static int max77693_muic_probe(struct platform_device *pdev) | |||
1181 | if (muic_pdata->path_uart) | 1185 | if (muic_pdata->path_uart) |
1182 | info->path_uart = muic_pdata->path_uart; | 1186 | info->path_uart = muic_pdata->path_uart; |
1183 | else | 1187 | else |
1184 | info->path_uart = CONTROL1_SW_UART; | 1188 | info->path_uart = MAX77693_CONTROL1_SW_UART; |
1185 | 1189 | ||
1186 | if (muic_pdata->path_usb) | 1190 | if (muic_pdata->path_usb) |
1187 | info->path_usb = muic_pdata->path_usb; | 1191 | info->path_usb = muic_pdata->path_usb; |
1188 | else | 1192 | else |
1189 | info->path_usb = CONTROL1_SW_USB; | 1193 | info->path_usb = MAX77693_CONTROL1_SW_USB; |
1190 | 1194 | ||
1191 | /* | 1195 | /* |
1192 | * Default delay time for detecting cable state | 1196 | * Default delay time for detecting cable state |
@@ -1198,8 +1202,8 @@ static int max77693_muic_probe(struct platform_device *pdev) | |||
1198 | else | 1202 | else |
1199 | delay_jiffies = msecs_to_jiffies(DELAY_MS_DEFAULT); | 1203 | delay_jiffies = msecs_to_jiffies(DELAY_MS_DEFAULT); |
1200 | } else { | 1204 | } else { |
1201 | info->path_usb = CONTROL1_SW_USB; | 1205 | info->path_usb = MAX77693_CONTROL1_SW_USB; |
1202 | info->path_uart = CONTROL1_SW_UART; | 1206 | info->path_uart = MAX77693_CONTROL1_SW_UART; |
1203 | delay_jiffies = msecs_to_jiffies(DELAY_MS_DEFAULT); | 1207 | delay_jiffies = msecs_to_jiffies(DELAY_MS_DEFAULT); |
1204 | } | 1208 | } |
1205 | 1209 | ||
diff --git a/include/linux/mfd/max77693-private.h b/include/linux/mfd/max77693-private.h index 8c4143c0c651..3c7a63b98ad6 100644 --- a/include/linux/mfd/max77693-private.h +++ b/include/linux/mfd/max77693-private.h | |||
@@ -310,30 +310,30 @@ enum max77693_muic_reg { | |||
310 | #define INTMASK2_CHGTYP_MASK (1 << INTMASK2_CHGTYP_SHIFT) | 310 | #define INTMASK2_CHGTYP_MASK (1 << INTMASK2_CHGTYP_SHIFT) |
311 | 311 | ||
312 | /* MAX77693 MUIC - STATUS1~3 Register */ | 312 | /* MAX77693 MUIC - STATUS1~3 Register */ |
313 | #define STATUS1_ADC_SHIFT (0) | 313 | #define MAX77693_STATUS1_ADC_SHIFT 0 |
314 | #define STATUS1_ADCLOW_SHIFT (5) | 314 | #define MAX77693_STATUS1_ADCLOW_SHIFT 5 |
315 | #define STATUS1_ADCERR_SHIFT (6) | 315 | #define MAX77693_STATUS1_ADCERR_SHIFT 6 |
316 | #define STATUS1_ADC1K_SHIFT (7) | 316 | #define MAX77693_STATUS1_ADC1K_SHIFT 7 |
317 | #define STATUS1_ADC_MASK (0x1f << STATUS1_ADC_SHIFT) | 317 | #define MAX77693_STATUS1_ADC_MASK (0x1f << MAX77693_STATUS1_ADC_SHIFT) |
318 | #define STATUS1_ADCLOW_MASK (0x1 << STATUS1_ADCLOW_SHIFT) | 318 | #define MAX77693_STATUS1_ADCLOW_MASK BIT(MAX77693_STATUS1_ADCLOW_SHIFT) |
319 | #define STATUS1_ADCERR_MASK (0x1 << STATUS1_ADCERR_SHIFT) | 319 | #define MAX77693_STATUS1_ADCERR_MASK BIT(MAX77693_STATUS1_ADCERR_SHIFT) |
320 | #define STATUS1_ADC1K_MASK (0x1 << STATUS1_ADC1K_SHIFT) | 320 | #define MAX77693_STATUS1_ADC1K_MASK BIT(MAX77693_STATUS1_ADC1K_SHIFT) |
321 | 321 | ||
322 | #define STATUS2_CHGTYP_SHIFT (0) | 322 | #define MAX77693_STATUS2_CHGTYP_SHIFT 0 |
323 | #define STATUS2_CHGDETRUN_SHIFT (3) | 323 | #define MAX77693_STATUS2_CHGDETRUN_SHIFT 3 |
324 | #define STATUS2_DCDTMR_SHIFT (4) | 324 | #define MAX77693_STATUS2_DCDTMR_SHIFT 4 |
325 | #define STATUS2_DXOVP_SHIFT (5) | 325 | #define MAX77693_STATUS2_DXOVP_SHIFT 5 |
326 | #define STATUS2_VBVOLT_SHIFT (6) | 326 | #define MAX77693_STATUS2_VBVOLT_SHIFT 6 |
327 | #define STATUS2_VIDRM_SHIFT (7) | 327 | #define MAX77693_STATUS2_VIDRM_SHIFT 7 |
328 | #define STATUS2_CHGTYP_MASK (0x7 << STATUS2_CHGTYP_SHIFT) | 328 | #define MAX77693_STATUS2_CHGTYP_MASK (0x7 << MAX77693_STATUS2_CHGTYP_SHIFT) |
329 | #define STATUS2_CHGDETRUN_MASK (0x1 << STATUS2_CHGDETRUN_SHIFT) | 329 | #define MAX77693_STATUS2_CHGDETRUN_MASK BIT(MAX77693_STATUS2_CHGDETRUN_SHIFT) |
330 | #define STATUS2_DCDTMR_MASK (0x1 << STATUS2_DCDTMR_SHIFT) | 330 | #define MAX77693_STATUS2_DCDTMR_MASK BIT(MAX77693_STATUS2_DCDTMR_SHIFT) |
331 | #define STATUS2_DXOVP_MASK (0x1 << STATUS2_DXOVP_SHIFT) | 331 | #define MAX77693_STATUS2_DXOVP_MASK BIT(MAX77693_STATUS2_DXOVP_SHIFT) |
332 | #define STATUS2_VBVOLT_MASK (0x1 << STATUS2_VBVOLT_SHIFT) | 332 | #define MAX77693_STATUS2_VBVOLT_MASK BIT(MAX77693_STATUS2_VBVOLT_SHIFT) |
333 | #define STATUS2_VIDRM_MASK (0x1 << STATUS2_VIDRM_SHIFT) | 333 | #define MAX77693_STATUS2_VIDRM_MASK BIT(MAX77693_STATUS2_VIDRM_SHIFT) |
334 | 334 | ||
335 | #define STATUS3_OVP_SHIFT (2) | 335 | #define MAX77693_STATUS3_OVP_SHIFT 2 |
336 | #define STATUS3_OVP_MASK (0x1 << STATUS3_OVP_SHIFT) | 336 | #define MAX77693_STATUS3_OVP_MASK BIT(MAX77693_STATUS3_OVP_SHIFT) |
337 | 337 | ||
338 | /* MAX77693 CDETCTRL1~2 register */ | 338 | /* MAX77693 CDETCTRL1~2 register */ |
339 | #define CDETCTRL1_CHGDETEN_SHIFT (0) | 339 | #define CDETCTRL1_CHGDETEN_SHIFT (0) |
@@ -362,38 +362,38 @@ enum max77693_muic_reg { | |||
362 | #define COMN1SW_MASK (0x7 << COMN1SW_SHIFT) | 362 | #define COMN1SW_MASK (0x7 << COMN1SW_SHIFT) |
363 | #define COMP2SW_MASK (0x7 << COMP2SW_SHIFT) | 363 | #define COMP2SW_MASK (0x7 << COMP2SW_SHIFT) |
364 | #define COMP_SW_MASK (COMP2SW_MASK | COMN1SW_MASK) | 364 | #define COMP_SW_MASK (COMP2SW_MASK | COMN1SW_MASK) |
365 | #define CONTROL1_SW_USB ((1 << COMP2SW_SHIFT) \ | 365 | #define MAX77693_CONTROL1_SW_USB ((1 << COMP2SW_SHIFT) \ |
366 | | (1 << COMN1SW_SHIFT)) | 366 | | (1 << COMN1SW_SHIFT)) |
367 | #define CONTROL1_SW_AUDIO ((2 << COMP2SW_SHIFT) \ | 367 | #define MAX77693_CONTROL1_SW_AUDIO ((2 << COMP2SW_SHIFT) \ |
368 | | (2 << COMN1SW_SHIFT)) | 368 | | (2 << COMN1SW_SHIFT)) |
369 | #define CONTROL1_SW_UART ((3 << COMP2SW_SHIFT) \ | 369 | #define MAX77693_CONTROL1_SW_UART ((3 << COMP2SW_SHIFT) \ |
370 | | (3 << COMN1SW_SHIFT)) | 370 | | (3 << COMN1SW_SHIFT)) |
371 | #define CONTROL1_SW_OPEN ((0 << COMP2SW_SHIFT) \ | 371 | #define MAX77693_CONTROL1_SW_OPEN ((0 << COMP2SW_SHIFT) \ |
372 | | (0 << COMN1SW_SHIFT)) | 372 | | (0 << COMN1SW_SHIFT)) |
373 | 373 | ||
374 | #define CONTROL2_LOWPWR_SHIFT (0) | 374 | #define MAX77693_CONTROL2_LOWPWR_SHIFT 0 |
375 | #define CONTROL2_ADCEN_SHIFT (1) | 375 | #define MAX77693_CONTROL2_ADCEN_SHIFT 1 |
376 | #define CONTROL2_CPEN_SHIFT (2) | 376 | #define MAX77693_CONTROL2_CPEN_SHIFT 2 |
377 | #define CONTROL2_SFOUTASRT_SHIFT (3) | 377 | #define MAX77693_CONTROL2_SFOUTASRT_SHIFT 3 |
378 | #define CONTROL2_SFOUTORD_SHIFT (4) | 378 | #define MAX77693_CONTROL2_SFOUTORD_SHIFT 4 |
379 | #define CONTROL2_ACCDET_SHIFT (5) | 379 | #define MAX77693_CONTROL2_ACCDET_SHIFT 5 |
380 | #define CONTROL2_USBCPINT_SHIFT (6) | 380 | #define MAX77693_CONTROL2_USBCPINT_SHIFT 6 |
381 | #define CONTROL2_RCPS_SHIFT (7) | 381 | #define MAX77693_CONTROL2_RCPS_SHIFT 7 |
382 | #define CONTROL2_LOWPWR_MASK (0x1 << CONTROL2_LOWPWR_SHIFT) | 382 | #define MAX77693_CONTROL2_LOWPWR_MASK BIT(MAX77693_CONTROL2_LOWPWR_SHIFT) |
383 | #define CONTROL2_ADCEN_MASK (0x1 << CONTROL2_ADCEN_SHIFT) | 383 | #define MAX77693_CONTROL2_ADCEN_MASK BIT(MAX77693_CONTROL2_ADCEN_SHIFT) |
384 | #define CONTROL2_CPEN_MASK (0x1 << CONTROL2_CPEN_SHIFT) | 384 | #define MAX77693_CONTROL2_CPEN_MASK BIT(MAX77693_CONTROL2_CPEN_SHIFT) |
385 | #define CONTROL2_SFOUTASRT_MASK (0x1 << CONTROL2_SFOUTASRT_SHIFT) | 385 | #define MAX77693_CONTROL2_SFOUTASRT_MASK BIT(MAX77693_CONTROL2_SFOUTASRT_SHIFT) |
386 | #define CONTROL2_SFOUTORD_MASK (0x1 << CONTROL2_SFOUTORD_SHIFT) | 386 | #define MAX77693_CONTROL2_SFOUTORD_MASK BIT(MAX77693_CONTROL2_SFOUTORD_SHIFT) |
387 | #define CONTROL2_ACCDET_MASK (0x1 << CONTROL2_ACCDET_SHIFT) | 387 | #define MAX77693_CONTROL2_ACCDET_MASK BIT(MAX77693_CONTROL2_ACCDET_SHIFT) |
388 | #define CONTROL2_USBCPINT_MASK (0x1 << CONTROL2_USBCPINT_SHIFT) | 388 | #define MAX77693_CONTROL2_USBCPINT_MASK BIT(MAX77693_CONTROL2_USBCPINT_SHIFT) |
389 | #define CONTROL2_RCPS_MASK (0x1 << CONTROL2_RCPS_SHIFT) | 389 | #define MAX77693_CONTROL2_RCPS_MASK BIT(MAX77693_CONTROL2_RCPS_SHIFT) |
390 | 390 | ||
391 | #define CONTROL3_JIGSET_SHIFT (0) | 391 | #define MAX77693_CONTROL3_JIGSET_SHIFT 0 |
392 | #define CONTROL3_BTLDSET_SHIFT (2) | 392 | #define MAX77693_CONTROL3_BTLDSET_SHIFT 2 |
393 | #define CONTROL3_ADCDBSET_SHIFT (4) | 393 | #define MAX77693_CONTROL3_ADCDBSET_SHIFT 4 |
394 | #define CONTROL3_JIGSET_MASK (0x3 << CONTROL3_JIGSET_SHIFT) | 394 | #define MAX77693_CONTROL3_JIGSET_MASK (0x3 << MAX77693_CONTROL3_JIGSET_SHIFT) |
395 | #define CONTROL3_BTLDSET_MASK (0x3 << CONTROL3_BTLDSET_SHIFT) | 395 | #define MAX77693_CONTROL3_BTLDSET_MASK (0x3 << MAX77693_CONTROL3_BTLDSET_SHIFT) |
396 | #define CONTROL3_ADCDBSET_MASK (0x3 << CONTROL3_ADCDBSET_SHIFT) | 396 | #define MAX77693_CONTROL3_ADCDBSET_MASK (0x3 << MAX77693_CONTROL3_ADCDBSET_SHIFT) |
397 | 397 | ||
398 | /* Slave addr = 0x90: Haptic */ | 398 | /* Slave addr = 0x90: Haptic */ |
399 | enum max77693_haptic_reg { | 399 | enum max77693_haptic_reg { |