diff options
author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2016-09-22 17:00:31 -0400 |
---|---|---|
committer | Jani Nikula <jani.nikula@intel.com> | 2016-10-10 09:06:38 -0400 |
commit | ccc1057477bc99678896b51adce6b6ee4019dc37 (patch) | |
tree | 1519ed814b05700473707c0f129fa75c1b18552a | |
parent | 4e4d3814a9bb4d71cd3ff0701d8d7041edefd8f0 (diff) |
drm/i915/gen9: minimum scanlines for Y tile is not always 4
During watermarks calculations, this value is used in 3 different
places. Only one of them was not using a hardcoded 4. Move the code up
so everybody can benefit from the actual value.
This should only help on situations with Y tiling + 90/270 rotation +
1 or 2 bpp or NV12.
Cc: stable@vger.kernel.org
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1474578035-424-6-git-send-email-paulo.r.zanoni@intel.com
(cherry picked from commit 1186fa85eb9b3cc0589990fbc39617e50e38759a)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 56 |
1 files changed, 32 insertions, 24 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index c90be917deae..32ce9365d763 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -3495,7 +3495,8 @@ static uint32_t skl_wm_method1(uint32_t pixel_rate, uint8_t cpp, uint32_t latenc | |||
3495 | 3495 | ||
3496 | static uint32_t skl_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal, | 3496 | static uint32_t skl_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal, |
3497 | uint32_t horiz_pixels, uint8_t cpp, | 3497 | uint32_t horiz_pixels, uint8_t cpp, |
3498 | uint64_t tiling, uint32_t latency) | 3498 | uint64_t tiling, uint32_t latency, |
3499 | uint32_t y_min_scanlines) | ||
3499 | { | 3500 | { |
3500 | uint32_t ret; | 3501 | uint32_t ret; |
3501 | uint32_t plane_bytes_per_line, plane_blocks_per_line; | 3502 | uint32_t plane_bytes_per_line, plane_blocks_per_line; |
@@ -3508,9 +3509,9 @@ static uint32_t skl_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal, | |||
3508 | 3509 | ||
3509 | if (tiling == I915_FORMAT_MOD_Y_TILED || | 3510 | if (tiling == I915_FORMAT_MOD_Y_TILED || |
3510 | tiling == I915_FORMAT_MOD_Yf_TILED) { | 3511 | tiling == I915_FORMAT_MOD_Yf_TILED) { |
3511 | plane_bytes_per_line *= 4; | 3512 | plane_bytes_per_line *= y_min_scanlines; |
3512 | plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512); | 3513 | plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512); |
3513 | plane_blocks_per_line /= 4; | 3514 | plane_blocks_per_line /= y_min_scanlines; |
3514 | } else if (tiling == DRM_FORMAT_MOD_NONE) { | 3515 | } else if (tiling == DRM_FORMAT_MOD_NONE) { |
3515 | plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512) + 1; | 3516 | plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512) + 1; |
3516 | } else { | 3517 | } else { |
@@ -3567,6 +3568,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, | |||
3567 | uint8_t cpp; | 3568 | uint8_t cpp; |
3568 | uint32_t width = 0, height = 0; | 3569 | uint32_t width = 0, height = 0; |
3569 | uint32_t plane_pixel_rate; | 3570 | uint32_t plane_pixel_rate; |
3571 | uint32_t y_min_scanlines; | ||
3570 | 3572 | ||
3571 | if (latency == 0 || !cstate->base.active || !intel_pstate->base.visible) { | 3573 | if (latency == 0 || !cstate->base.active || !intel_pstate->base.visible) { |
3572 | *enabled = false; | 3574 | *enabled = false; |
@@ -3582,38 +3584,44 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, | |||
3582 | cpp = drm_format_plane_cpp(fb->pixel_format, 0); | 3584 | cpp = drm_format_plane_cpp(fb->pixel_format, 0); |
3583 | plane_pixel_rate = skl_adjusted_plane_pixel_rate(cstate, intel_pstate); | 3585 | plane_pixel_rate = skl_adjusted_plane_pixel_rate(cstate, intel_pstate); |
3584 | 3586 | ||
3587 | if (intel_rotation_90_or_270(pstate->rotation)) { | ||
3588 | int cpp = (fb->pixel_format == DRM_FORMAT_NV12) ? | ||
3589 | drm_format_plane_cpp(fb->pixel_format, 1) : | ||
3590 | drm_format_plane_cpp(fb->pixel_format, 0); | ||
3591 | |||
3592 | switch (cpp) { | ||
3593 | case 1: | ||
3594 | y_min_scanlines = 16; | ||
3595 | break; | ||
3596 | case 2: | ||
3597 | y_min_scanlines = 8; | ||
3598 | break; | ||
3599 | default: | ||
3600 | WARN(1, "Unsupported pixel depth for rotation"); | ||
3601 | case 4: | ||
3602 | y_min_scanlines = 4; | ||
3603 | break; | ||
3604 | } | ||
3605 | } else { | ||
3606 | y_min_scanlines = 4; | ||
3607 | } | ||
3608 | |||
3585 | method1 = skl_wm_method1(plane_pixel_rate, cpp, latency); | 3609 | method1 = skl_wm_method1(plane_pixel_rate, cpp, latency); |
3586 | method2 = skl_wm_method2(plane_pixel_rate, | 3610 | method2 = skl_wm_method2(plane_pixel_rate, |
3587 | cstate->base.adjusted_mode.crtc_htotal, | 3611 | cstate->base.adjusted_mode.crtc_htotal, |
3588 | width, | 3612 | width, |
3589 | cpp, | 3613 | cpp, |
3590 | fb->modifier[0], | 3614 | fb->modifier[0], |
3591 | latency); | 3615 | latency, |
3616 | y_min_scanlines); | ||
3592 | 3617 | ||
3593 | plane_bytes_per_line = width * cpp; | 3618 | plane_bytes_per_line = width * cpp; |
3594 | plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512); | 3619 | plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512); |
3595 | 3620 | ||
3596 | if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED || | 3621 | if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED || |
3597 | fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) { | 3622 | fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) { |
3598 | uint32_t min_scanlines = 4; | 3623 | uint32_t y_tile_minimum = plane_blocks_per_line * |
3599 | uint32_t y_tile_minimum; | 3624 | y_min_scanlines; |
3600 | if (intel_rotation_90_or_270(pstate->rotation)) { | ||
3601 | int cpp = (fb->pixel_format == DRM_FORMAT_NV12) ? | ||
3602 | drm_format_plane_cpp(fb->pixel_format, 1) : | ||
3603 | drm_format_plane_cpp(fb->pixel_format, 0); | ||
3604 | |||
3605 | switch (cpp) { | ||
3606 | case 1: | ||
3607 | min_scanlines = 16; | ||
3608 | break; | ||
3609 | case 2: | ||
3610 | min_scanlines = 8; | ||
3611 | break; | ||
3612 | case 8: | ||
3613 | WARN(1, "Unsupported pixel depth for rotation"); | ||
3614 | } | ||
3615 | } | ||
3616 | y_tile_minimum = plane_blocks_per_line * min_scanlines; | ||
3617 | selected_result = max(method2, y_tile_minimum); | 3625 | selected_result = max(method2, y_tile_minimum); |
3618 | } else { | 3626 | } else { |
3619 | if ((ddb_allocation / plane_blocks_per_line) >= 1) | 3627 | if ((ddb_allocation / plane_blocks_per_line) >= 1) |
@@ -3628,7 +3636,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, | |||
3628 | if (level >= 1 && level <= 7) { | 3636 | if (level >= 1 && level <= 7) { |
3629 | if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED || | 3637 | if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED || |
3630 | fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) | 3638 | fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) |
3631 | res_lines += 4; | 3639 | res_lines += y_min_scanlines; |
3632 | else | 3640 | else |
3633 | res_blocks++; | 3641 | res_blocks++; |
3634 | } | 3642 | } |