drm/amd/display: Fix 5th display lightup on Vega10

- fixing bug in calculation of reg offset for D5VGA_CONTROL

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
index 245356e72b36..dc8eeac6ac96 100644
--- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
@@ -410,7 +410,7 @@ void dce120_timing_generator_disable_vga(struct timing_generator *tg)
                 break;
         case CONTROLLER_ID_D4:
                 addr = mmD1VGA_CONTROL;
-                offset = mmD1VGA_CONTROL - mmD1VGA_CONTROL;
+                offset = mmD5VGA_CONTROL - mmD1VGA_CONTROL;
                 break;
         case CONTROLLER_ID_D5:
                 addr = mmD6VGA_CONTROL;