diff options
author | Gregory CLEMENT <gregory.clement@bootlin.com> | 2018-03-14 12:19:25 -0400 |
---|---|---|
committer | Gregory CLEMENT <gregory.clement@bootlin.com> | 2018-03-19 12:13:44 -0400 |
commit | cc4d5aed829a08c64240f43a9dc3a471989c6054 (patch) | |
tree | 01a320cdd7234b27907686e5a064cd53956f6098 | |
parent | f1ebfab99df1032166c531cd48f8f942d10fe190 (diff) |
ARM64: dts: marvell: armada-cp110: Add registers clock for the trng node
This extra clock is needed to access the registers of the harware RNG
used on CP110 component of the Armada 7K/8K SoCs.
This follow the changes already made in the binding documentation (as
well as in the driver): "hwrng: omap - Fix clock resource by adding a
register clock"
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
-rw-r--r-- | arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi index a51c553b5120..c491adc90b8c 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi | |||
@@ -375,7 +375,9 @@ | |||
375 | "inside-secure,safexcel-eip76"; | 375 | "inside-secure,safexcel-eip76"; |
376 | reg = <0x760000 0x7d>; | 376 | reg = <0x760000 0x7d>; |
377 | interrupts = <ICU_GRP_NSR 95 IRQ_TYPE_LEVEL_HIGH>; | 377 | interrupts = <ICU_GRP_NSR 95 IRQ_TYPE_LEVEL_HIGH>; |
378 | clocks = <&CP110_LABEL(clk) 1 25>; | 378 | clock-names = "core", "reg"; |
379 | clocks = <&CP110_LABEL(clk) 1 25>, | ||
380 | <&CP110_LABEL(clk) 1 17>; | ||
379 | status = "okay"; | 381 | status = "okay"; |
380 | }; | 382 | }; |
381 | 383 | ||