arm64: dts: ls1088a: add DT node of watchdog

There are eight cores in ls1088a and each core has an watchdog,
ls1088a can use sp805-wdt driver, so we just add DT node for it.

Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

1 files changed, 56 insertions, 0 deletions

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index 4fc150cd4ca5..8ff2688bdcad 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -612,6 +612,62 @@
                                         <0000 0 0 3 &gic 0 0 0 121 IRQ_TYPE_LEVEL_HIGH>,
                                         <0000 0 0 4 &gic 0 0 0 122 IRQ_TYPE_LEVEL_HIGH>;
                 };
+
+                cluster1_core0_watchdog: wdt@c000000 {
+                        compatible = "arm,sp805-wdt", "arm,primecell";
+                        reg = <0x0 0xc000000 0x0 0x1000>;
+                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+                        clock-names = "apb_pclk", "wdog_clk";
+                };
+
+                cluster1_core1_watchdog: wdt@c010000 {
+                        compatible = "arm,sp805-wdt", "arm,primecell";
+                        reg = <0x0 0xc010000 0x0 0x1000>;
+                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+                        clock-names = "apb_pclk", "wdog_clk";
+                };
+
+                cluster1_core2_watchdog: wdt@c020000 {
+                        compatible = "arm,sp805-wdt", "arm,primecell";
+                        reg = <0x0 0xc020000 0x0 0x1000>;
+                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+                        clock-names = "apb_pclk", "wdog_clk";
+                };
+
+                cluster1_core3_watchdog: wdt@c030000 {
+                        compatible = "arm,sp805-wdt", "arm,primecell";
+                        reg = <0x0 0xc030000 0x0 0x1000>;
+                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+                        clock-names = "apb_pclk", "wdog_clk";
+                };
+
+                cluster2_core0_watchdog: wdt@c100000 {
+                        compatible = "arm,sp805-wdt", "arm,primecell";
+                        reg = <0x0 0xc100000 0x0 0x1000>;
+                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+                        clock-names = "apb_pclk", "wdog_clk";
+                };
+
+                cluster2_core1_watchdog: wdt@c110000 {
+                        compatible = "arm,sp805-wdt", "arm,primecell";
+                        reg = <0x0 0xc110000 0x0 0x1000>;
+                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+                        clock-names = "apb_pclk", "wdog_clk";
+                };
+
+                cluster2_core2_watchdog: wdt@c120000 {
+                        compatible = "arm,sp805-wdt", "arm,primecell";
+                        reg = <0x0 0xc120000 0x0 0x1000>;
+                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+                        clock-names = "apb_pclk", "wdog_clk";
+                };
+
+                cluster2_core3_watchdog: wdt@c130000 {
+                        compatible = "arm,sp805-wdt", "arm,primecell";
+                        reg = <0x0 0xc130000 0x0 0x1000>;
+                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+                        clock-names = "apb_pclk", "wdog_clk";
+                };
         };
 
         firmware {