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authorBen Dooks <ben.dooks@codethink.co.uk>2016-06-17 13:08:10 -0400
committerKrzysztof Kozlowski <k.kozlowski@samsung.com>2016-06-20 03:43:34 -0400
commitcbf73175ebcee4d705cfcb1a467b6bdc893dea36 (patch)
treee6391b8eaf87042613c089af921edfe2a4161681
parent9479f7cc91879c6ba75e70da41c4c9fe7842b342 (diff)
memory: samsung: endian fixes for IO
Use the relaxed versions of the IO accessors to avoid any issues if running in big endian. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
-rw-r--r--drivers/memory/samsung/exynos-srom.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/memory/samsung/exynos-srom.c b/drivers/memory/samsung/exynos-srom.c
index 96756fb4d6bd..5714bdf447fa 100644
--- a/drivers/memory/samsung/exynos-srom.c
+++ b/drivers/memory/samsung/exynos-srom.c
@@ -91,17 +91,17 @@ static int exynos_srom_configure_bank(struct exynos_srom *srom,
91 if (width == 2) 91 if (width == 2)
92 cs |= 1 << EXYNOS_SROM_BW__DATAWIDTH__SHIFT; 92 cs |= 1 << EXYNOS_SROM_BW__DATAWIDTH__SHIFT;
93 93
94 bw = __raw_readl(srom->reg_base + EXYNOS_SROM_BW); 94 bw = readl_relaxed(srom->reg_base + EXYNOS_SROM_BW);
95 bw = (bw & ~(EXYNOS_SROM_BW__CS_MASK << bank)) | (cs << bank); 95 bw = (bw & ~(EXYNOS_SROM_BW__CS_MASK << bank)) | (cs << bank);
96 __raw_writel(bw, srom->reg_base + EXYNOS_SROM_BW); 96 writel_relaxed(bw, srom->reg_base + EXYNOS_SROM_BW);
97 97
98 __raw_writel(pmc | (timing[0] << EXYNOS_SROM_BCX__TACP__SHIFT) | 98 writel_relaxed(pmc | (timing[0] << EXYNOS_SROM_BCX__TACP__SHIFT) |
99 (timing[1] << EXYNOS_SROM_BCX__TCAH__SHIFT) | 99 (timing[1] << EXYNOS_SROM_BCX__TCAH__SHIFT) |
100 (timing[2] << EXYNOS_SROM_BCX__TCOH__SHIFT) | 100 (timing[2] << EXYNOS_SROM_BCX__TCOH__SHIFT) |
101 (timing[3] << EXYNOS_SROM_BCX__TACC__SHIFT) | 101 (timing[3] << EXYNOS_SROM_BCX__TACC__SHIFT) |
102 (timing[4] << EXYNOS_SROM_BCX__TCOS__SHIFT) | 102 (timing[4] << EXYNOS_SROM_BCX__TCOS__SHIFT) |
103 (timing[5] << EXYNOS_SROM_BCX__TACS__SHIFT), 103 (timing[5] << EXYNOS_SROM_BCX__TACS__SHIFT),
104 srom->reg_base + EXYNOS_SROM_BC0 + bank); 104 srom->reg_base + EXYNOS_SROM_BC0 + bank);
105 105
106 return 0; 106 return 0;
107} 107}