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authorMinghuan Lian <Minghuan.Lian@nxp.com>2017-07-05 02:59:00 -0400
committerMarc Zyngier <marc.zyngier@arm.com>2017-08-31 11:19:26 -0400
commitcb3421684ee778d60da26232bfea626dca2eb8db (patch)
treef8a143167f4c25f26601bc8c01bacb4d3d29c1f2
parent0b09331a25fe279e7b93aa58dda35e58fd23eaa6 (diff)
arm64: dts: ls1046a: Add MSI dts node
LS1046a includes 3 MSI controllers. Each controller supports 128 interrupts. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt1
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi31
2 files changed, 32 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt
index 2755cd1ce611..dde455289c16 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt
@@ -6,6 +6,7 @@ Required properties:
6 Layerscape PCIe MSI controller block such as: 6 Layerscape PCIe MSI controller block such as:
7 "fsl,ls1021a-msi" 7 "fsl,ls1021a-msi"
8 "fsl,ls1043a-msi" 8 "fsl,ls1043a-msi"
9 "fsl,ls1046a-msi"
9- msi-controller: indicates that this is a PCIe MSI controller node 10- msi-controller: indicates that this is a PCIe MSI controller node
10- reg: physical base address of the controller and length of memory mapped. 11- reg: physical base address of the controller and length of memory mapped.
11- interrupts: an interrupt to the parent interrupt controller. 12- interrupts: an interrupt to the parent interrupt controller.
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index dc1640be0345..c8ff0baddf1d 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -630,6 +630,37 @@
630 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 630 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
631 clocks = <&clockgen 4 1>; 631 clocks = <&clockgen 4 1>;
632 }; 632 };
633
634 msi1: msi-controller@1580000 {
635 compatible = "fsl,ls1046a-msi";
636 msi-controller;
637 reg = <0x0 0x1580000 0x0 0x10000>;
638 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
639 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
640 <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
641 <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
642 };
643
644 msi2: msi-controller@1590000 {
645 compatible = "fsl,ls1046a-msi";
646 msi-controller;
647 reg = <0x0 0x1590000 0x0 0x10000>;
648 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
649 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
650 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
651 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
652 };
653
654 msi3: msi-controller@15a0000 {
655 compatible = "fsl,ls1046a-msi";
656 msi-controller;
657 reg = <0x0 0x15a0000 0x0 0x10000>;
658 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
659 <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
660 <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
661 <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
662 };
663
633 }; 664 };
634 665
635 reserved-memory { 666 reserved-memory {