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authorAlexey Brodkin <abrodkin@synopsys.com>2016-04-27 09:59:50 -0400
committerAlexey Brodkin <abrodkin@synopsys.com>2016-04-29 07:34:13 -0400
commitcb2ad5e5339c5122166265cea579cc6a356d46de (patch)
treebd45a96027bc8f8f1e2e0245bd342978ad03fb7c
parent8aeab995fa142523f376369e4ce0608df6727706 (diff)
ARC: [axs10x] Specify reserved memory for frame buffer
Allocation of a frame buffer memory in a special memory region allows bypassing of so-called IO Coherency aperture which is typically set as a range 0x8z-0xAz. I.e. all data traffic to PGU bypasses IO Coherency block and saves its bandwidth for other peripherals. Even though for AXS101 (which sorts ARC770 CPU) IOC is not an option for a sake of keeping one DT description for the base-board (axs10x_mb.dtsi) we're still defining reserved memory location in the very end of DDR. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Acked-by: Vineet Gupta <vgupta@synopsys.com> Cc: devicetree@vger.kernel.org
-rw-r--r--arch/arc/boot/dts/axc001.dtsi22
-rw-r--r--arch/arc/boot/dts/axc003.dtsi14
-rw-r--r--arch/arc/boot/dts/axc003_idu.dtsi14
-rw-r--r--arch/arc/boot/dts/axs10x_mb.dtsi2
4 files changed, 49 insertions, 3 deletions
diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi
index 420dcfde289f..262496ac2628 100644
--- a/arch/arc/boot/dts/axc001.dtsi
+++ b/arch/arc/boot/dts/axc001.dtsi
@@ -93,8 +93,26 @@
93 memory { 93 memory {
94 #address-cells = <1>; 94 #address-cells = <1>;
95 #size-cells = <1>; 95 #size-cells = <1>;
96 ranges = <0x00000000 0x80000000 0x40000000>; 96 ranges = <0x00000000 0x80000000 0x20000000>;
97 device_type = "memory"; 97 device_type = "memory";
98 reg = <0x80000000 0x20000000>; /* 512MiB */ 98 reg = <0x80000000 0x1b000000>; /* (512 - 32) MiB */
99 };
100
101 reserved-memory {
102 #address-cells = <1>;
103 #size-cells = <1>;
104 ranges;
105 /*
106 * We just move frame buffer area to the very end of
107 * available DDR. And even though in case of ARC770 there's
108 * no strict requirement for a frame-buffer to be in any
109 * particular location it allows us to use the same
110 * base board's DT node for ARC PGU as for ARc HS38.
111 */
112 frame_buffer: frame_buffer@9e000000 {
113 compatible = "shared-dma-pool";
114 reg = <0x9e000000 0x2000000>;
115 no-map;
116 };
99 }; 117 };
100}; 118};
diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi
index f90fadf7f94e..35ece04d8353 100644
--- a/arch/arc/boot/dts/axc003.dtsi
+++ b/arch/arc/boot/dts/axc003.dtsi
@@ -100,4 +100,18 @@
100 device_type = "memory"; 100 device_type = "memory";
101 reg = <0x80000000 0x20000000>; /* 512MiB */ 101 reg = <0x80000000 0x20000000>; /* 512MiB */
102 }; 102 };
103
104 reserved-memory {
105 #address-cells = <1>;
106 #size-cells = <1>;
107 ranges;
108 /*
109 * Move frame buffer out of IOC aperture (0x8z-0xAz).
110 */
111 frame_buffer: frame_buffer@be000000 {
112 compatible = "shared-dma-pool";
113 reg = <0xbe000000 0x2000000>;
114 no-map;
115 };
116 };
103}; 117};
diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi
index 06a9f294a2e6..df9ddb623bfe 100644
--- a/arch/arc/boot/dts/axc003_idu.dtsi
+++ b/arch/arc/boot/dts/axc003_idu.dtsi
@@ -123,4 +123,18 @@
123 device_type = "memory"; 123 device_type = "memory";
124 reg = <0x80000000 0x20000000>; /* 512MiB */ 124 reg = <0x80000000 0x20000000>; /* 512MiB */
125 }; 125 };
126
127 reserved-memory {
128 #address-cells = <1>;
129 #size-cells = <1>;
130 ranges;
131 /*
132 * Move frame buffer out of IOC aperture (0x8z-0xAz).
133 */
134 frame_buffer: frame_buffer@be000000 {
135 compatible = "shared-dma-pool";
136 reg = <0xbe000000 0x2000000>;
137 no-map;
138 };
139 };
126}; 140};
diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi
index 823f15ca68df..64b063d4e996 100644
--- a/arch/arc/boot/dts/axs10x_mb.dtsi
+++ b/arch/arc/boot/dts/axs10x_mb.dtsi
@@ -283,7 +283,7 @@
283 encoder-slave = <&adv7511>; 283 encoder-slave = <&adv7511>;
284 clocks = <&pguclk>; 284 clocks = <&pguclk>;
285 clock-names = "pxlclk"; 285 clock-names = "pxlclk";
286 286 memory-region = <&frame_buffer>;
287 port { 287 port {
288 pgu_output: endpoint { 288 pgu_output: endpoint {
289 remote-endpoint = <&adv7511_input>; 289 remote-endpoint = <&adv7511_input>;