aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorRobin Murphy <robin.murphy@arm.com>2018-02-15 09:05:53 -0500
committerHeiko Stuebner <heiko@sntech.de>2018-02-16 04:30:25 -0500
commitca9eee95a2decc6f60bed65b5b836a26bff825c1 (patch)
treee3ad7456fc42a07a7045c6f40c9e9943626ca0c7
parent7b0390eabdd1dec50f60ad25e7e706875bfa223e (diff)
arm64: dts: rockchip: Fix DWMMC clocks
Trying to boot an RK3328 box with an HS200-capable eMMC, I see said eMMC fail to initialise as it can't run its tuning procedure, because the sample clock is missing. Upon closer inspection, whilst the clock is present in the DT, its name is subtly incorrect per the binding, so __of_clk_get_by_name() never finds it. By inspection, the drive clock suffers from a similar problem, so has never worked properly either. Fix up all instances of the incorrect clock names across the 64-bit DTs. Fixes: d717f7352ec6 ("arm64: dts: rockchip: add sdmmc/sdio/emmc nodes for RK3328 SoCs") Fixes: b790c2cab5ca ("arm64: dts: add Rockchip rk3368 core dtsi and board dts for the r88 board") Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3328.dtsi6
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3368.dtsi2
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index a037ee56fead..cae341554486 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -730,7 +730,7 @@
730 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 730 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
731 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, 731 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
732 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; 732 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
733 clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; 733 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
734 fifo-depth = <0x100>; 734 fifo-depth = <0x100>;
735 status = "disabled"; 735 status = "disabled";
736 }; 736 };
@@ -741,7 +741,7 @@
741 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 741 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
742 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, 742 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
743 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; 743 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
744 clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; 744 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
745 fifo-depth = <0x100>; 745 fifo-depth = <0x100>;
746 status = "disabled"; 746 status = "disabled";
747 }; 747 };
@@ -752,7 +752,7 @@
752 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 752 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
753 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, 753 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
754 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; 754 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
755 clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; 755 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
756 fifo-depth = <0x100>; 756 fifo-depth = <0x100>;
757 status = "disabled"; 757 status = "disabled";
758 }; 758 };
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index aa4d07046a7b..03458ac44201 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -257,7 +257,7 @@
257 max-frequency = <150000000>; 257 max-frequency = <150000000>;
258 clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>, 258 clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
259 <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>; 259 <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
260 clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; 260 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
261 fifo-depth = <0x100>; 261 fifo-depth = <0x100>;
262 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 262 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
263 resets = <&cru SRST_SDIO0>; 263 resets = <&cru SRST_SDIO0>;