diff options
author | Amelie Delaunay <amelie.delaunay@st.com> | 2017-01-12 10:09:44 -0500 |
---|---|---|
committer | Felipe Balbi <felipe.balbi@linux.intel.com> | 2017-01-16 04:11:17 -0500 |
commit | ca02954ada711b08e5b0d84590a631fd63ed39f9 (patch) | |
tree | 169f5eda24a4e53c7af7c596b1ba254f79c29654 | |
parent | 32856eea7bf75dfb99b955ada6e147f553a11366 (diff) |
usb: dwc2: gadget: Fix GUSBCFG.USBTRDTIM value
USBTrdTim must be programmed to 0x5 when phy has a UTMI+ 16-bit wide
interface or 0x9 when it has a 8-bit wide interface.
GUSBCFG reset value (Value After Reset: 0x1400) sets USBTrdTim to 0x5.
In case of 8-bit UTMI+, without clearing GUSBCFG.USBTRDTIM mask, USBTrdTim
results in 0xD (0x5 | 0x9).
That's why we need to clear GUSBCFG.USBTRDTIM mask before setting USBTrdTim
value, to ensure USBTrdTim is correctly set in case of 8-bit UTMI+.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
-rw-r--r-- | drivers/usb/dwc2/gadget.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c index 2a9e51c176cc..77c5fcf3a5bf 100644 --- a/drivers/usb/dwc2/gadget.c +++ b/drivers/usb/dwc2/gadget.c | |||
@@ -3169,7 +3169,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg, | |||
3169 | /* keep other bits untouched (so e.g. forced modes are not lost) */ | 3169 | /* keep other bits untouched (so e.g. forced modes are not lost) */ |
3170 | usbcfg = dwc2_readl(hsotg->regs + GUSBCFG); | 3170 | usbcfg = dwc2_readl(hsotg->regs + GUSBCFG); |
3171 | usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP | | 3171 | usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP | |
3172 | GUSBCFG_HNPCAP); | 3172 | GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK); |
3173 | 3173 | ||
3174 | if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS && | 3174 | if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS && |
3175 | (hsotg->params.speed == DWC2_SPEED_PARAM_FULL || | 3175 | (hsotg->params.speed == DWC2_SPEED_PARAM_FULL || |
@@ -4123,7 +4123,7 @@ static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg) | |||
4123 | /* keep other bits untouched (so e.g. forced modes are not lost) */ | 4123 | /* keep other bits untouched (so e.g. forced modes are not lost) */ |
4124 | usbcfg = dwc2_readl(hsotg->regs + GUSBCFG); | 4124 | usbcfg = dwc2_readl(hsotg->regs + GUSBCFG); |
4125 | usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP | | 4125 | usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP | |
4126 | GUSBCFG_HNPCAP); | 4126 | GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK); |
4127 | 4127 | ||
4128 | /* set the PLL on, remove the HNP/SRP and set the PHY */ | 4128 | /* set the PLL on, remove the HNP/SRP and set the PHY */ |
4129 | trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5; | 4129 | trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5; |