diff options
author | Anson Huang <Anson.Huang@nxp.com> | 2018-01-07 21:04:50 -0500 |
---|---|---|
committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2018-01-09 19:14:21 -0500 |
commit | c9619bb293c9ab758ba298f039cf4b820dd8436f (patch) | |
tree | f5560a43e0bf69beb041bbf06f11ace4f251c838 | |
parent | d476ec4f7f5aba47b0a570cbf659d7330d7e71cf (diff) |
ARM: dts: imx6ul: add 696MHz operating point
Add 696MHz operating point according to datasheet
(Rev. 0, 12/2015).
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-rw-r--r-- | arch/arm/boot/dts/imx6ul.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index d5181f85ca9c..963e1698fe1d 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi | |||
@@ -68,12 +68,14 @@ | |||
68 | clock-latency = <61036>; /* two CLK32 periods */ | 68 | clock-latency = <61036>; /* two CLK32 periods */ |
69 | operating-points = < | 69 | operating-points = < |
70 | /* kHz uV */ | 70 | /* kHz uV */ |
71 | 696000 1275000 | ||
71 | 528000 1175000 | 72 | 528000 1175000 |
72 | 396000 1025000 | 73 | 396000 1025000 |
73 | 198000 950000 | 74 | 198000 950000 |
74 | >; | 75 | >; |
75 | fsl,soc-operating-points = < | 76 | fsl,soc-operating-points = < |
76 | /* KHz uV */ | 77 | /* KHz uV */ |
78 | 696000 1275000 | ||
77 | 528000 1175000 | 79 | 528000 1175000 |
78 | 396000 1175000 | 80 | 396000 1175000 |
79 | 198000 1175000 | 81 | 198000 1175000 |