diff options
author | Evan Quan <evan.quan@amd.com> | 2019-01-07 21:33:35 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-01-14 15:04:26 -0500 |
commit | c81e42f036232cdb30de0b6294ec82f797958bc9 (patch) | |
tree | 55288f3b45b98d589cc91681cbf6534776c9e6a1 | |
parent | 45b35ee02162d149e4de3a1d8d4847621fb92c20 (diff) |
drm/amd/powerplay: avoid possible buffer overflow
Make sure the clock level enforced is within the allowed
ranges.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c index 8f6097c6a02b..c2061d351d04 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | |||
@@ -2251,6 +2251,13 @@ static int vega20_force_clock_level(struct pp_hwmgr *hwmgr, | |||
2251 | soft_min_level = mask ? (ffs(mask) - 1) : 0; | 2251 | soft_min_level = mask ? (ffs(mask) - 1) : 0; |
2252 | soft_max_level = mask ? (fls(mask) - 1) : 0; | 2252 | soft_max_level = mask ? (fls(mask) - 1) : 0; |
2253 | 2253 | ||
2254 | if (soft_max_level >= data->dpm_table.gfx_table.count) { | ||
2255 | pr_err("Clock level specified %d is over max allowed %d\n", | ||
2256 | soft_max_level, | ||
2257 | data->dpm_table.gfx_table.count - 1); | ||
2258 | return -EINVAL; | ||
2259 | } | ||
2260 | |||
2254 | data->dpm_table.gfx_table.dpm_state.soft_min_level = | 2261 | data->dpm_table.gfx_table.dpm_state.soft_min_level = |
2255 | data->dpm_table.gfx_table.dpm_levels[soft_min_level].value; | 2262 | data->dpm_table.gfx_table.dpm_levels[soft_min_level].value; |
2256 | data->dpm_table.gfx_table.dpm_state.soft_max_level = | 2263 | data->dpm_table.gfx_table.dpm_state.soft_max_level = |
@@ -2271,6 +2278,13 @@ static int vega20_force_clock_level(struct pp_hwmgr *hwmgr, | |||
2271 | soft_min_level = mask ? (ffs(mask) - 1) : 0; | 2278 | soft_min_level = mask ? (ffs(mask) - 1) : 0; |
2272 | soft_max_level = mask ? (fls(mask) - 1) : 0; | 2279 | soft_max_level = mask ? (fls(mask) - 1) : 0; |
2273 | 2280 | ||
2281 | if (soft_max_level >= data->dpm_table.mem_table.count) { | ||
2282 | pr_err("Clock level specified %d is over max allowed %d\n", | ||
2283 | soft_max_level, | ||
2284 | data->dpm_table.mem_table.count - 1); | ||
2285 | return -EINVAL; | ||
2286 | } | ||
2287 | |||
2274 | data->dpm_table.mem_table.dpm_state.soft_min_level = | 2288 | data->dpm_table.mem_table.dpm_state.soft_min_level = |
2275 | data->dpm_table.mem_table.dpm_levels[soft_min_level].value; | 2289 | data->dpm_table.mem_table.dpm_levels[soft_min_level].value; |
2276 | data->dpm_table.mem_table.dpm_state.soft_max_level = | 2290 | data->dpm_table.mem_table.dpm_state.soft_max_level = |