diff options
author | Monk Liu <Monk.Liu@amd.com> | 2017-11-13 22:52:35 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-12-06 12:47:50 -0500 |
commit | c79ee7d8c6cba8775b842063cf5bcdf101dc1e36 (patch) | |
tree | ccc3d216288e4b9b3bcfbeabdb69c42c5b2b2de7 | |
parent | 11c6b82afb4cd696e10ab1cfaad3bbfb8dd4f16f (diff) |
drm/amdgpu:cleanup GMC & gart garbage function
for gart_ram_alloc/free, they are never used in driver thus
ripe them out totally.
for gart_vram_pin/unpin, they are not needed becuase we can
use bo_creat_kernel/free to replace the original manual way
in the gart_vram_alloc/free, thus gart_vram_pin/unpin can
also be riped out.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 136 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 6 |
7 files changed, 13 insertions, 156 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c index fe818501c520..10eeb307700c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | |||
@@ -57,63 +57,6 @@ | |||
57 | */ | 57 | */ |
58 | 58 | ||
59 | /** | 59 | /** |
60 | * amdgpu_gart_table_ram_alloc - allocate system ram for gart page table | ||
61 | * | ||
62 | * @adev: amdgpu_device pointer | ||
63 | * | ||
64 | * Allocate system memory for GART page table | ||
65 | * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the | ||
66 | * gart table to be in system memory. | ||
67 | * Returns 0 for success, -ENOMEM for failure. | ||
68 | */ | ||
69 | int amdgpu_gart_table_ram_alloc(struct amdgpu_device *adev) | ||
70 | { | ||
71 | void *ptr; | ||
72 | |||
73 | ptr = pci_alloc_consistent(adev->pdev, adev->gart.table_size, | ||
74 | &adev->gart.table_addr); | ||
75 | if (ptr == NULL) { | ||
76 | return -ENOMEM; | ||
77 | } | ||
78 | #ifdef CONFIG_X86 | ||
79 | if (0) { | ||
80 | set_memory_uc((unsigned long)ptr, | ||
81 | adev->gart.table_size >> PAGE_SHIFT); | ||
82 | } | ||
83 | #endif | ||
84 | adev->gart.ptr = ptr; | ||
85 | memset((void *)adev->gart.ptr, 0, adev->gart.table_size); | ||
86 | return 0; | ||
87 | } | ||
88 | |||
89 | /** | ||
90 | * amdgpu_gart_table_ram_free - free system ram for gart page table | ||
91 | * | ||
92 | * @adev: amdgpu_device pointer | ||
93 | * | ||
94 | * Free system memory for GART page table | ||
95 | * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the | ||
96 | * gart table to be in system memory. | ||
97 | */ | ||
98 | void amdgpu_gart_table_ram_free(struct amdgpu_device *adev) | ||
99 | { | ||
100 | if (adev->gart.ptr == NULL) { | ||
101 | return; | ||
102 | } | ||
103 | #ifdef CONFIG_X86 | ||
104 | if (0) { | ||
105 | set_memory_wb((unsigned long)adev->gart.ptr, | ||
106 | adev->gart.table_size >> PAGE_SHIFT); | ||
107 | } | ||
108 | #endif | ||
109 | pci_free_consistent(adev->pdev, adev->gart.table_size, | ||
110 | (void *)adev->gart.ptr, | ||
111 | adev->gart.table_addr); | ||
112 | adev->gart.ptr = NULL; | ||
113 | adev->gart.table_addr = 0; | ||
114 | } | ||
115 | |||
116 | /** | ||
117 | * amdgpu_gart_table_vram_alloc - allocate vram for gart page table | 60 | * amdgpu_gart_table_vram_alloc - allocate vram for gart page table |
118 | * | 61 | * |
119 | * @adev: amdgpu_device pointer | 62 | * @adev: amdgpu_device pointer |
@@ -125,75 +68,9 @@ void amdgpu_gart_table_ram_free(struct amdgpu_device *adev) | |||
125 | */ | 68 | */ |
126 | int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev) | 69 | int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev) |
127 | { | 70 | { |
128 | int r; | 71 | return amdgpu_bo_create_kernel(adev, adev->gart.table_size, PAGE_SIZE, |
129 | 72 | AMDGPU_GEM_DOMAIN_VRAM, &adev->gart.robj, | |
130 | if (adev->gart.robj == NULL) { | 73 | &adev->gart.table_addr, &adev->gart.ptr); |
131 | r = amdgpu_bo_create(adev, adev->gart.table_size, | ||
132 | PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_VRAM, | ||
133 | AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED | | ||
134 | AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS, | ||
135 | NULL, NULL, 0, &adev->gart.robj); | ||
136 | if (r) { | ||
137 | return r; | ||
138 | } | ||
139 | } | ||
140 | return 0; | ||
141 | } | ||
142 | |||
143 | /** | ||
144 | * amdgpu_gart_table_vram_pin - pin gart page table in vram | ||
145 | * | ||
146 | * @adev: amdgpu_device pointer | ||
147 | * | ||
148 | * Pin the GART page table in vram so it will not be moved | ||
149 | * by the memory manager (pcie r4xx, r5xx+). These asics require the | ||
150 | * gart table to be in video memory. | ||
151 | * Returns 0 for success, error for failure. | ||
152 | */ | ||
153 | int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev) | ||
154 | { | ||
155 | uint64_t gpu_addr; | ||
156 | int r; | ||
157 | |||
158 | r = amdgpu_bo_reserve(adev->gart.robj, false); | ||
159 | if (unlikely(r != 0)) | ||
160 | return r; | ||
161 | r = amdgpu_bo_pin(adev->gart.robj, | ||
162 | AMDGPU_GEM_DOMAIN_VRAM, &gpu_addr); | ||
163 | if (r) { | ||
164 | amdgpu_bo_unreserve(adev->gart.robj); | ||
165 | return r; | ||
166 | } | ||
167 | r = amdgpu_bo_kmap(adev->gart.robj, &adev->gart.ptr); | ||
168 | if (r) | ||
169 | amdgpu_bo_unpin(adev->gart.robj); | ||
170 | amdgpu_bo_unreserve(adev->gart.robj); | ||
171 | adev->gart.table_addr = gpu_addr; | ||
172 | return r; | ||
173 | } | ||
174 | |||
175 | /** | ||
176 | * amdgpu_gart_table_vram_unpin - unpin gart page table in vram | ||
177 | * | ||
178 | * @adev: amdgpu_device pointer | ||
179 | * | ||
180 | * Unpin the GART page table in vram (pcie r4xx, r5xx+). | ||
181 | * These asics require the gart table to be in video memory. | ||
182 | */ | ||
183 | void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev) | ||
184 | { | ||
185 | int r; | ||
186 | |||
187 | if (adev->gart.robj == NULL) { | ||
188 | return; | ||
189 | } | ||
190 | r = amdgpu_bo_reserve(adev->gart.robj, true); | ||
191 | if (likely(r == 0)) { | ||
192 | amdgpu_bo_kunmap(adev->gart.robj); | ||
193 | amdgpu_bo_unpin(adev->gart.robj); | ||
194 | amdgpu_bo_unreserve(adev->gart.robj); | ||
195 | adev->gart.ptr = NULL; | ||
196 | } | ||
197 | } | 74 | } |
198 | 75 | ||
199 | /** | 76 | /** |
@@ -207,10 +84,9 @@ void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev) | |||
207 | */ | 84 | */ |
208 | void amdgpu_gart_table_vram_free(struct amdgpu_device *adev) | 85 | void amdgpu_gart_table_vram_free(struct amdgpu_device *adev) |
209 | { | 86 | { |
210 | if (adev->gart.robj == NULL) { | 87 | amdgpu_bo_free_kernel(&adev->gart.robj, |
211 | return; | 88 | &adev->gart.table_addr, |
212 | } | 89 | &adev->gart.ptr); |
213 | amdgpu_bo_unref(&adev->gart.robj); | ||
214 | } | 90 | } |
215 | 91 | ||
216 | /* | 92 | /* |
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h index afbe803b1a13..f15e319580ec 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h | |||
@@ -56,12 +56,8 @@ struct amdgpu_gart { | |||
56 | const struct amdgpu_gart_funcs *gart_funcs; | 56 | const struct amdgpu_gart_funcs *gart_funcs; |
57 | }; | 57 | }; |
58 | 58 | ||
59 | int amdgpu_gart_table_ram_alloc(struct amdgpu_device *adev); | ||
60 | void amdgpu_gart_table_ram_free(struct amdgpu_device *adev); | ||
61 | int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev); | 59 | int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev); |
62 | void amdgpu_gart_table_vram_free(struct amdgpu_device *adev); | 60 | void amdgpu_gart_table_vram_free(struct amdgpu_device *adev); |
63 | int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev); | ||
64 | void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev); | ||
65 | int amdgpu_gart_init(struct amdgpu_device *adev); | 61 | int amdgpu_gart_init(struct amdgpu_device *adev); |
66 | void amdgpu_gart_fini(struct amdgpu_device *adev); | 62 | void amdgpu_gart_fini(struct amdgpu_device *adev); |
67 | int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset, | 63 | int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset, |
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index f34adb0cd1ea..d49c768cf3dc 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | |||
@@ -1397,8 +1397,6 @@ int amdgpu_ttm_init(struct amdgpu_device *adev) | |||
1397 | 1397 | ||
1398 | void amdgpu_ttm_fini(struct amdgpu_device *adev) | 1398 | void amdgpu_ttm_fini(struct amdgpu_device *adev) |
1399 | { | 1399 | { |
1400 | int r; | ||
1401 | |||
1402 | if (!adev->mman.initialized) | 1400 | if (!adev->mman.initialized) |
1403 | return; | 1401 | return; |
1404 | 1402 | ||
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c index c8e47c36608e..f3e5c9c6a52d 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | |||
@@ -483,16 +483,14 @@ static void gmc_v6_0_set_prt(struct amdgpu_device *adev, bool enable) | |||
483 | 483 | ||
484 | static int gmc_v6_0_gart_enable(struct amdgpu_device *adev) | 484 | static int gmc_v6_0_gart_enable(struct amdgpu_device *adev) |
485 | { | 485 | { |
486 | int r, i; | 486 | int i; |
487 | u32 field; | 487 | u32 field; |
488 | 488 | ||
489 | if (adev->gart.robj == NULL) { | 489 | if (adev->gart.robj == NULL) { |
490 | dev_err(adev->dev, "No VRAM object for PCIE GART.\n"); | 490 | dev_err(adev->dev, "No VRAM object for PCIE GART.\n"); |
491 | return -EINVAL; | 491 | return -EINVAL; |
492 | } | 492 | } |
493 | r = amdgpu_gart_table_vram_pin(adev); | 493 | |
494 | if (r) | ||
495 | return r; | ||
496 | /* Setup TLB control */ | 494 | /* Setup TLB control */ |
497 | WREG32(mmMC_VM_MX_L1_TLB_CNTL, | 495 | WREG32(mmMC_VM_MX_L1_TLB_CNTL, |
498 | (0xA << 7) | | 496 | (0xA << 7) | |
@@ -619,7 +617,6 @@ static void gmc_v6_0_gart_disable(struct amdgpu_device *adev) | |||
619 | WREG32(mmVM_L2_CNTL3, | 617 | WREG32(mmVM_L2_CNTL3, |
620 | VM_L2_CNTL3__L2_CACHE_BIGK_ASSOCIATIVITY_MASK | | 618 | VM_L2_CNTL3__L2_CACHE_BIGK_ASSOCIATIVITY_MASK | |
621 | (0UL << VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT)); | 619 | (0UL << VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT)); |
622 | amdgpu_gart_table_vram_unpin(adev); | ||
623 | } | 620 | } |
624 | 621 | ||
625 | static void gmc_v6_0_gart_fini(struct amdgpu_device *adev) | 622 | static void gmc_v6_0_gart_fini(struct amdgpu_device *adev) |
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c index 2b7338e22409..6d153fa8175c 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | |||
@@ -588,16 +588,14 @@ static void gmc_v7_0_set_prt(struct amdgpu_device *adev, bool enable) | |||
588 | */ | 588 | */ |
589 | static int gmc_v7_0_gart_enable(struct amdgpu_device *adev) | 589 | static int gmc_v7_0_gart_enable(struct amdgpu_device *adev) |
590 | { | 590 | { |
591 | int r, i; | 591 | int i; |
592 | u32 tmp, field; | 592 | u32 tmp, field; |
593 | 593 | ||
594 | if (adev->gart.robj == NULL) { | 594 | if (adev->gart.robj == NULL) { |
595 | dev_err(adev->dev, "No VRAM object for PCIE GART.\n"); | 595 | dev_err(adev->dev, "No VRAM object for PCIE GART.\n"); |
596 | return -EINVAL; | 596 | return -EINVAL; |
597 | } | 597 | } |
598 | r = amdgpu_gart_table_vram_pin(adev); | 598 | |
599 | if (r) | ||
600 | return r; | ||
601 | /* Setup TLB control */ | 599 | /* Setup TLB control */ |
602 | tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL); | 600 | tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL); |
603 | tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, 1); | 601 | tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, 1); |
@@ -730,7 +728,6 @@ static void gmc_v7_0_gart_disable(struct amdgpu_device *adev) | |||
730 | tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0); | 728 | tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0); |
731 | WREG32(mmVM_L2_CNTL, tmp); | 729 | WREG32(mmVM_L2_CNTL, tmp); |
732 | WREG32(mmVM_L2_CNTL2, 0); | 730 | WREG32(mmVM_L2_CNTL2, 0); |
733 | amdgpu_gart_table_vram_unpin(adev); | ||
734 | } | 731 | } |
735 | 732 | ||
736 | /** | 733 | /** |
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c index e30a96a8f49b..7ee5f21295d4 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | |||
@@ -787,16 +787,14 @@ static void gmc_v8_0_set_prt(struct amdgpu_device *adev, bool enable) | |||
787 | */ | 787 | */ |
788 | static int gmc_v8_0_gart_enable(struct amdgpu_device *adev) | 788 | static int gmc_v8_0_gart_enable(struct amdgpu_device *adev) |
789 | { | 789 | { |
790 | int r, i; | 790 | int i; |
791 | u32 tmp, field; | 791 | u32 tmp, field; |
792 | 792 | ||
793 | if (adev->gart.robj == NULL) { | 793 | if (adev->gart.robj == NULL) { |
794 | dev_err(adev->dev, "No VRAM object for PCIE GART.\n"); | 794 | dev_err(adev->dev, "No VRAM object for PCIE GART.\n"); |
795 | return -EINVAL; | 795 | return -EINVAL; |
796 | } | 796 | } |
797 | r = amdgpu_gart_table_vram_pin(adev); | 797 | |
798 | if (r) | ||
799 | return r; | ||
800 | /* Setup TLB control */ | 798 | /* Setup TLB control */ |
801 | tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL); | 799 | tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL); |
802 | tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, 1); | 800 | tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, 1); |
@@ -946,7 +944,6 @@ static void gmc_v8_0_gart_disable(struct amdgpu_device *adev) | |||
946 | tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0); | 944 | tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0); |
947 | WREG32(mmVM_L2_CNTL, tmp); | 945 | WREG32(mmVM_L2_CNTL, tmp); |
948 | WREG32(mmVM_L2_CNTL2, 0); | 946 | WREG32(mmVM_L2_CNTL2, 0); |
949 | amdgpu_gart_table_vram_unpin(adev); | ||
950 | } | 947 | } |
951 | 948 | ||
952 | /** | 949 | /** |
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c index d9a91098bcb1..4960805bf989 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | |||
@@ -869,7 +869,7 @@ static int gmc_v9_0_sw_init(void *handle) | |||
869 | } | 869 | } |
870 | 870 | ||
871 | /** | 871 | /** |
872 | * gmc_v8_0_gart_fini - vm fini callback | 872 | * gmc_v9_0_gart_fini - vm fini callback |
873 | * | 873 | * |
874 | * @adev: amdgpu_device pointer | 874 | * @adev: amdgpu_device pointer |
875 | * | 875 | * |
@@ -933,9 +933,6 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev) | |||
933 | dev_err(adev->dev, "No VRAM object for PCIE GART.\n"); | 933 | dev_err(adev->dev, "No VRAM object for PCIE GART.\n"); |
934 | return -EINVAL; | 934 | return -EINVAL; |
935 | } | 935 | } |
936 | r = amdgpu_gart_table_vram_pin(adev); | ||
937 | if (r) | ||
938 | return r; | ||
939 | 936 | ||
940 | switch (adev->asic_type) { | 937 | switch (adev->asic_type) { |
941 | case CHIP_RAVEN: | 938 | case CHIP_RAVEN: |
@@ -1013,7 +1010,6 @@ static void gmc_v9_0_gart_disable(struct amdgpu_device *adev) | |||
1013 | { | 1010 | { |
1014 | gfxhub_v1_0_gart_disable(adev); | 1011 | gfxhub_v1_0_gart_disable(adev); |
1015 | mmhub_v1_0_gart_disable(adev); | 1012 | mmhub_v1_0_gart_disable(adev); |
1016 | amdgpu_gart_table_vram_unpin(adev); | ||
1017 | } | 1013 | } |
1018 | 1014 | ||
1019 | static int gmc_v9_0_hw_fini(void *handle) | 1015 | static int gmc_v9_0_hw_fini(void *handle) |