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authorMarek Olšák <marek.olsak@amd.com>2015-07-11 06:08:46 -0400
committerAlex Deucher <alexander.deucher@amd.com>2015-08-17 16:50:20 -0400
commitc7890fea04acbaa89f572adcd9efe0b2d390a8e7 (patch)
tree4846503bfc2e092f27259854e2b687192964bf96
parent8e9198d0698a4a748bac9a7b33ed1300cf5f3793 (diff)
drm/amdgpu: allow userspace to read more debug registers
Feel free to suggest more. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/vi.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 68552da40287..0f4a4f438f5e 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -362,6 +362,26 @@ static struct amdgpu_allowed_register_entry cz_allowed_read_registers[] = {
362 362
363static struct amdgpu_allowed_register_entry vi_allowed_read_registers[] = { 363static struct amdgpu_allowed_register_entry vi_allowed_read_registers[] = {
364 {mmGRBM_STATUS, false}, 364 {mmGRBM_STATUS, false},
365 {mmGRBM_STATUS2, false},
366 {mmGRBM_STATUS_SE0, false},
367 {mmGRBM_STATUS_SE1, false},
368 {mmGRBM_STATUS_SE2, false},
369 {mmGRBM_STATUS_SE3, false},
370 {mmSRBM_STATUS, false},
371 {mmSRBM_STATUS2, false},
372 {mmSRBM_STATUS3, false},
373 {mmSDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET, false},
374 {mmSDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET, false},
375 {mmCP_STAT, false},
376 {mmCP_STALLED_STAT1, false},
377 {mmCP_STALLED_STAT2, false},
378 {mmCP_STALLED_STAT3, false},
379 {mmCP_CPF_BUSY_STAT, false},
380 {mmCP_CPF_STALLED_STAT1, false},
381 {mmCP_CPF_STATUS, false},
382 {mmCP_CPC_BUSY_STAT, false},
383 {mmCP_CPC_STALLED_STAT1, false},
384 {mmCP_CPC_STATUS, false},
365 {mmGB_ADDR_CONFIG, false}, 385 {mmGB_ADDR_CONFIG, false},
366 {mmMC_ARB_RAMCFG, false}, 386 {mmMC_ARB_RAMCFG, false},
367 {mmGB_TILE_MODE0, false}, 387 {mmGB_TILE_MODE0, false},