diff options
author | Andrew F. Davis <afd@ti.com> | 2017-11-29 16:32:52 -0500 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2017-12-01 08:30:48 -0500 |
commit | c6b8c779213dfe2a31e12400b1a2cf2a9a843236 (patch) | |
tree | f6dacb02ecd5d6f7a3febe182e38fd22844c513a | |
parent | b6b247cd5e37560e410c88b108e7408dafe60c15 (diff) |
ASoC: tlv320aic31xx: Check clock and divider before division
If our set_sysclk DAI callback has not been called yet p_div will be 0
and dividing by this will cause an error. Print an error message and
leave before this.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | sound/soc/codecs/tlv320aic31xx.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/sound/soc/codecs/tlv320aic31xx.c b/sound/soc/codecs/tlv320aic31xx.c index ab03a19f6aaa..05e6d194d6a9 100644 --- a/sound/soc/codecs/tlv320aic31xx.c +++ b/sound/soc/codecs/tlv320aic31xx.c | |||
@@ -754,11 +754,17 @@ static int aic31xx_setup_pll(struct snd_soc_codec *codec, | |||
754 | { | 754 | { |
755 | struct aic31xx_priv *aic31xx = snd_soc_codec_get_drvdata(codec); | 755 | struct aic31xx_priv *aic31xx = snd_soc_codec_get_drvdata(codec); |
756 | int bclk_score = snd_soc_params_to_frame_size(params); | 756 | int bclk_score = snd_soc_params_to_frame_size(params); |
757 | int mclk_p = aic31xx->sysclk / aic31xx->p_div; | 757 | int mclk_p; |
758 | int bclk_n = 0; | 758 | int bclk_n = 0; |
759 | int match = -1; | 759 | int match = -1; |
760 | int i; | 760 | int i; |
761 | 761 | ||
762 | if (!aic31xx->sysclk || !aic31xx->p_div) { | ||
763 | dev_err(codec->dev, "Master clock not supplied\n"); | ||
764 | return -EINVAL; | ||
765 | } | ||
766 | mclk_p = aic31xx->sysclk / aic31xx->p_div; | ||
767 | |||
762 | /* Use PLL as CODEC_CLKIN and DAC_CLK as BDIV_CLKIN */ | 768 | /* Use PLL as CODEC_CLKIN and DAC_CLK as BDIV_CLKIN */ |
763 | snd_soc_update_bits(codec, AIC31XX_CLKMUX, | 769 | snd_soc_update_bits(codec, AIC31XX_CLKMUX, |
764 | AIC31XX_CODEC_CLKIN_MASK, AIC31XX_CODEC_CLKIN_PLL); | 770 | AIC31XX_CODEC_CLKIN_MASK, AIC31XX_CODEC_CLKIN_PLL); |