diff options
author | Dong Aisheng <aisheng.dong@nxp.com> | 2016-06-13 08:24:52 -0400 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2016-06-15 21:05:05 -0400 |
commit | c684766308abf473478cdd277839a7568111ec4b (patch) | |
tree | 13b7209a5cb08681918d66f175234ff9736cfe16 | |
parent | b3e76bdc0b2190e67427d31cd740debd01c03631 (diff) |
clk: imx: refine the powerdown bit of clk-pllv3
The powerdown bit is a bit confused, let's change it to power_bit
to relfect both powerdown and powerup case according to different
plls.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r-- | drivers/clk/imx/clk-pllv3.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c index eea2b1b3791e..19f9b622981a 100644 --- a/drivers/clk/imx/clk-pllv3.c +++ b/drivers/clk/imx/clk-pllv3.c | |||
@@ -29,8 +29,8 @@ | |||
29 | * struct clk_pllv3 - IMX PLL clock version 3 | 29 | * struct clk_pllv3 - IMX PLL clock version 3 |
30 | * @clk_hw: clock source | 30 | * @clk_hw: clock source |
31 | * @base: base address of PLL registers | 31 | * @base: base address of PLL registers |
32 | * @powerup_set: set POWER bit to power up the PLL | 32 | * @power_bit: pll power bit mask |
33 | * @powerdown: pll powerdown offset bit | 33 | * @powerup_set: set power_bit to power up the PLL |
34 | * @div_mask: mask of divider bits | 34 | * @div_mask: mask of divider bits |
35 | * @div_shift: shift of divider bits | 35 | * @div_shift: shift of divider bits |
36 | * | 36 | * |
@@ -40,8 +40,8 @@ | |||
40 | struct clk_pllv3 { | 40 | struct clk_pllv3 { |
41 | struct clk_hw hw; | 41 | struct clk_hw hw; |
42 | void __iomem *base; | 42 | void __iomem *base; |
43 | u32 power_bit; | ||
43 | bool powerup_set; | 44 | bool powerup_set; |
44 | u32 powerdown; | ||
45 | u32 div_mask; | 45 | u32 div_mask; |
46 | u32 div_shift; | 46 | u32 div_shift; |
47 | unsigned long ref_clock; | 47 | unsigned long ref_clock; |
@@ -52,7 +52,7 @@ struct clk_pllv3 { | |||
52 | static int clk_pllv3_wait_lock(struct clk_pllv3 *pll) | 52 | static int clk_pllv3_wait_lock(struct clk_pllv3 *pll) |
53 | { | 53 | { |
54 | unsigned long timeout = jiffies + msecs_to_jiffies(10); | 54 | unsigned long timeout = jiffies + msecs_to_jiffies(10); |
55 | u32 val = readl_relaxed(pll->base) & pll->powerdown; | 55 | u32 val = readl_relaxed(pll->base) & pll->power_bit; |
56 | 56 | ||
57 | /* No need to wait for lock when pll is not powered up */ | 57 | /* No need to wait for lock when pll is not powered up */ |
58 | if ((pll->powerup_set && !val) || (!pll->powerup_set && val)) | 58 | if ((pll->powerup_set && !val) || (!pll->powerup_set && val)) |
@@ -77,9 +77,9 @@ static int clk_pllv3_prepare(struct clk_hw *hw) | |||
77 | 77 | ||
78 | val = readl_relaxed(pll->base); | 78 | val = readl_relaxed(pll->base); |
79 | if (pll->powerup_set) | 79 | if (pll->powerup_set) |
80 | val |= pll->powerdown; | 80 | val |= pll->power_bit; |
81 | else | 81 | else |
82 | val &= ~pll->powerdown; | 82 | val &= ~pll->power_bit; |
83 | writel_relaxed(val, pll->base); | 83 | writel_relaxed(val, pll->base); |
84 | 84 | ||
85 | return clk_pllv3_wait_lock(pll); | 85 | return clk_pllv3_wait_lock(pll); |
@@ -92,9 +92,9 @@ static void clk_pllv3_unprepare(struct clk_hw *hw) | |||
92 | 92 | ||
93 | val = readl_relaxed(pll->base); | 93 | val = readl_relaxed(pll->base); |
94 | if (pll->powerup_set) | 94 | if (pll->powerup_set) |
95 | val &= ~pll->powerdown; | 95 | val &= ~pll->power_bit; |
96 | else | 96 | else |
97 | val |= pll->powerdown; | 97 | val |= pll->power_bit; |
98 | writel_relaxed(val, pll->base); | 98 | writel_relaxed(val, pll->base); |
99 | } | 99 | } |
100 | 100 | ||
@@ -316,7 +316,7 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, | |||
316 | if (!pll) | 316 | if (!pll) |
317 | return ERR_PTR(-ENOMEM); | 317 | return ERR_PTR(-ENOMEM); |
318 | 318 | ||
319 | pll->powerdown = BM_PLL_POWER; | 319 | pll->power_bit = BM_PLL_POWER; |
320 | 320 | ||
321 | switch (type) { | 321 | switch (type) { |
322 | case IMX_PLLV3_SYS: | 322 | case IMX_PLLV3_SYS: |
@@ -332,7 +332,7 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, | |||
332 | ops = &clk_pllv3_av_ops; | 332 | ops = &clk_pllv3_av_ops; |
333 | break; | 333 | break; |
334 | case IMX_PLLV3_ENET_IMX7: | 334 | case IMX_PLLV3_ENET_IMX7: |
335 | pll->powerdown = IMX7_ENET_PLL_POWER; | 335 | pll->power_bit = IMX7_ENET_PLL_POWER; |
336 | pll->ref_clock = 1000000000; | 336 | pll->ref_clock = 1000000000; |
337 | ops = &clk_pllv3_enet_ops; | 337 | ops = &clk_pllv3_enet_ops; |
338 | break; | 338 | break; |