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authorArnd Bergmann <arnd@arndb.de>2016-05-10 09:38:13 -0400
committerArnd Bergmann <arnd@arndb.de>2016-05-10 09:38:13 -0400
commitc5e51c98e3177339815e62006a288b3ec83f5067 (patch)
treeb07540499cfb9b37c6021820bb1cb2bee6b0621f
parent48ea582f3dc00174cd4f6d4fb8b62883bc432b3f (diff)
parentf87305fa00b1d0633d2dc5fd7fb4995bed6a59e8 (diff)
Merge tag 'v4.7-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "Rockchip dts32 updates for v4.7 - part2" from Heiko Stübner: This adds the rk3288-miqi as new board, adapts the edp-phy settings to the binding-change that made it into 4.6, adds rk3288 i2c controller nodes and moves the rk3288 thermal data into the soc dtsi, as there really is no need to have that separate file. * tag 'v4.7-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: move the rk3288 thermal data into rk3288.dtsi ARM: dts: rockchip: add MiQi board from mqmaker dt-bindings: add vendor-prefix for mqmaker ARM: dts: rockchip: move rk3288 edp phy under the GRF ARM: dts: rockchip: make rk3288-grf a simple-mfd ARM: dts: rockchip: add i2c nodes for RK3228 SoCs
Diffstat
-rw-r--r--Documentation/devicetree/bindings/arm/rockchip.txt4
-rw-r--r--Documentation/devicetree/bindings/vendor-prefixes.txt1
-rw-r--r--arch/arm/boot/dts/Makefile1
-rw-r--r--arch/arm/boot/dts/rk3228.dtsi80
-rw-r--r--arch/arm/boot/dts/rk3288-miqi.dts472
-rw-r--r--arch/arm/boot/dts/rk3288-thermal.dtsi118
-rw-r--r--arch/arm/boot/dts/rk3288.dtsi92
7 files changed, 639 insertions, 129 deletions
diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
index 078c14fcdaaa..585496f203df 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -87,6 +87,10 @@ Rockchip platforms device tree bindings
87 "google,veyron-speedy-rev3", "google,veyron-speedy-rev2", 87 "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
88 "google,veyron-speedy", "google,veyron", "rockchip,rk3288"; 88 "google,veyron-speedy", "google,veyron", "rockchip,rk3288";
89 89
90- mqmaker MiQi:
91 Required root node properties:
92 - compatible = "mqmaker,miqi", "rockchip,rk3288";
93
90- Rockchip RK3368 evb: 94- Rockchip RK3368 evb:
91 Required root node properties: 95 Required root node properties:
92 - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368"; 96 - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index b3404e26df12..dfe3db7c7108 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -153,6 +153,7 @@ mitsubishi Mitsubishi Electric Corporation
153mosaixtech Mosaix Technologies, Inc. 153mosaixtech Mosaix Technologies, Inc.
154moxa Moxa 154moxa Moxa
155mpl MPL AG 155mpl MPL AG
156mqmaker mqmaker Inc.
156msi Micro-Star International Co. Ltd. 157msi Micro-Star International Co. Ltd.
157mti Imagination Technologies Ltd. (formerly MIPS Technologies Inc.) 158mti Imagination Technologies Ltd. (formerly MIPS Technologies Inc.)
158mundoreader Mundo Reader S.L. 159mundoreader Mundo Reader S.L.
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 3828f1e0c172..6ab3605293ec 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -603,6 +603,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
603 rk3288-evb-rk808.dtb \ 603 rk3288-evb-rk808.dtb \
604 rk3288-firefly-beta.dtb \ 604 rk3288-firefly-beta.dtb \
605 rk3288-firefly.dtb \ 605 rk3288-firefly.dtb \
606 rk3288-miqi.dtb \
606 rk3288-popmetal.dtb \ 607 rk3288-popmetal.dtb \
607 rk3288-r89.dtb \ 608 rk3288-r89.dtb \
608 rk3288-rock2-square.dtb \ 609 rk3288-rock2-square.dtb \
diff --git a/arch/arm/boot/dts/rk3228.dtsi b/arch/arm/boot/dts/rk3228.dtsi
index f9c34124ccc3..e23a22e29155 100644
--- a/arch/arm/boot/dts/rk3228.dtsi
+++ b/arch/arm/boot/dts/rk3228.dtsi
@@ -187,6 +187,58 @@
187 status = "disabled"; 187 status = "disabled";
188 }; 188 };
189 189
190 i2c0: i2c@11050000 {
191 compatible = "rockchip,rk3228-i2c";
192 reg = <0x11050000 0x1000>;
193 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
194 #address-cells = <1>;
195 #size-cells = <0>;
196 clock-names = "i2c";
197 clocks = <&cru PCLK_I2C0>;
198 pinctrl-names = "default";
199 pinctrl-0 = <&i2c0_xfer>;
200 status = "disabled";
201 };
202
203 i2c1: i2c@11060000 {
204 compatible = "rockchip,rk3228-i2c";
205 reg = <0x11060000 0x1000>;
206 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
207 #address-cells = <1>;
208 #size-cells = <0>;
209 clock-names = "i2c";
210 clocks = <&cru PCLK_I2C1>;
211 pinctrl-names = "default";
212 pinctrl-0 = <&i2c1_xfer>;
213 status = "disabled";
214 };
215
216 i2c2: i2c@11070000 {
217 compatible = "rockchip,rk3228-i2c";
218 reg = <0x11070000 0x1000>;
219 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
220 #address-cells = <1>;
221 #size-cells = <0>;
222 clock-names = "i2c";
223 clocks = <&cru PCLK_I2C2>;
224 pinctrl-names = "default";
225 pinctrl-0 = <&i2c2_xfer>;
226 status = "disabled";
227 };
228
229 i2c3: i2c@11080000 {
230 compatible = "rockchip,rk3228-i2c";
231 reg = <0x11080000 0x1000>;
232 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
233 #address-cells = <1>;
234 #size-cells = <0>;
235 clock-names = "i2c";
236 clocks = <&cru PCLK_I2C3>;
237 pinctrl-names = "default";
238 pinctrl-0 = <&i2c3_xfer>;
239 status = "disabled";
240 };
241
190 pwm0: pwm@110b0000 { 242 pwm0: pwm@110b0000 {
191 compatible = "rockchip,rk3288-pwm"; 243 compatible = "rockchip,rk3288-pwm";
192 reg = <0x110b0000 0x10>; 244 reg = <0x110b0000 0x10>;
@@ -429,6 +481,34 @@
429 }; 481 };
430 }; 482 };
431 483
484 i2c0 {
485 i2c0_xfer: i2c0-xfer {
486 rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,
487 <0 1 RK_FUNC_1 &pcfg_pull_none>;
488 };
489 };
490
491 i2c1 {
492 i2c1_xfer: i2c1-xfer {
493 rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
494 <0 3 RK_FUNC_1 &pcfg_pull_none>;
495 };
496 };
497
498 i2c2 {
499 i2c2_xfer: i2c2-xfer {
500 rockchip,pins = <2 20 RK_FUNC_1 &pcfg_pull_none>,
501 <2 21 RK_FUNC_1 &pcfg_pull_none>;
502 };
503 };
504
505 i2c3 {
506 i2c3_xfer: i2c3-xfer {
507 rockchip,pins = <0 6 RK_FUNC_1 &pcfg_pull_none>,
508 <0 7 RK_FUNC_1 &pcfg_pull_none>;
509 };
510 };
511
432 pwm0 { 512 pwm0 {
433 pwm0_pin: pwm0-pin { 513 pwm0_pin: pwm0-pin {
434 rockchip,pins = <3 21 RK_FUNC_1 &pcfg_pull_none>; 514 rockchip,pins = <3 21 RK_FUNC_1 &pcfg_pull_none>;
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
new file mode 100644
index 000000000000..8643103d8cd8
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -0,0 +1,472 @@
1/*
2 * Copyright (c) 2016 Heiko Stuebner <heiko@sntech.de>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include <dt-bindings/input/input.h>
45#include "rk3288.dtsi"
46
47/ {
48 model = "mqmaker MiQi";
49 compatible = "mqmaker,miqi", "rockchip,rk3288";
50
51 chosen {
52 stdout-path = "serial2:115200n8";
53 };
54
55 memory {
56 device_type = "memory";
57 reg = <0 0x80000000>;
58 };
59
60 ext_gmac: external-gmac-clock {
61 compatible = "fixed-clock";
62 #clock-cells = <0>;
63 clock-frequency = <125000000>;
64 clock-output-names = "ext_gmac";
65 };
66
67 io_domains: io-domains {
68 compatible = "rockchip,rk3288-io-voltage-domain";
69
70 audio-supply = <&vcca_33>;
71 flash0-supply = <&vcc_flash>;
72 flash1-supply = <&vcc_lan>;
73 gpio30-supply = <&vcc_io>;
74 gpio1830-supply = <&vcc_io>;
75 lcdc-supply = <&vcc_io>;
76 sdcard-supply = <&vccio_sd>;
77 wifi-supply = <&vcc_18>;
78 };
79
80 leds {
81 compatible = "gpio-leds";
82
83 work {
84 gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
85 label = "miqi:green:user";
86 linux,default-trigger = "default-on";
87 pinctrl-names = "default";
88 pinctrl-0 = <&led_ctl>;
89 };
90 };
91
92 vcc_flash: flash-regulator {
93 compatible = "regulator-fixed";
94 regulator-name = "vcc_flash";
95 regulator-min-microvolt = <1800000>;
96 regulator-max-microvolt = <1800000>;
97 vin-supply = <&vcc_io>;
98 };
99
100 vcc_host: usb-host-regulator {
101 compatible = "regulator-fixed";
102 enable-active-high;
103 gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
104 pinctrl-names = "default";
105 pinctrl-0 = <&host_vbus_drv>;
106 regulator-name = "vcc_host";
107 regulator-min-microvolt = <5000000>;
108 regulator-max-microvolt = <5000000>;
109 regulator-always-on;
110 vin-supply = <&vcc_sys>;
111 };
112
113 vcc_sd: sdmmc-regulator {
114 compatible = "regulator-fixed";
115 gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
116 pinctrl-names = "default";
117 pinctrl-0 = <&sdmmc_pwr>;
118 regulator-name = "vcc_sd";
119 regulator-min-microvolt = <3300000>;
120 regulator-max-microvolt = <3300000>;
121 startup-delay-us = <100000>;
122 vin-supply = <&vcc_io>;
123 };
124
125 vcc_sys: vsys-regulator {
126 compatible = "regulator-fixed";
127 regulator-name = "vcc_sys";
128 regulator-min-microvolt = <5000000>;
129 regulator-max-microvolt = <5000000>;
130 regulator-always-on;
131 regulator-boot-on;
132 };
133};
134
135&cpu0 {
136 cpu0-supply = <&vdd_cpu>;
137};
138
139&emmc {
140 bus-width = <8>;
141 cap-mmc-highspeed;
142 disable-wp;
143 non-removable;
144 num-slots = <1>;
145 pinctrl-names = "default";
146 pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
147 vmmc-supply = <&vcc_io>;
148 vqmmc-supply = <&vcc_flash>;
149 status = "okay";
150};
151
152&gmac {
153 assigned-clocks = <&cru SCLK_MAC>;
154 assigned-clock-parents = <&ext_gmac>;
155 clock_in_out = "input";
156 pinctrl-names = "default";
157 pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
158 phy-supply = <&vcc_lan>;
159 phy-mode = "rgmii";
160 snps,reset-active-low;
161 snps,reset-delays-us = <0 10000 1000000>;
162 snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
163 tx_delay = <0x30>;
164 rx_delay = <0x10>;
165 status = "ok";
166};
167
168&hdmi {
169 ddc-i2c-bus = <&i2c5>;
170 status = "okay";
171};
172
173&i2c0 {
174 clock-frequency = <400000>;
175 status = "okay";
176
177 vdd_cpu: syr827@40 {
178 compatible = "silergy,syr827";
179 fcs,suspend-voltage-selector = <1>;
180 reg = <0x40>;
181 regulator-name = "vdd_cpu";
182 regulator-min-microvolt = <850000>;
183 regulator-max-microvolt = <1350000>;
184 regulator-always-on;
185 regulator-boot-on;
186 regulator-enable-ramp-delay = <300>;
187 regulator-ramp-delay = <8000>;
188 vin-supply = <&vcc_sys>;
189 };
190
191 vdd_gpu: syr828@41 {
192 compatible = "silergy,syr828";
193 fcs,suspend-voltage-selector = <1>;
194 reg = <0x41>;
195 regulator-name = "vdd_gpu";
196 regulator-min-microvolt = <850000>;
197 regulator-max-microvolt = <1350000>;
198 regulator-always-on;
199 vin-supply = <&vcc_sys>;
200 };
201
202 hym8563: hym8563@51 {
203 compatible = "haoyu,hym8563";
204 reg = <0x51>;
205 #clock-cells = <0>;
206 clock-frequency = <32768>;
207 clock-output-names = "xin32k";
208 };
209
210 act8846: act8846@5a {
211 compatible = "active-semi,act8846";
212 reg = <0x5a>;
213 pinctrl-names = "default";
214 pinctrl-0 = <&pmic_vsel>;
215 system-power-controller;
216
217 vp1-supply = <&vcc_sys>;
218 vp2-supply = <&vcc_sys>;
219 vp3-supply = <&vcc_sys>;
220 vp4-supply = <&vcc_sys>;
221 inl1-supply = <&vcc_sys>;
222 inl2-supply = <&vcc_sys>;
223 inl3-supply = <&vcc_20>;
224
225 regulators {
226 vcc_ddr: REG1 {
227 regulator-name = "vcc_ddr";
228 regulator-always-on;
229 };
230
231 vcc_io: REG2 {
232 regulator-name = "vcc_io";
233 regulator-min-microvolt = <3300000>;
234 regulator-max-microvolt = <3300000>;
235 regulator-always-on;
236 };
237
238 vdd_log: REG3 {
239 regulator-name = "vdd_log";
240 regulator-min-microvolt = <1100000>;
241 regulator-max-microvolt = <1100000>;
242 regulator-always-on;
243 };
244
245 vcc_20: REG4 {
246 regulator-name = "vcc_20";
247 regulator-min-microvolt = <2000000>;
248 regulator-max-microvolt = <2000000>;
249 regulator-always-on;
250 };
251
252 vccio_sd: REG5 {
253 regulator-name = "vccio_sd";
254 regulator-min-microvolt = <3300000>;
255 regulator-max-microvolt = <3300000>;
256 regulator-always-on;
257 };
258
259 vdd10_lcd: REG6 {
260 regulator-name = "vdd10_lcd";
261 regulator-min-microvolt = <1000000>;
262 regulator-max-microvolt = <1000000>;
263 regulator-always-on;
264 };
265
266 vcca_18: REG7 {
267 regulator-name = "vcca_18";
268 regulator-min-microvolt = <1800000>;
269 regulator-max-microvolt = <1800000>;
270 };
271
272 vcca_33: REG8 {
273 regulator-name = "vcca_33";
274 regulator-min-microvolt = <3300000>;
275 regulator-max-microvolt = <3300000>;
276 };
277
278 vcc_lan: REG9 {
279 regulator-name = "vcc_lan";
280 regulator-min-microvolt = <3300000>;
281 regulator-max-microvolt = <3300000>;
282 };
283
284 vdd_10: REG10 {
285 regulator-name = "vdd_10";
286 regulator-min-microvolt = <1000000>;
287 regulator-max-microvolt = <1000000>;
288 regulator-always-on;
289 };
290
291 vcc_18: REG11 {
292 regulator-name = "vcc_18";
293 regulator-min-microvolt = <1800000>;
294 regulator-max-microvolt = <1800000>;
295 regulator-always-on;
296 };
297
298 vcc18_lcd: REG12 {
299 regulator-name = "vcc18_lcd";
300 regulator-min-microvolt = <1800000>;
301 regulator-max-microvolt = <1800000>;
302 regulator-always-on;
303 };
304 };
305 };
306};
307
308&i2c1 {
309 status = "okay";
310};
311
312&i2c2 {
313 status = "okay";
314};
315
316&i2c4 {
317 status = "okay";
318};
319
320&i2c5 {
321 status = "okay";
322};
323
324&pinctrl {
325 pcfg_output_high: pcfg-output-high {
326 output-high;
327 };
328
329 pcfg_output_low: pcfg-output-low {
330 output-low;
331 };
332
333 pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma {
334 bias-pull-up;
335 drive-strength = <12>;
336 };
337
338 act8846 {
339 pmic_int: pmic-int {
340 rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
341 };
342
343 pmic_sleep: pmic-sleep {
344 rockchip,pins = <0 0 RK_FUNC_GPIO &pcfg_output_low>;
345 };
346
347 pmic_vsel: pmic-vsel {
348 rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>;
349 };
350 };
351
352 gmac {
353 phy_int: phy-int {
354 rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
355 };
356
357 phy_pmeb: phy-pmeb {
358 rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
359 };
360
361 phy_rst: phy-rst {
362 rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
363 };
364 };
365
366 leds {
367 led_ctl: led-ctl {
368 rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_none>;
369 };
370 };
371
372 sdmmc {
373 /*
374 * Default drive strength isn't enough to achieve even
375 * high-speed mode on firefly board so bump up to 12ma.
376 */
377 sdmmc_bus4: sdmmc-bus4 {
378 rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
379 <6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
380 <6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
381 <6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
382 };
383
384 sdmmc_clk: sdmmc-clk {
385 rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
386 };
387
388 sdmmc_cmd: sdmmc-cmd {
389 rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
390 };
391
392 sdmmc_pwr: sdmmc-pwr {
393 rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
394 };
395 };
396
397 usb_host {
398 host_vbus_drv: host-vbus-drv {
399 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
400 };
401 };
402};
403
404&saradc {
405 vref-supply = <&vcc_18>;
406 status = "okay";
407};
408
409&sdmmc {
410 bus-width = <4>;
411 cap-mmc-highspeed;
412 cap-sd-highspeed;
413 card-detect-delay = <200>;
414 disable-wp;
415 num-slots = <1>;
416 pinctrl-names = "default";
417 pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
418 vmmc-supply = <&vcc_sd>;
419 vqmmc-supply = <&vccio_sd>;
420 status = "okay";
421};
422
423&tsadc {
424 rockchip,hw-tshut-mode = <0>;
425 rockchip,hw-tshut-polarity = <0>;
426 status = "okay";
427};
428
429&uart2 {
430 status = "okay";
431};
432
433&uart3 {
434 status = "okay";
435};
436
437&usbphy {
438 status = "okay";
439};
440
441&usb_host1 {
442 status = "okay";
443};
444
445&usb_otg {
446 /*
447 * The otg controller is the only system power source,
448 * so needs to always stay in device mode.
449 */
450 dr_mode = "peripheral";
451 status = "okay";
452};
453
454&vopb {
455 status = "okay";
456};
457
458&vopb_mmu {
459 status = "okay";
460};
461
462&vopl {
463 status = "okay";
464};
465
466&vopl_mmu {
467 status = "okay";
468};
469
470&wdt {
471 status = "okay";
472};
diff --git a/arch/arm/boot/dts/rk3288-thermal.dtsi b/arch/arm/boot/dts/rk3288-thermal.dtsi
deleted file mode 100644
index 651b962e3d53..000000000000
--- a/arch/arm/boot/dts/rk3288-thermal.dtsi
+++ /dev/null
@@ -1,118 +0,0 @@
1/*
2 * Device Tree Source for RK3288 SoC thermal
3 *
4 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45#include <dt-bindings/thermal/thermal.h>
46
47reserve_thermal: reserve_thermal {
48 polling-delay-passive = <1000>; /* milliseconds */
49 polling-delay = <5000>; /* milliseconds */
50
51 thermal-sensors = <&tsadc 0>;
52};
53
54cpu_thermal: cpu_thermal {
55 polling-delay-passive = <100>; /* milliseconds */
56 polling-delay = <5000>; /* milliseconds */
57
58 thermal-sensors = <&tsadc 1>;
59
60 trips {
61 cpu_alert0: cpu_alert0 {
62 temperature = <70000>; /* millicelsius */
63 hysteresis = <2000>; /* millicelsius */
64 type = "passive";
65 };
66 cpu_alert1: cpu_alert1 {
67 temperature = <75000>; /* millicelsius */
68 hysteresis = <2000>; /* millicelsius */
69 type = "passive";
70 };
71 cpu_crit: cpu_crit {
72 temperature = <90000>; /* millicelsius */
73 hysteresis = <2000>; /* millicelsius */
74 type = "critical";
75 };
76 };
77
78 cooling-maps {
79 map0 {
80 trip = <&cpu_alert0>;
81 cooling-device =
82 <&cpu0 THERMAL_NO_LIMIT 6>;
83 };
84 map1 {
85 trip = <&cpu_alert1>;
86 cooling-device =
87 <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
88 };
89 };
90};
91
92gpu_thermal: gpu_thermal {
93 polling-delay-passive = <100>; /* milliseconds */
94 polling-delay = <5000>; /* milliseconds */
95
96 thermal-sensors = <&tsadc 2>;
97
98 trips {
99 gpu_alert0: gpu_alert0 {
100 temperature = <70000>; /* millicelsius */
101 hysteresis = <2000>; /* millicelsius */
102 type = "passive";
103 };
104 gpu_crit: gpu_crit {
105 temperature = <90000>; /* millicelsius */
106 hysteresis = <2000>; /* millicelsius */
107 type = "critical";
108 };
109 };
110
111 cooling-maps {
112 map0 {
113 trip = <&gpu_alert0>;
114 cooling-device =
115 <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
116 };
117 };
118};
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 3071e94e86ed..3b44ef3cff12 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -201,15 +201,6 @@
201 #clock-cells = <0>; 201 #clock-cells = <0>;
202 }; 202 };
203 203
204 edp_phy: edp-phy {
205 compatible = "rockchip,rk3288-dp-phy";
206 clocks = <&cru SCLK_EDP_24M>;
207 clock-names = "24m";
208 rockchip,grf = <&grf>;
209 #phy-cells = <0>;
210 status = "disabled";
211 };
212
213 timer { 204 timer {
214 compatible = "arm,armv7-timer"; 205 compatible = "arm,armv7-timer";
215 arm,cpu-registers-not-fw-configured; 206 arm,cpu-registers-not-fw-configured;
@@ -454,7 +445,78 @@
454 }; 445 };
455 446
456 thermal-zones { 447 thermal-zones {
457 #include "rk3288-thermal.dtsi" 448 reserve_thermal: reserve_thermal {
449 polling-delay-passive = <1000>; /* milliseconds */
450 polling-delay = <5000>; /* milliseconds */
451
452 thermal-sensors = <&tsadc 0>;
453 };
454
455 cpu_thermal: cpu_thermal {
456 polling-delay-passive = <100>; /* milliseconds */
457 polling-delay = <5000>; /* milliseconds */
458
459 thermal-sensors = <&tsadc 1>;
460
461 trips {
462 cpu_alert0: cpu_alert0 {
463 temperature = <70000>; /* millicelsius */
464 hysteresis = <2000>; /* millicelsius */
465 type = "passive";
466 };
467 cpu_alert1: cpu_alert1 {
468 temperature = <75000>; /* millicelsius */
469 hysteresis = <2000>; /* millicelsius */
470 type = "passive";
471 };
472 cpu_crit: cpu_crit {
473 temperature = <90000>; /* millicelsius */
474 hysteresis = <2000>; /* millicelsius */
475 type = "critical";
476 };
477 };
478
479 cooling-maps {
480 map0 {
481 trip = <&cpu_alert0>;
482 cooling-device =
483 <&cpu0 THERMAL_NO_LIMIT 6>;
484 };
485 map1 {
486 trip = <&cpu_alert1>;
487 cooling-device =
488 <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
489 };
490 };
491 };
492
493 gpu_thermal: gpu_thermal {
494 polling-delay-passive = <100>; /* milliseconds */
495 polling-delay = <5000>; /* milliseconds */
496
497 thermal-sensors = <&tsadc 2>;
498
499 trips {
500 gpu_alert0: gpu_alert0 {
501 temperature = <70000>; /* millicelsius */
502 hysteresis = <2000>; /* millicelsius */
503 type = "passive";
504 };
505 gpu_crit: gpu_crit {
506 temperature = <90000>; /* millicelsius */
507 hysteresis = <2000>; /* millicelsius */
508 type = "critical";
509 };
510 };
511
512 cooling-maps {
513 map0 {
514 trip = <&gpu_alert0>;
515 cooling-device =
516 <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
517 };
518 };
519 };
458 }; 520 };
459 521
460 tsadc: tsadc@ff280000 { 522 tsadc: tsadc@ff280000 {
@@ -754,8 +816,16 @@
754 }; 816 };
755 817
756 grf: syscon@ff770000 { 818 grf: syscon@ff770000 {
757 compatible = "rockchip,rk3288-grf", "syscon"; 819 compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd";
758 reg = <0xff770000 0x1000>; 820 reg = <0xff770000 0x1000>;
821
822 edp_phy: edp-phy {
823 compatible = "rockchip,rk3288-dp-phy";
824 clocks = <&cru SCLK_EDP_24M>;
825 clock-names = "24m";
826 #phy-cells = <0>;
827 status = "disabled";
828 };
759 }; 829 };
760 830
761 wdt: watchdog@ff800000 { 831 wdt: watchdog@ff800000 {
generated by cgit v1.2.2 (git 2.25.0) at 2026-04-27 14:32:19 -0400