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authorHauke Mehrtens <hauke@hauke-m.de>2017-09-04 07:57:15 -0400
committerRalf Baechle <ralf@linux-mips.org>2017-09-04 15:11:40 -0400
commitc5aba1cdd3d31cbf3c8e9d571c9a4db952117970 (patch)
treea8d58488c14fffa3f6be945294375d50d3b462f2
parent2b6639d4c794749d5fe7f071e7c66e0a9a12cc84 (diff)
Documentation: DT: MIPS: lantiq: Add docs for the RCU bindings
This adds the initial documentation for the RCU module (a MFD device which provides USB PHYs, reset controllers and more). The RCU register range is used for multiple purposes. Mostly one device uses one or multiple register exclusively, but for some registers some bits are for one driver and some other bits are for a different driver. With this patch all accesses to the RCU registers will go through syscon. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Rob Herring <robh@kernel.org> Cc: john@phrozen.org Cc: andy.shevchenko@gmail.com Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17121/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--Documentation/devicetree/bindings/mips/lantiq/rcu.txt89
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diff --git a/Documentation/devicetree/bindings/mips/lantiq/rcu.txt b/Documentation/devicetree/bindings/mips/lantiq/rcu.txt
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1Lantiq XWAY SoC RCU binding
2===========================
3
4This binding describes the RCU (reset controller unit) multifunction device,
5where each sub-device has it's own set of registers.
6
7The RCU register range is used for multiple purposes. Mostly one device
8uses one or multiple register exclusively, but for some registers some
9bits are for one driver and some other bits are for a different driver.
10With this patch all accesses to the RCU registers will go through
11syscon.
12
13
14-------------------------------------------------------------------------------
15Required properties:
16- compatible : The first and second values must be:
17 "lantiq,xrx200-rcu", "simple-mfd", "syscon"
18- reg : The address and length of the system control registers
19
20
21-------------------------------------------------------------------------------
22Example of the RCU bindings on a xRX200 SoC:
23 rcu0: rcu@203000 {
24 compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon";
25 reg = <0x203000 0x100>;
26 ranges = <0x0 0x203000 0x100>;
27 big-endian;
28
29 gphy0: gphy@20 {
30 compatible = "lantiq,xrx200a2x-gphy";
31 reg = <0x20 0x4>;
32
33 resets = <&reset0 31 30>, <&reset1 7 7>;
34 reset-names = "gphy", "gphy2";
35 lantiq,gphy-mode = <GPHY_MODE_GE>;
36 };
37
38 gphy1: gphy@68 {
39 compatible = "lantiq,xrx200a2x-gphy";
40 reg = <0x68 0x4>;
41
42 resets = <&reset0 29 28>, <&reset1 6 6>;
43 reset-names = "gphy", "gphy2";
44 lantiq,gphy-mode = <GPHY_MODE_GE>;
45 };
46
47 reset0: reset-controller@10 {
48 compatible = "lantiq,xrx200-reset";
49 reg = <0x10 4>, <0x14 4>;
50
51 #reset-cells = <2>;
52 };
53
54 reset1: reset-controller@48 {
55 compatible = "lantiq,xrx200-reset";
56 reg = <0x48 4>, <0x24 4>;
57
58 #reset-cells = <2>;
59 };
60
61 usb_phy0: usb2-phy@18 {
62 compatible = "lantiq,xrx200-usb2-phy";
63 reg = <0x18 4>, <0x38 4>;
64 status = "disabled";
65
66 resets = <&reset1 4 4>, <&reset0 4 4>;
67 reset-names = "phy", "ctrl";
68 #phy-cells = <0>;
69 };
70
71 usb_phy1: usb2-phy@34 {
72 compatible = "lantiq,xrx200-usb2-phy";
73 reg = <0x34 4>, <0x3C 4>;
74 status = "disabled";
75
76 resets = <&reset1 5 4>, <&reset0 4 4>;
77 reset-names = "phy", "ctrl";
78 #phy-cells = <0>;
79 };
80
81 reboot@10 {
82 compatible = "syscon-reboot";
83 reg = <0x10 4>;
84
85 regmap = <&rcu0>;
86 offset = <0x10>;
87 mask = <0x40000000>;
88 };
89 };