diff options
author | Simon Horman <horms+renesas@verge.net.au> | 2016-09-08 07:57:33 -0400 |
---|---|---|
committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-09-12 04:58:23 -0400 |
commit | c5901bdcbc6142b686b15d0b4a959aa19a350af1 (patch) | |
tree | 9806dcd20d409949ac4826a0739888eede73372e | |
parent | 40ade582194668aa4336a30f96c9d592c46a1928 (diff) |
pinctrl: sh-pfc: r8a7796: Add voltage switch operations for SDHI
This patch supports the {get,set}_io_voltage operations of SDHI.
This operates the POCCTRL0 register on R8A7796 SoC and makes 1.8v/3.3v
voltage switch.
Based on work by Takeshi Kihara and Wolfram Sang.
Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 28 |
1 files changed, 26 insertions, 2 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c index f8ab74dd0506..dc9b671ccf2e 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c | |||
@@ -23,8 +23,12 @@ | |||
23 | PORT_GP_16(0, fn, sfx), \ | 23 | PORT_GP_16(0, fn, sfx), \ |
24 | PORT_GP_29(1, fn, sfx), \ | 24 | PORT_GP_29(1, fn, sfx), \ |
25 | PORT_GP_15(2, fn, sfx), \ | 25 | PORT_GP_15(2, fn, sfx), \ |
26 | PORT_GP_16(3, fn, sfx), \ | 26 | PORT_GP_CFG_12(3, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ |
27 | PORT_GP_18(4, fn, sfx), \ | 27 | PORT_GP_1(3, 12, fn, sfx), \ |
28 | PORT_GP_1(3, 13, fn, sfx), \ | ||
29 | PORT_GP_1(3, 14, fn, sfx), \ | ||
30 | PORT_GP_1(3, 15, fn, sfx), \ | ||
31 | PORT_GP_CFG_18(4, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ | ||
28 | PORT_GP_26(5, fn, sfx), \ | 32 | PORT_GP_26(5, fn, sfx), \ |
29 | PORT_GP_32(6, fn, sfx), \ | 33 | PORT_GP_32(6, fn, sfx), \ |
30 | PORT_GP_4(7, fn, sfx) | 34 | PORT_GP_4(7, fn, sfx) |
@@ -2627,8 +2631,28 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { | |||
2627 | { }, | 2631 | { }, |
2628 | }; | 2632 | }; |
2629 | 2633 | ||
2634 | static int r8a7796_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl) | ||
2635 | { | ||
2636 | int bit = -EINVAL; | ||
2637 | |||
2638 | *pocctrl = 0xe6060380; | ||
2639 | |||
2640 | if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11)) | ||
2641 | bit = pin & 0x1f; | ||
2642 | |||
2643 | if (pin >= RCAR_GP_PIN(4, 0) && pin <= RCAR_GP_PIN(4, 17)) | ||
2644 | bit = (pin & 0x1f) + 12; | ||
2645 | |||
2646 | return bit; | ||
2647 | } | ||
2648 | |||
2649 | static const struct sh_pfc_soc_operations r8a7796_pinmux_ops = { | ||
2650 | .pin_to_pocctrl = r8a7796_pin_to_pocctrl, | ||
2651 | }; | ||
2652 | |||
2630 | const struct sh_pfc_soc_info r8a7796_pinmux_info = { | 2653 | const struct sh_pfc_soc_info r8a7796_pinmux_info = { |
2631 | .name = "r8a77960_pfc", | 2654 | .name = "r8a77960_pfc", |
2655 | .ops = &r8a7796_pinmux_ops, | ||
2632 | .unlock_reg = 0xe6060000, /* PMMR */ | 2656 | .unlock_reg = 0xe6060000, /* PMMR */ |
2633 | 2657 | ||
2634 | .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, | 2658 | .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, |