aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorChen-Yu Tsai <wens@csie.org>2017-07-14 02:42:52 -0400
committerChen-Yu Tsai <wens@csie.org>2017-07-27 09:18:48 -0400
commitc50f9fb6c535edf4731eecb53d91ebc297e82e5b (patch)
tree25b3fb508792f9c94cd321ff84fd869171063ae6
parent3a4bae5fd44aa1cf49780dd25b3a89e6a39e8560 (diff)
ARM: dts: sun8i: a83t: Switch to CCU device tree binding macros
Now that the CCU device tree binding headers have been merged, we can use the properly named macros in the device tree, instead of raw numbers. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-rw-r--r--arch/arm/boot/dts/sun8i-a83t.dtsi16
1 files changed, 9 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 8923ba625b76..19a8f4fcfab5 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -44,7 +44,9 @@
44 44
45#include <dt-bindings/interrupt-controller/arm-gic.h> 45#include <dt-bindings/interrupt-controller/arm-gic.h>
46 46
47#include <dt-bindings/clock/sun8i-a83t-ccu.h>
47#include <dt-bindings/clock/sun8i-r-ccu.h> 48#include <dt-bindings/clock/sun8i-r-ccu.h>
49#include <dt-bindings/reset/sun8i-a83t-ccu.h>
48 50
49/ { 51/ {
50 interrupt-parent = <&gic>; 52 interrupt-parent = <&gic>;
@@ -175,8 +177,8 @@
175 compatible = "allwinner,sun8i-a83t-dma"; 177 compatible = "allwinner,sun8i-a83t-dma";
176 reg = <0x01c02000 0x1000>; 178 reg = <0x01c02000 0x1000>;
177 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 179 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
178 clocks = <&ccu 21>; 180 clocks = <&ccu CLK_BUS_DMA>;
179 resets = <&ccu 7>; 181 resets = <&ccu RST_BUS_DMA>;
180 #dma-cells = <1>; 182 #dma-cells = <1>;
181 }; 183 };
182 184
@@ -195,7 +197,7 @@
195 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 197 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
196 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 198 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
197 reg = <0x01c20800 0x400>; 199 reg = <0x01c20800 0x400>;
198 clocks = <&ccu 45>, <&osc24M>, <&osc16Md512>; 200 clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc16Md512>;
199 clock-names = "apb", "hosc", "losc"; 201 clock-names = "apb", "hosc", "losc";
200 gpio-controller; 202 gpio-controller;
201 interrupt-controller; 203 interrupt-controller;
@@ -247,8 +249,8 @@
247 "allwinner,sun8i-h3-spdif"; 249 "allwinner,sun8i-h3-spdif";
248 reg = <0x01c21000 0x400>; 250 reg = <0x01c21000 0x400>;
249 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 251 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
250 clocks = <&ccu 44>, <&ccu 76>; 252 clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
251 resets = <&ccu 32>; 253 resets = <&ccu RST_BUS_SPDIF>;
252 clock-names = "apb", "spdif"; 254 clock-names = "apb", "spdif";
253 dmas = <&dma 2>; 255 dmas = <&dma 2>;
254 dma-names = "tx"; 256 dma-names = "tx";
@@ -263,8 +265,8 @@
263 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; 265 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
264 reg-shift = <2>; 266 reg-shift = <2>;
265 reg-io-width = <4>; 267 reg-io-width = <4>;
266 clocks = <&ccu 53>; 268 clocks = <&ccu CLK_BUS_UART0>;
267 resets = <&ccu 40>; 269 resets = <&ccu RST_BUS_UART0>;
268 status = "disabled"; 270 status = "disabled";
269 }; 271 };
270 272