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authorRafael J. Wysocki <rafael.j.wysocki@intel.com>2016-01-07 19:11:49 -0500
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2016-01-07 19:11:49 -0500
commitc4e4d631feb3be4ddf885e647127fddebb450334 (patch)
tree72b38ba229ab010d131f583ef67cb792a23f0280
parent4295733eee4e69eda432d95765b7762dc6013271 (diff)
parentd35818a9153e7f230fd65dc935e001a1b9bc08ff (diff)
Merge branch 'acpi-soc' into pm-core
-rw-r--r--arch/x86/Kconfig3
-rw-r--r--arch/x86/include/asm/iosf_mbi.h51
-rw-r--r--arch/x86/platform/atom/punit_atom_debug.c7
-rw-r--r--arch/x86/platform/intel-quark/imr.c28
-rw-r--r--drivers/acpi/acpi_apd.c16
-rw-r--r--drivers/acpi/acpi_lpss.c213
-rw-r--r--drivers/base/dd.c10
-rw-r--r--drivers/base/power/clock_ops.c1
-rw-r--r--drivers/dma/dw/core.c9
-rw-r--r--drivers/dma/dw/platform.c29
-rw-r--r--drivers/i2c/busses/i2c-designware-baytrail.c17
-rw-r--r--drivers/i2c/busses/i2c-designware-platdrv.c1
-rw-r--r--drivers/powercap/intel_rapl.c10
-rw-r--r--drivers/thermal/intel_quark_dts_thermal.c61
-rw-r--r--drivers/thermal/intel_soc_dts_iosf.c43
-rw-r--r--include/linux/device.h1
16 files changed, 333 insertions, 167 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index db3622f22b61..790aa3ee1afa 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -523,9 +523,10 @@ config X86_INTEL_QUARK
523 523
524config X86_INTEL_LPSS 524config X86_INTEL_LPSS
525 bool "Intel Low Power Subsystem Support" 525 bool "Intel Low Power Subsystem Support"
526 depends on ACPI 526 depends on X86 && ACPI
527 select COMMON_CLK 527 select COMMON_CLK
528 select PINCTRL 528 select PINCTRL
529 select IOSF_MBI
529 ---help--- 530 ---help---
530 Select to build support for Intel Low Power Subsystem such as 531 Select to build support for Intel Low Power Subsystem such as
531 found on Intel Lynxpoint PCH. Selecting this option enables 532 found on Intel Lynxpoint PCH. Selecting this option enables
diff --git a/arch/x86/include/asm/iosf_mbi.h b/arch/x86/include/asm/iosf_mbi.h
index b72ad0faa6c5..b41ee164930a 100644
--- a/arch/x86/include/asm/iosf_mbi.h
+++ b/arch/x86/include/asm/iosf_mbi.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * iosf_mbi.h: Intel OnChip System Fabric MailBox access support 2 * Intel OnChip System Fabric MailBox access support
3 */ 3 */
4 4
5#ifndef IOSF_MBI_SYMS_H 5#ifndef IOSF_MBI_SYMS_H
@@ -16,6 +16,18 @@
16#define MBI_MASK_LO 0x000000FF 16#define MBI_MASK_LO 0x000000FF
17#define MBI_ENABLE 0xF0 17#define MBI_ENABLE 0xF0
18 18
19/* IOSF SB read/write opcodes */
20#define MBI_MMIO_READ 0x00
21#define MBI_MMIO_WRITE 0x01
22#define MBI_CFG_READ 0x04
23#define MBI_CFG_WRITE 0x05
24#define MBI_CR_READ 0x06
25#define MBI_CR_WRITE 0x07
26#define MBI_REG_READ 0x10
27#define MBI_REG_WRITE 0x11
28#define MBI_ESRAM_READ 0x12
29#define MBI_ESRAM_WRITE 0x13
30
19/* Baytrail available units */ 31/* Baytrail available units */
20#define BT_MBI_UNIT_AUNIT 0x00 32#define BT_MBI_UNIT_AUNIT 0x00
21#define BT_MBI_UNIT_SMC 0x01 33#define BT_MBI_UNIT_SMC 0x01
@@ -28,50 +40,13 @@
28#define BT_MBI_UNIT_SATA 0xA3 40#define BT_MBI_UNIT_SATA 0xA3
29#define BT_MBI_UNIT_PCIE 0xA6 41#define BT_MBI_UNIT_PCIE 0xA6
30 42
31/* Baytrail read/write opcodes */
32#define BT_MBI_AUNIT_READ 0x10
33#define BT_MBI_AUNIT_WRITE 0x11
34#define BT_MBI_SMC_READ 0x10
35#define BT_MBI_SMC_WRITE 0x11
36#define BT_MBI_CPU_READ 0x10
37#define BT_MBI_CPU_WRITE 0x11
38#define BT_MBI_BUNIT_READ 0x10
39#define BT_MBI_BUNIT_WRITE 0x11
40#define BT_MBI_PMC_READ 0x06
41#define BT_MBI_PMC_WRITE 0x07
42#define BT_MBI_GFX_READ 0x00
43#define BT_MBI_GFX_WRITE 0x01
44#define BT_MBI_SMIO_READ 0x06
45#define BT_MBI_SMIO_WRITE 0x07
46#define BT_MBI_USB_READ 0x06
47#define BT_MBI_USB_WRITE 0x07
48#define BT_MBI_SATA_READ 0x00
49#define BT_MBI_SATA_WRITE 0x01
50#define BT_MBI_PCIE_READ 0x00
51#define BT_MBI_PCIE_WRITE 0x01
52
53/* Quark available units */ 43/* Quark available units */
54#define QRK_MBI_UNIT_HBA 0x00 44#define QRK_MBI_UNIT_HBA 0x00
55#define QRK_MBI_UNIT_HB 0x03 45#define QRK_MBI_UNIT_HB 0x03
56#define QRK_MBI_UNIT_RMU 0x04 46#define QRK_MBI_UNIT_RMU 0x04
57#define QRK_MBI_UNIT_MM 0x05 47#define QRK_MBI_UNIT_MM 0x05
58#define QRK_MBI_UNIT_MMESRAM 0x05
59#define QRK_MBI_UNIT_SOC 0x31 48#define QRK_MBI_UNIT_SOC 0x31
60 49
61/* Quark read/write opcodes */
62#define QRK_MBI_HBA_READ 0x10
63#define QRK_MBI_HBA_WRITE 0x11
64#define QRK_MBI_HB_READ 0x10
65#define QRK_MBI_HB_WRITE 0x11
66#define QRK_MBI_RMU_READ 0x10
67#define QRK_MBI_RMU_WRITE 0x11
68#define QRK_MBI_MM_READ 0x10
69#define QRK_MBI_MM_WRITE 0x11
70#define QRK_MBI_MMESRAM_READ 0x12
71#define QRK_MBI_MMESRAM_WRITE 0x13
72#define QRK_MBI_SOC_READ 0x06
73#define QRK_MBI_SOC_WRITE 0x07
74
75#if IS_ENABLED(CONFIG_IOSF_MBI) 50#if IS_ENABLED(CONFIG_IOSF_MBI)
76 51
77bool iosf_mbi_available(void); 52bool iosf_mbi_available(void);
diff --git a/arch/x86/platform/atom/punit_atom_debug.c b/arch/x86/platform/atom/punit_atom_debug.c
index 5ca8ead91579..81c769e80614 100644
--- a/arch/x86/platform/atom/punit_atom_debug.c
+++ b/arch/x86/platform/atom/punit_atom_debug.c
@@ -25,8 +25,6 @@
25#include <asm/cpu_device_id.h> 25#include <asm/cpu_device_id.h>
26#include <asm/iosf_mbi.h> 26#include <asm/iosf_mbi.h>
27 27
28/* Side band Interface port */
29#define PUNIT_PORT 0x04
30/* Power gate status reg */ 28/* Power gate status reg */
31#define PWRGT_STATUS 0x61 29#define PWRGT_STATUS 0x61
32/* Subsystem config/status Video processor */ 30/* Subsystem config/status Video processor */
@@ -85,9 +83,8 @@ static int punit_dev_state_show(struct seq_file *seq_file, void *unused)
85 83
86 seq_puts(seq_file, "\n\nPUNIT NORTH COMPLEX DEVICES :\n"); 84 seq_puts(seq_file, "\n\nPUNIT NORTH COMPLEX DEVICES :\n");
87 while (punit_devp->name) { 85 while (punit_devp->name) {
88 status = iosf_mbi_read(PUNIT_PORT, BT_MBI_PMC_READ, 86 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
89 punit_devp->reg, 87 punit_devp->reg, &punit_pwr_status);
90 &punit_pwr_status);
91 if (status) { 88 if (status) {
92 seq_printf(seq_file, "%9s : Read Failed\n", 89 seq_printf(seq_file, "%9s : Read Failed\n",
93 punit_devp->name); 90 punit_devp->name);
diff --git a/arch/x86/platform/intel-quark/imr.c b/arch/x86/platform/intel-quark/imr.c
index 0ee619f9fcb7..c1bdafaac3ca 100644
--- a/arch/x86/platform/intel-quark/imr.c
+++ b/arch/x86/platform/intel-quark/imr.c
@@ -111,23 +111,19 @@ static int imr_read(struct imr_device *idev, u32 imr_id, struct imr_regs *imr)
111 u32 reg = imr_id * IMR_NUM_REGS + idev->reg_base; 111 u32 reg = imr_id * IMR_NUM_REGS + idev->reg_base;
112 int ret; 112 int ret;
113 113
114 ret = iosf_mbi_read(QRK_MBI_UNIT_MM, QRK_MBI_MM_READ, 114 ret = iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->addr_lo);
115 reg++, &imr->addr_lo);
116 if (ret) 115 if (ret)
117 return ret; 116 return ret;
118 117
119 ret = iosf_mbi_read(QRK_MBI_UNIT_MM, QRK_MBI_MM_READ, 118 ret = iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->addr_hi);
120 reg++, &imr->addr_hi);
121 if (ret) 119 if (ret)
122 return ret; 120 return ret;
123 121
124 ret = iosf_mbi_read(QRK_MBI_UNIT_MM, QRK_MBI_MM_READ, 122 ret = iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->rmask);
125 reg++, &imr->rmask);
126 if (ret) 123 if (ret)
127 return ret; 124 return ret;
128 125
129 return iosf_mbi_read(QRK_MBI_UNIT_MM, QRK_MBI_MM_READ, 126 return iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->wmask);
130 reg++, &imr->wmask);
131} 127}
132 128
133/** 129/**
@@ -151,31 +147,27 @@ static int imr_write(struct imr_device *idev, u32 imr_id,
151 147
152 local_irq_save(flags); 148 local_irq_save(flags);
153 149
154 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE, reg++, 150 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->addr_lo);
155 imr->addr_lo);
156 if (ret) 151 if (ret)
157 goto failed; 152 goto failed;
158 153
159 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE, 154 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->addr_hi);
160 reg++, imr->addr_hi);
161 if (ret) 155 if (ret)
162 goto failed; 156 goto failed;
163 157
164 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE, 158 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->rmask);
165 reg++, imr->rmask);
166 if (ret) 159 if (ret)
167 goto failed; 160 goto failed;
168 161
169 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE, 162 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->wmask);
170 reg++, imr->wmask);
171 if (ret) 163 if (ret)
172 goto failed; 164 goto failed;
173 165
174 /* Lock bit must be set separately to addr_lo address bits. */ 166 /* Lock bit must be set separately to addr_lo address bits. */
175 if (lock) { 167 if (lock) {
176 imr->addr_lo |= IMR_LOCK; 168 imr->addr_lo |= IMR_LOCK;
177 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE, 169 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE,
178 reg - IMR_NUM_REGS, imr->addr_lo); 170 reg - IMR_NUM_REGS, imr->addr_lo);
179 if (ret) 171 if (ret)
180 goto failed; 172 goto failed;
181 } 173 }
diff --git a/drivers/acpi/acpi_apd.c b/drivers/acpi/acpi_apd.c
index a450e7af877c..d507cf6deda0 100644
--- a/drivers/acpi/acpi_apd.c
+++ b/drivers/acpi/acpi_apd.c
@@ -51,7 +51,7 @@ struct apd_private_data {
51 const struct apd_device_desc *dev_desc; 51 const struct apd_device_desc *dev_desc;
52}; 52};
53 53
54#ifdef CONFIG_X86_AMD_PLATFORM_DEVICE 54#if defined(CONFIG_X86_AMD_PLATFORM_DEVICE) || defined(CONFIG_ARM64)
55#define APD_ADDR(desc) ((unsigned long)&desc) 55#define APD_ADDR(desc) ((unsigned long)&desc)
56 56
57static int acpi_apd_setup(struct apd_private_data *pdata) 57static int acpi_apd_setup(struct apd_private_data *pdata)
@@ -71,6 +71,7 @@ static int acpi_apd_setup(struct apd_private_data *pdata)
71 return 0; 71 return 0;
72} 72}
73 73
74#ifdef CONFIG_X86_AMD_PLATFORM_DEVICE
74static struct apd_device_desc cz_i2c_desc = { 75static struct apd_device_desc cz_i2c_desc = {
75 .setup = acpi_apd_setup, 76 .setup = acpi_apd_setup,
76 .fixed_clk_rate = 133000000, 77 .fixed_clk_rate = 133000000,
@@ -80,6 +81,14 @@ static struct apd_device_desc cz_uart_desc = {
80 .setup = acpi_apd_setup, 81 .setup = acpi_apd_setup,
81 .fixed_clk_rate = 48000000, 82 .fixed_clk_rate = 48000000,
82}; 83};
84#endif
85
86#ifdef CONFIG_ARM64
87static struct apd_device_desc xgene_i2c_desc = {
88 .setup = acpi_apd_setup,
89 .fixed_clk_rate = 100000000,
90};
91#endif
83 92
84#else 93#else
85 94
@@ -132,9 +141,14 @@ static int acpi_apd_create_device(struct acpi_device *adev,
132 141
133static const struct acpi_device_id acpi_apd_device_ids[] = { 142static const struct acpi_device_id acpi_apd_device_ids[] = {
134 /* Generic apd devices */ 143 /* Generic apd devices */
144#ifdef CONFIG_X86_AMD_PLATFORM_DEVICE
135 { "AMD0010", APD_ADDR(cz_i2c_desc) }, 145 { "AMD0010", APD_ADDR(cz_i2c_desc) },
136 { "AMD0020", APD_ADDR(cz_uart_desc) }, 146 { "AMD0020", APD_ADDR(cz_uart_desc) },
137 { "AMD0030", }, 147 { "AMD0030", },
148#endif
149#ifdef CONFIG_ARM64
150 { "APMC0D0F", APD_ADDR(xgene_i2c_desc) },
151#endif
138 { } 152 { }
139}; 153};
140 154
diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
index f9e0d09f7c66..047281a6ae11 100644
--- a/drivers/acpi/acpi_lpss.c
+++ b/drivers/acpi/acpi_lpss.c
@@ -15,6 +15,7 @@
15#include <linux/clk-provider.h> 15#include <linux/clk-provider.h>
16#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/mutex.h>
18#include <linux/platform_device.h> 19#include <linux/platform_device.h>
19#include <linux/platform_data/clk-lpss.h> 20#include <linux/platform_data/clk-lpss.h>
20#include <linux/pm_runtime.h> 21#include <linux/pm_runtime.h>
@@ -26,6 +27,10 @@ ACPI_MODULE_NAME("acpi_lpss");
26 27
27#ifdef CONFIG_X86_INTEL_LPSS 28#ifdef CONFIG_X86_INTEL_LPSS
28 29
30#include <asm/cpu_device_id.h>
31#include <asm/iosf_mbi.h>
32#include <asm/pmc_atom.h>
33
29#define LPSS_ADDR(desc) ((unsigned long)&desc) 34#define LPSS_ADDR(desc) ((unsigned long)&desc)
30 35
31#define LPSS_CLK_SIZE 0x04 36#define LPSS_CLK_SIZE 0x04
@@ -71,7 +76,7 @@ struct lpss_device_desc {
71 void (*setup)(struct lpss_private_data *pdata); 76 void (*setup)(struct lpss_private_data *pdata);
72}; 77};
73 78
74static struct lpss_device_desc lpss_dma_desc = { 79static const struct lpss_device_desc lpss_dma_desc = {
75 .flags = LPSS_CLK, 80 .flags = LPSS_CLK,
76}; 81};
77 82
@@ -84,6 +89,23 @@ struct lpss_private_data {
84 u32 prv_reg_ctx[LPSS_PRV_REG_COUNT]; 89 u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
85}; 90};
86 91
92/* LPSS run time quirks */
93static unsigned int lpss_quirks;
94
95/*
96 * LPSS_QUIRK_ALWAYS_POWER_ON: override power state for LPSS DMA device.
97 *
98 * The LPSS DMA controller has neither _PS0 nor _PS3 method. Moreover
99 * it can be powered off automatically whenever the last LPSS device goes down.
100 * In case of no power any access to the DMA controller will hang the system.
101 * The behaviour is reproduced on some HP laptops based on Intel BayTrail as
102 * well as on ASuS T100TA transformer.
103 *
104 * This quirk overrides power state of entire LPSS island to keep DMA powered
105 * on whenever we have at least one other device in use.
106 */
107#define LPSS_QUIRK_ALWAYS_POWER_ON BIT(0)
108
87/* UART Component Parameter Register */ 109/* UART Component Parameter Register */
88#define LPSS_UART_CPR 0xF4 110#define LPSS_UART_CPR 0xF4
89#define LPSS_UART_CPR_AFCE BIT(4) 111#define LPSS_UART_CPR_AFCE BIT(4)
@@ -196,13 +218,21 @@ static const struct lpss_device_desc bsw_i2c_dev_desc = {
196 .setup = byt_i2c_setup, 218 .setup = byt_i2c_setup,
197}; 219};
198 220
199static struct lpss_device_desc bsw_spi_dev_desc = { 221static const struct lpss_device_desc bsw_spi_dev_desc = {
200 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX 222 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
201 | LPSS_NO_D3_DELAY, 223 | LPSS_NO_D3_DELAY,
202 .prv_offset = 0x400, 224 .prv_offset = 0x400,
203 .setup = lpss_deassert_reset, 225 .setup = lpss_deassert_reset,
204}; 226};
205 227
228#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
229
230static const struct x86_cpu_id lpss_cpu_ids[] = {
231 ICPU(0x37), /* Valleyview, Bay Trail */
232 ICPU(0x4c), /* Braswell, Cherry Trail */
233 {}
234};
235
206#else 236#else
207 237
208#define LPSS_ADDR(desc) (0UL) 238#define LPSS_ADDR(desc) (0UL)
@@ -574,6 +604,17 @@ static void acpi_lpss_restore_ctx(struct device *dev,
574{ 604{
575 unsigned int i; 605 unsigned int i;
576 606
607 for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
608 unsigned long offset = i * sizeof(u32);
609
610 __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset);
611 dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n",
612 pdata->prv_reg_ctx[i], offset);
613 }
614}
615
616static void acpi_lpss_d3_to_d0_delay(struct lpss_private_data *pdata)
617{
577 /* 618 /*
578 * The following delay is needed or the subsequent write operations may 619 * The following delay is needed or the subsequent write operations may
579 * fail. The LPSS devices are actually PCI devices and the PCI spec 620 * fail. The LPSS devices are actually PCI devices and the PCI spec
@@ -586,14 +627,34 @@ static void acpi_lpss_restore_ctx(struct device *dev,
586 delay = 0; 627 delay = 0;
587 628
588 msleep(delay); 629 msleep(delay);
630}
589 631
590 for (i = 0; i < LPSS_PRV_REG_COUNT; i++) { 632static int acpi_lpss_activate(struct device *dev)
591 unsigned long offset = i * sizeof(u32); 633{
634 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
635 int ret;
592 636
593 __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset); 637 ret = acpi_dev_runtime_resume(dev);
594 dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n", 638 if (ret)
595 pdata->prv_reg_ctx[i], offset); 639 return ret;
596 } 640
641 acpi_lpss_d3_to_d0_delay(pdata);
642
643 /*
644 * This is called only on ->probe() stage where a device is either in
645 * known state defined by BIOS or most likely powered off. Due to this
646 * we have to deassert reset line to be sure that ->probe() will
647 * recognize the device.
648 */
649 if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
650 lpss_deassert_reset(pdata);
651
652 return 0;
653}
654
655static void acpi_lpss_dismiss(struct device *dev)
656{
657 acpi_dev_runtime_suspend(dev);
597} 658}
598 659
599#ifdef CONFIG_PM_SLEEP 660#ifdef CONFIG_PM_SLEEP
@@ -621,6 +682,8 @@ static int acpi_lpss_resume_early(struct device *dev)
621 if (ret) 682 if (ret)
622 return ret; 683 return ret;
623 684
685 acpi_lpss_d3_to_d0_delay(pdata);
686
624 if (pdata->dev_desc->flags & LPSS_SAVE_CTX) 687 if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
625 acpi_lpss_restore_ctx(dev, pdata); 688 acpi_lpss_restore_ctx(dev, pdata);
626 689
@@ -628,6 +691,89 @@ static int acpi_lpss_resume_early(struct device *dev)
628} 691}
629#endif /* CONFIG_PM_SLEEP */ 692#endif /* CONFIG_PM_SLEEP */
630 693
694/* IOSF SB for LPSS island */
695#define LPSS_IOSF_UNIT_LPIOEP 0xA0
696#define LPSS_IOSF_UNIT_LPIO1 0xAB
697#define LPSS_IOSF_UNIT_LPIO2 0xAC
698
699#define LPSS_IOSF_PMCSR 0x84
700#define LPSS_PMCSR_D0 0
701#define LPSS_PMCSR_D3hot 3
702#define LPSS_PMCSR_Dx_MASK GENMASK(1, 0)
703
704#define LPSS_IOSF_GPIODEF0 0x154
705#define LPSS_GPIODEF0_DMA1_D3 BIT(2)
706#define LPSS_GPIODEF0_DMA2_D3 BIT(3)
707#define LPSS_GPIODEF0_DMA_D3_MASK GENMASK(3, 2)
708
709static DEFINE_MUTEX(lpss_iosf_mutex);
710
711static void lpss_iosf_enter_d3_state(void)
712{
713 u32 value1 = 0;
714 u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK;
715 u32 value2 = LPSS_PMCSR_D3hot;
716 u32 mask2 = LPSS_PMCSR_Dx_MASK;
717 /*
718 * PMC provides an information about actual status of the LPSS devices.
719 * Here we read the values related to LPSS power island, i.e. LPSS
720 * devices, excluding both LPSS DMA controllers, along with SCC domain.
721 */
722 u32 func_dis, d3_sts_0, pmc_status, pmc_mask = 0xfe000ffe;
723 int ret;
724
725 ret = pmc_atom_read(PMC_FUNC_DIS, &func_dis);
726 if (ret)
727 return;
728
729 mutex_lock(&lpss_iosf_mutex);
730
731 ret = pmc_atom_read(PMC_D3_STS_0, &d3_sts_0);
732 if (ret)
733 goto exit;
734
735 /*
736 * Get the status of entire LPSS power island per device basis.
737 * Shutdown both LPSS DMA controllers if and only if all other devices
738 * are already in D3hot.
739 */
740 pmc_status = (~(d3_sts_0 | func_dis)) & pmc_mask;
741 if (pmc_status)
742 goto exit;
743
744 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
745 LPSS_IOSF_PMCSR, value2, mask2);
746
747 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
748 LPSS_IOSF_PMCSR, value2, mask2);
749
750 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
751 LPSS_IOSF_GPIODEF0, value1, mask1);
752exit:
753 mutex_unlock(&lpss_iosf_mutex);
754}
755
756static void lpss_iosf_exit_d3_state(void)
757{
758 u32 value1 = LPSS_GPIODEF0_DMA1_D3 | LPSS_GPIODEF0_DMA2_D3;
759 u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK;
760 u32 value2 = LPSS_PMCSR_D0;
761 u32 mask2 = LPSS_PMCSR_Dx_MASK;
762
763 mutex_lock(&lpss_iosf_mutex);
764
765 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
766 LPSS_IOSF_GPIODEF0, value1, mask1);
767
768 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
769 LPSS_IOSF_PMCSR, value2, mask2);
770
771 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
772 LPSS_IOSF_PMCSR, value2, mask2);
773
774 mutex_unlock(&lpss_iosf_mutex);
775}
776
631static int acpi_lpss_runtime_suspend(struct device *dev) 777static int acpi_lpss_runtime_suspend(struct device *dev)
632{ 778{
633 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 779 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
@@ -640,7 +786,17 @@ static int acpi_lpss_runtime_suspend(struct device *dev)
640 if (pdata->dev_desc->flags & LPSS_SAVE_CTX) 786 if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
641 acpi_lpss_save_ctx(dev, pdata); 787 acpi_lpss_save_ctx(dev, pdata);
642 788
643 return acpi_dev_runtime_suspend(dev); 789 ret = acpi_dev_runtime_suspend(dev);
790
791 /*
792 * This call must be last in the sequence, otherwise PMC will return
793 * wrong status for devices being about to be powered off. See
794 * lpss_iosf_enter_d3_state() for further information.
795 */
796 if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
797 lpss_iosf_enter_d3_state();
798
799 return ret;
644} 800}
645 801
646static int acpi_lpss_runtime_resume(struct device *dev) 802static int acpi_lpss_runtime_resume(struct device *dev)
@@ -648,10 +804,19 @@ static int acpi_lpss_runtime_resume(struct device *dev)
648 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 804 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
649 int ret; 805 int ret;
650 806
807 /*
808 * This call is kept first to be in symmetry with
809 * acpi_lpss_runtime_suspend() one.
810 */
811 if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
812 lpss_iosf_exit_d3_state();
813
651 ret = acpi_dev_runtime_resume(dev); 814 ret = acpi_dev_runtime_resume(dev);
652 if (ret) 815 if (ret)
653 return ret; 816 return ret;
654 817
818 acpi_lpss_d3_to_d0_delay(pdata);
819
655 if (pdata->dev_desc->flags & LPSS_SAVE_CTX) 820 if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
656 acpi_lpss_restore_ctx(dev, pdata); 821 acpi_lpss_restore_ctx(dev, pdata);
657 822
@@ -660,6 +825,10 @@ static int acpi_lpss_runtime_resume(struct device *dev)
660#endif /* CONFIG_PM */ 825#endif /* CONFIG_PM */
661 826
662static struct dev_pm_domain acpi_lpss_pm_domain = { 827static struct dev_pm_domain acpi_lpss_pm_domain = {
828#ifdef CONFIG_PM
829 .activate = acpi_lpss_activate,
830 .dismiss = acpi_lpss_dismiss,
831#endif
663 .ops = { 832 .ops = {
664#ifdef CONFIG_PM 833#ifdef CONFIG_PM
665#ifdef CONFIG_PM_SLEEP 834#ifdef CONFIG_PM_SLEEP
@@ -705,8 +874,14 @@ static int acpi_lpss_platform_notify(struct notifier_block *nb,
705 } 874 }
706 875
707 switch (action) { 876 switch (action) {
708 case BUS_NOTIFY_ADD_DEVICE: 877 case BUS_NOTIFY_BIND_DRIVER:
709 pdev->dev.pm_domain = &acpi_lpss_pm_domain; 878 pdev->dev.pm_domain = &acpi_lpss_pm_domain;
879 break;
880 case BUS_NOTIFY_DRIVER_NOT_BOUND:
881 case BUS_NOTIFY_UNBOUND_DRIVER:
882 pdev->dev.pm_domain = NULL;
883 break;
884 case BUS_NOTIFY_ADD_DEVICE:
710 if (pdata->dev_desc->flags & LPSS_LTR) 885 if (pdata->dev_desc->flags & LPSS_LTR)
711 return sysfs_create_group(&pdev->dev.kobj, 886 return sysfs_create_group(&pdev->dev.kobj,
712 &lpss_attr_group); 887 &lpss_attr_group);
@@ -714,7 +889,6 @@ static int acpi_lpss_platform_notify(struct notifier_block *nb,
714 case BUS_NOTIFY_DEL_DEVICE: 889 case BUS_NOTIFY_DEL_DEVICE:
715 if (pdata->dev_desc->flags & LPSS_LTR) 890 if (pdata->dev_desc->flags & LPSS_LTR)
716 sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group); 891 sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
717 pdev->dev.pm_domain = NULL;
718 break; 892 break;
719 default: 893 default:
720 break; 894 break;
@@ -754,10 +928,19 @@ static struct acpi_scan_handler lpss_handler = {
754 928
755void __init acpi_lpss_init(void) 929void __init acpi_lpss_init(void)
756{ 930{
757 if (!lpt_clk_init()) { 931 const struct x86_cpu_id *id;
758 bus_register_notifier(&platform_bus_type, &acpi_lpss_nb); 932 int ret;
759 acpi_scan_add_handler(&lpss_handler); 933
760 } 934 ret = lpt_clk_init();
935 if (ret)
936 return;
937
938 id = x86_match_cpu(lpss_cpu_ids);
939 if (id)
940 lpss_quirks |= LPSS_QUIRK_ALWAYS_POWER_ON;
941
942 bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
943 acpi_scan_add_handler(&lpss_handler);
761} 944}
762 945
763#else 946#else
diff --git a/drivers/base/dd.c b/drivers/base/dd.c
index 8d4eb4dbd52d..7399be790b5d 100644
--- a/drivers/base/dd.c
+++ b/drivers/base/dd.c
@@ -299,6 +299,9 @@ int device_bind_driver(struct device *dev)
299 ret = driver_sysfs_add(dev); 299 ret = driver_sysfs_add(dev);
300 if (!ret) 300 if (!ret)
301 driver_bound(dev); 301 driver_bound(dev);
302 else if (dev->bus)
303 blocking_notifier_call_chain(&dev->bus->p->bus_notifier,
304 BUS_NOTIFY_DRIVER_NOT_BOUND, dev);
302 return ret; 305 return ret;
303} 306}
304EXPORT_SYMBOL_GPL(device_bind_driver); 307EXPORT_SYMBOL_GPL(device_bind_driver);
@@ -332,7 +335,7 @@ static int really_probe(struct device *dev, struct device_driver *drv)
332 /* If using pinctrl, bind pins now before probing */ 335 /* If using pinctrl, bind pins now before probing */
333 ret = pinctrl_bind_pins(dev); 336 ret = pinctrl_bind_pins(dev);
334 if (ret) 337 if (ret)
335 goto probe_failed; 338 goto pinctrl_bind_failed;
336 339
337 if (driver_sysfs_add(dev)) { 340 if (driver_sysfs_add(dev)) {
338 printk(KERN_ERR "%s: driver_sysfs_add(%s) failed\n", 341 printk(KERN_ERR "%s: driver_sysfs_add(%s) failed\n",
@@ -376,6 +379,10 @@ static int really_probe(struct device *dev, struct device_driver *drv)
376 goto done; 379 goto done;
377 380
378probe_failed: 381probe_failed:
382 if (dev->bus)
383 blocking_notifier_call_chain(&dev->bus->p->bus_notifier,
384 BUS_NOTIFY_DRIVER_NOT_BOUND, dev);
385pinctrl_bind_failed:
379 devres_release_all(dev); 386 devres_release_all(dev);
380 driver_sysfs_remove(dev); 387 driver_sysfs_remove(dev);
381 dev->driver = NULL; 388 dev->driver = NULL;
@@ -749,7 +756,6 @@ static void __device_release_driver(struct device *dev)
749 blocking_notifier_call_chain(&dev->bus->p->bus_notifier, 756 blocking_notifier_call_chain(&dev->bus->p->bus_notifier,
750 BUS_NOTIFY_UNBOUND_DRIVER, 757 BUS_NOTIFY_UNBOUND_DRIVER,
751 dev); 758 dev);
752
753 } 759 }
754} 760}
755 761
diff --git a/drivers/base/power/clock_ops.c b/drivers/base/power/clock_ops.c
index 60ee5591ee8f..c39b8617280f 100644
--- a/drivers/base/power/clock_ops.c
+++ b/drivers/base/power/clock_ops.c
@@ -473,6 +473,7 @@ static int pm_clk_notify(struct notifier_block *nb,
473 enable_clock(dev, NULL); 473 enable_clock(dev, NULL);
474 } 474 }
475 break; 475 break;
476 case BUS_NOTIFY_DRIVER_NOT_BOUND:
476 case BUS_NOTIFY_UNBOUND_DRIVER: 477 case BUS_NOTIFY_UNBOUND_DRIVER:
477 if (clknb->con_ids[0]) { 478 if (clknb->con_ids[0]) {
478 for (con_id = clknb->con_ids; *con_id; con_id++) 479 for (con_id = clknb->con_ids; *con_id; con_id++)
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index 7067b6ddc1db..8b20930ade98 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -622,12 +622,17 @@ static void dw_dma_tasklet(unsigned long data)
622static irqreturn_t dw_dma_interrupt(int irq, void *dev_id) 622static irqreturn_t dw_dma_interrupt(int irq, void *dev_id)
623{ 623{
624 struct dw_dma *dw = dev_id; 624 struct dw_dma *dw = dev_id;
625 u32 status = dma_readl(dw, STATUS_INT); 625 u32 status;
626 626
627 /* Check if we have any interrupt from the DMAC which is not in use */
628 if (!dw->in_use)
629 return IRQ_NONE;
630
631 status = dma_readl(dw, STATUS_INT);
627 dev_vdbg(dw->dma.dev, "%s: status=0x%x\n", __func__, status); 632 dev_vdbg(dw->dma.dev, "%s: status=0x%x\n", __func__, status);
628 633
629 /* Check if we have any interrupt from the DMAC */ 634 /* Check if we have any interrupt from the DMAC */
630 if (!status || !dw->in_use) 635 if (!status)
631 return IRQ_NONE; 636 return IRQ_NONE;
632 637
633 /* 638 /*
diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c
index 68a4815750b5..127093a0c0e8 100644
--- a/drivers/dma/dw/platform.c
+++ b/drivers/dma/dw/platform.c
@@ -155,7 +155,6 @@ static int dw_probe(struct platform_device *pdev)
155 struct dw_dma_chip *chip; 155 struct dw_dma_chip *chip;
156 struct device *dev = &pdev->dev; 156 struct device *dev = &pdev->dev;
157 struct resource *mem; 157 struct resource *mem;
158 const struct acpi_device_id *id;
159 struct dw_dma_platform_data *pdata; 158 struct dw_dma_platform_data *pdata;
160 int err; 159 int err;
161 160
@@ -179,11 +178,6 @@ static int dw_probe(struct platform_device *pdev)
179 pdata = dev_get_platdata(dev); 178 pdata = dev_get_platdata(dev);
180 if (!pdata) 179 if (!pdata)
181 pdata = dw_dma_parse_dt(pdev); 180 pdata = dw_dma_parse_dt(pdev);
182 if (!pdata && has_acpi_companion(dev)) {
183 id = acpi_match_device(dev->driver->acpi_match_table, dev);
184 if (id)
185 pdata = (struct dw_dma_platform_data *)id->driver_data;
186 }
187 181
188 chip->dev = dev; 182 chip->dev = dev;
189 183
@@ -239,7 +233,19 @@ static void dw_shutdown(struct platform_device *pdev)
239{ 233{
240 struct dw_dma_chip *chip = platform_get_drvdata(pdev); 234 struct dw_dma_chip *chip = platform_get_drvdata(pdev);
241 235
236 /*
237 * We have to call dw_dma_disable() to stop any ongoing transfer. On
238 * some platforms we can't do that since DMA device is powered off.
239 * Moreover we have no possibility to check if the platform is affected
240 * or not. That's why we call pm_runtime_get_sync() / pm_runtime_put()
241 * unconditionally. On the other hand we can't use
242 * pm_runtime_suspended() because runtime PM framework is not fully
243 * used by the driver.
244 */
245 pm_runtime_get_sync(chip->dev);
242 dw_dma_disable(chip); 246 dw_dma_disable(chip);
247 pm_runtime_put_sync_suspend(chip->dev);
248
243 clk_disable_unprepare(chip->clk); 249 clk_disable_unprepare(chip->clk);
244} 250}
245 251
@@ -252,17 +258,8 @@ MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
252#endif 258#endif
253 259
254#ifdef CONFIG_ACPI 260#ifdef CONFIG_ACPI
255static struct dw_dma_platform_data dw_dma_acpi_pdata = {
256 .nr_channels = 8,
257 .is_private = true,
258 .chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
259 .chan_priority = CHAN_PRIORITY_ASCENDING,
260 .block_size = 4095,
261 .nr_masters = 2,
262};
263
264static const struct acpi_device_id dw_dma_acpi_id_table[] = { 261static const struct acpi_device_id dw_dma_acpi_id_table[] = {
265 { "INTL9C60", (kernel_ulong_t)&dw_dma_acpi_pdata }, 262 { "INTL9C60", 0 },
266 { } 263 { }
267}; 264};
268MODULE_DEVICE_TABLE(acpi, dw_dma_acpi_id_table); 265MODULE_DEVICE_TABLE(acpi, dw_dma_acpi_id_table);
diff --git a/drivers/i2c/busses/i2c-designware-baytrail.c b/drivers/i2c/busses/i2c-designware-baytrail.c
index 7d7ae97476e2..e38c2bbba940 100644
--- a/drivers/i2c/busses/i2c-designware-baytrail.c
+++ b/drivers/i2c/busses/i2c-designware-baytrail.c
@@ -34,8 +34,7 @@ static int get_sem(struct device *dev, u32 *sem)
34 u32 data; 34 u32 data;
35 int ret; 35 int ret;
36 36
37 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, PUNIT_SEMAPHORE, 37 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, PUNIT_SEMAPHORE, &data);
38 &data);
39 if (ret) { 38 if (ret) {
40 dev_err(dev, "iosf failed to read punit semaphore\n"); 39 dev_err(dev, "iosf failed to read punit semaphore\n");
41 return ret; 40 return ret;
@@ -50,21 +49,19 @@ static void reset_semaphore(struct device *dev)
50{ 49{
51 u32 data; 50 u32 data;
52 51
53 if (iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 52 if (iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, PUNIT_SEMAPHORE, &data)) {
54 PUNIT_SEMAPHORE, &data)) {
55 dev_err(dev, "iosf failed to reset punit semaphore during read\n"); 53 dev_err(dev, "iosf failed to reset punit semaphore during read\n");
56 return; 54 return;
57 } 55 }
58 56
59 data &= ~PUNIT_SEMAPHORE_BIT; 57 data &= ~PUNIT_SEMAPHORE_BIT;
60 if (iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 58 if (iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, PUNIT_SEMAPHORE, data))
61 PUNIT_SEMAPHORE, data))
62 dev_err(dev, "iosf failed to reset punit semaphore during write\n"); 59 dev_err(dev, "iosf failed to reset punit semaphore during write\n");
63} 60}
64 61
65static int baytrail_i2c_acquire(struct dw_i2c_dev *dev) 62static int baytrail_i2c_acquire(struct dw_i2c_dev *dev)
66{ 63{
67 u32 sem; 64 u32 sem = PUNIT_SEMAPHORE_ACQUIRE;
68 int ret; 65 int ret;
69 unsigned long start, end; 66 unsigned long start, end;
70 67
@@ -77,8 +74,7 @@ static int baytrail_i2c_acquire(struct dw_i2c_dev *dev)
77 return 0; 74 return 0;
78 75
79 /* host driver writes to side band semaphore register */ 76 /* host driver writes to side band semaphore register */
80 ret = iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 77 ret = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, PUNIT_SEMAPHORE, sem);
81 PUNIT_SEMAPHORE, PUNIT_SEMAPHORE_ACQUIRE);
82 if (ret) { 78 if (ret) {
83 dev_err(dev->dev, "iosf punit semaphore request failed\n"); 79 dev_err(dev->dev, "iosf punit semaphore request failed\n");
84 return ret; 80 return ret;
@@ -102,8 +98,7 @@ static int baytrail_i2c_acquire(struct dw_i2c_dev *dev)
102 dev_err(dev->dev, "punit semaphore timed out, resetting\n"); 98 dev_err(dev->dev, "punit semaphore timed out, resetting\n");
103 reset_semaphore(dev->dev); 99 reset_semaphore(dev->dev);
104 100
105 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 101 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, PUNIT_SEMAPHORE, &sem);
106 PUNIT_SEMAPHORE, &sem);
107 if (ret) 102 if (ret)
108 dev_err(dev->dev, "iosf failed to read punit semaphore\n"); 103 dev_err(dev->dev, "iosf failed to read punit semaphore\n");
109 else 104 else
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index 809579ecb5a4..423371d148d5 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -117,6 +117,7 @@ static const struct acpi_device_id dw_i2c_acpi_match[] = {
117 { "80860F41", 0 }, 117 { "80860F41", 0 },
118 { "808622C1", 0 }, 118 { "808622C1", 0 },
119 { "AMD0010", 0 }, 119 { "AMD0010", 0 },
120 { "APMC0D0F", 0 },
120 { } 121 { }
121}; 122};
122MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match); 123MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
diff --git a/drivers/powercap/intel_rapl.c b/drivers/powercap/intel_rapl.c
index cc97f0869791..fa07809eef45 100644
--- a/drivers/powercap/intel_rapl.c
+++ b/drivers/powercap/intel_rapl.c
@@ -988,16 +988,16 @@ static void set_floor_freq_atom(struct rapl_domain *rd, bool enable)
988 } 988 }
989 989
990 if (!power_ctrl_orig_val) 990 if (!power_ctrl_orig_val)
991 iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_PMC_READ, 991 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_CR_READ,
992 rapl_defaults->floor_freq_reg_addr, 992 rapl_defaults->floor_freq_reg_addr,
993 &power_ctrl_orig_val); 993 &power_ctrl_orig_val);
994 mdata = power_ctrl_orig_val; 994 mdata = power_ctrl_orig_val;
995 if (enable) { 995 if (enable) {
996 mdata &= ~(0x7f << 8); 996 mdata &= ~(0x7f << 8);
997 mdata |= 1 << 8; 997 mdata |= 1 << 8;
998 } 998 }
999 iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_PMC_WRITE, 999 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_CR_WRITE,
1000 rapl_defaults->floor_freq_reg_addr, mdata); 1000 rapl_defaults->floor_freq_reg_addr, mdata);
1001} 1001}
1002 1002
1003static u64 rapl_compute_time_window_core(struct rapl_package *rp, u64 value, 1003static u64 rapl_compute_time_window_core(struct rapl_package *rp, u64 value,
diff --git a/drivers/thermal/intel_quark_dts_thermal.c b/drivers/thermal/intel_quark_dts_thermal.c
index 5ed90e6c8a64..5d33b350da1c 100644
--- a/drivers/thermal/intel_quark_dts_thermal.c
+++ b/drivers/thermal/intel_quark_dts_thermal.c
@@ -125,8 +125,8 @@ static int soc_dts_enable(struct thermal_zone_device *tzd)
125 struct soc_sensor_entry *aux_entry = tzd->devdata; 125 struct soc_sensor_entry *aux_entry = tzd->devdata;
126 int ret; 126 int ret;
127 127
128 ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ, 128 ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ,
129 QRK_DTS_REG_OFFSET_ENABLE, &out); 129 QRK_DTS_REG_OFFSET_ENABLE, &out);
130 if (ret) 130 if (ret)
131 return ret; 131 return ret;
132 132
@@ -137,8 +137,8 @@ static int soc_dts_enable(struct thermal_zone_device *tzd)
137 137
138 if (!aux_entry->locked) { 138 if (!aux_entry->locked) {
139 out |= QRK_DTS_ENABLE_BIT; 139 out |= QRK_DTS_ENABLE_BIT;
140 ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_WRITE, 140 ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, MBI_REG_WRITE,
141 QRK_DTS_REG_OFFSET_ENABLE, out); 141 QRK_DTS_REG_OFFSET_ENABLE, out);
142 if (ret) 142 if (ret)
143 return ret; 143 return ret;
144 144
@@ -158,8 +158,8 @@ static int soc_dts_disable(struct thermal_zone_device *tzd)
158 struct soc_sensor_entry *aux_entry = tzd->devdata; 158 struct soc_sensor_entry *aux_entry = tzd->devdata;
159 int ret; 159 int ret;
160 160
161 ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ, 161 ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ,
162 QRK_DTS_REG_OFFSET_ENABLE, &out); 162 QRK_DTS_REG_OFFSET_ENABLE, &out);
163 if (ret) 163 if (ret)
164 return ret; 164 return ret;
165 165
@@ -170,8 +170,8 @@ static int soc_dts_disable(struct thermal_zone_device *tzd)
170 170
171 if (!aux_entry->locked) { 171 if (!aux_entry->locked) {
172 out &= ~QRK_DTS_ENABLE_BIT; 172 out &= ~QRK_DTS_ENABLE_BIT;
173 ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_WRITE, 173 ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, MBI_REG_WRITE,
174 QRK_DTS_REG_OFFSET_ENABLE, out); 174 QRK_DTS_REG_OFFSET_ENABLE, out);
175 175
176 if (ret) 176 if (ret)
177 return ret; 177 return ret;
@@ -192,8 +192,8 @@ static int _get_trip_temp(int trip, int *temp)
192 u32 out; 192 u32 out;
193 193
194 mutex_lock(&dts_update_mutex); 194 mutex_lock(&dts_update_mutex);
195 status = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ, 195 status = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ,
196 QRK_DTS_REG_OFFSET_PTPS, &out); 196 QRK_DTS_REG_OFFSET_PTPS, &out);
197 mutex_unlock(&dts_update_mutex); 197 mutex_unlock(&dts_update_mutex);
198 198
199 if (status) 199 if (status)
@@ -236,8 +236,8 @@ static int update_trip_temp(struct soc_sensor_entry *aux_entry,
236 goto failed; 236 goto failed;
237 } 237 }
238 238
239 ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ, 239 ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ,
240 QRK_DTS_REG_OFFSET_PTPS, &store_ptps); 240 QRK_DTS_REG_OFFSET_PTPS, &store_ptps);
241 if (ret) 241 if (ret)
242 goto failed; 242 goto failed;
243 243
@@ -262,8 +262,8 @@ static int update_trip_temp(struct soc_sensor_entry *aux_entry,
262 out |= (temp_out & QRK_DTS_MASK_TP_THRES) << 262 out |= (temp_out & QRK_DTS_MASK_TP_THRES) <<
263 (trip * QRK_DTS_SHIFT_TP); 263 (trip * QRK_DTS_SHIFT_TP);
264 264
265 ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_WRITE, 265 ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, MBI_REG_WRITE,
266 QRK_DTS_REG_OFFSET_PTPS, out); 266 QRK_DTS_REG_OFFSET_PTPS, out);
267 267
268failed: 268failed:
269 mutex_unlock(&dts_update_mutex); 269 mutex_unlock(&dts_update_mutex);
@@ -294,8 +294,8 @@ static int sys_get_curr_temp(struct thermal_zone_device *tzd,
294 int ret; 294 int ret;
295 295
296 mutex_lock(&dts_update_mutex); 296 mutex_lock(&dts_update_mutex);
297 ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ, 297 ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ,
298 QRK_DTS_REG_OFFSET_TEMP, &out); 298 QRK_DTS_REG_OFFSET_TEMP, &out);
299 mutex_unlock(&dts_update_mutex); 299 mutex_unlock(&dts_update_mutex);
300 300
301 if (ret) 301 if (ret)
@@ -350,13 +350,13 @@ static void free_soc_dts(struct soc_sensor_entry *aux_entry)
350 if (aux_entry) { 350 if (aux_entry) {
351 if (!aux_entry->locked) { 351 if (!aux_entry->locked) {
352 mutex_lock(&dts_update_mutex); 352 mutex_lock(&dts_update_mutex);
353 iosf_mbi_write(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_WRITE, 353 iosf_mbi_write(QRK_MBI_UNIT_RMU, MBI_REG_WRITE,
354 QRK_DTS_REG_OFFSET_ENABLE, 354 QRK_DTS_REG_OFFSET_ENABLE,
355 aux_entry->store_dts_enable); 355 aux_entry->store_dts_enable);
356 356
357 iosf_mbi_write(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_WRITE, 357 iosf_mbi_write(QRK_MBI_UNIT_RMU, MBI_REG_WRITE,
358 QRK_DTS_REG_OFFSET_PTPS, 358 QRK_DTS_REG_OFFSET_PTPS,
359 aux_entry->store_ptps); 359 aux_entry->store_ptps);
360 mutex_unlock(&dts_update_mutex); 360 mutex_unlock(&dts_update_mutex);
361 } 361 }
362 thermal_zone_device_unregister(aux_entry->tzone); 362 thermal_zone_device_unregister(aux_entry->tzone);
@@ -378,9 +378,8 @@ static struct soc_sensor_entry *alloc_soc_dts(void)
378 } 378 }
379 379
380 /* Check if DTS register is locked */ 380 /* Check if DTS register is locked */
381 err = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ, 381 err = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ,
382 QRK_DTS_REG_OFFSET_LOCK, 382 QRK_DTS_REG_OFFSET_LOCK, &out);
383 &out);
384 if (err) 383 if (err)
385 goto err_ret; 384 goto err_ret;
386 385
@@ -395,16 +394,16 @@ static struct soc_sensor_entry *alloc_soc_dts(void)
395 /* Store DTS default state if DTS registers are not locked */ 394 /* Store DTS default state if DTS registers are not locked */
396 if (!aux_entry->locked) { 395 if (!aux_entry->locked) {
397 /* Store DTS default enable for restore on exit */ 396 /* Store DTS default enable for restore on exit */
398 err = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ, 397 err = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ,
399 QRK_DTS_REG_OFFSET_ENABLE, 398 QRK_DTS_REG_OFFSET_ENABLE,
400 &aux_entry->store_dts_enable); 399 &aux_entry->store_dts_enable);
401 if (err) 400 if (err)
402 goto err_ret; 401 goto err_ret;
403 402
404 /* Store DTS default PTPS register for restore on exit */ 403 /* Store DTS default PTPS register for restore on exit */
405 err = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ, 404 err = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ,
406 QRK_DTS_REG_OFFSET_PTPS, 405 QRK_DTS_REG_OFFSET_PTPS,
407 &aux_entry->store_ptps); 406 &aux_entry->store_ptps);
408 if (err) 407 if (err)
409 goto err_ret; 408 goto err_ret;
410 } 409 }
diff --git a/drivers/thermal/intel_soc_dts_iosf.c b/drivers/thermal/intel_soc_dts_iosf.c
index 5841d1d72996..f72e1db3216f 100644
--- a/drivers/thermal/intel_soc_dts_iosf.c
+++ b/drivers/thermal/intel_soc_dts_iosf.c
@@ -90,7 +90,7 @@ static int sys_get_trip_temp(struct thermal_zone_device *tzd, int trip,
90 dts = tzd->devdata; 90 dts = tzd->devdata;
91 sensors = dts->sensors; 91 sensors = dts->sensors;
92 mutex_lock(&sensors->dts_update_lock); 92 mutex_lock(&sensors->dts_update_lock);
93 status = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 93 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
94 SOC_DTS_OFFSET_PTPS, &out); 94 SOC_DTS_OFFSET_PTPS, &out);
95 mutex_unlock(&sensors->dts_update_lock); 95 mutex_unlock(&sensors->dts_update_lock);
96 if (status) 96 if (status)
@@ -124,27 +124,27 @@ static int update_trip_temp(struct intel_soc_dts_sensor_entry *dts,
124 124
125 temp_out = (sensors->tj_max - temp) / 1000; 125 temp_out = (sensors->tj_max - temp) / 1000;
126 126
127 status = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 127 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
128 SOC_DTS_OFFSET_PTPS, &store_ptps); 128 SOC_DTS_OFFSET_PTPS, &store_ptps);
129 if (status) 129 if (status)
130 return status; 130 return status;
131 131
132 out = (store_ptps & ~(0xFF << (thres_index * 8))); 132 out = (store_ptps & ~(0xFF << (thres_index * 8)));
133 out |= (temp_out & 0xFF) << (thres_index * 8); 133 out |= (temp_out & 0xFF) << (thres_index * 8);
134 status = iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 134 status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
135 SOC_DTS_OFFSET_PTPS, out); 135 SOC_DTS_OFFSET_PTPS, out);
136 if (status) 136 if (status)
137 return status; 137 return status;
138 138
139 pr_debug("update_trip_temp PTPS = %x\n", out); 139 pr_debug("update_trip_temp PTPS = %x\n", out);
140 status = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 140 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
141 SOC_DTS_OFFSET_PTMC, &out); 141 SOC_DTS_OFFSET_PTMC, &out);
142 if (status) 142 if (status)
143 goto err_restore_ptps; 143 goto err_restore_ptps;
144 144
145 store_ptmc = out; 145 store_ptmc = out;
146 146
147 status = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 147 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
148 SOC_DTS_TE_AUX0 + thres_index, 148 SOC_DTS_TE_AUX0 + thres_index,
149 &te_out); 149 &te_out);
150 if (status) 150 if (status)
@@ -167,12 +167,12 @@ static int update_trip_temp(struct intel_soc_dts_sensor_entry *dts,
167 out &= ~SOC_DTS_AUX0_ENABLE_BIT; 167 out &= ~SOC_DTS_AUX0_ENABLE_BIT;
168 te_out &= ~int_enable_bit; 168 te_out &= ~int_enable_bit;
169 } 169 }
170 status = iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 170 status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
171 SOC_DTS_OFFSET_PTMC, out); 171 SOC_DTS_OFFSET_PTMC, out);
172 if (status) 172 if (status)
173 goto err_restore_te_out; 173 goto err_restore_te_out;
174 174
175 status = iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 175 status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
176 SOC_DTS_TE_AUX0 + thres_index, 176 SOC_DTS_TE_AUX0 + thres_index,
177 te_out); 177 te_out);
178 if (status) 178 if (status)
@@ -182,13 +182,13 @@ static int update_trip_temp(struct intel_soc_dts_sensor_entry *dts,
182 182
183 return 0; 183 return 0;
184err_restore_te_out: 184err_restore_te_out:
185 iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 185 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
186 SOC_DTS_OFFSET_PTMC, store_te_out); 186 SOC_DTS_OFFSET_PTMC, store_te_out);
187err_restore_ptmc: 187err_restore_ptmc:
188 iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 188 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
189 SOC_DTS_OFFSET_PTMC, store_ptmc); 189 SOC_DTS_OFFSET_PTMC, store_ptmc);
190err_restore_ptps: 190err_restore_ptps:
191 iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 191 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
192 SOC_DTS_OFFSET_PTPS, store_ptps); 192 SOC_DTS_OFFSET_PTPS, store_ptps);
193 /* Nothing we can do if restore fails */ 193 /* Nothing we can do if restore fails */
194 194
@@ -235,7 +235,7 @@ static int sys_get_curr_temp(struct thermal_zone_device *tzd,
235 235
236 dts = tzd->devdata; 236 dts = tzd->devdata;
237 sensors = dts->sensors; 237 sensors = dts->sensors;
238 status = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 238 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
239 SOC_DTS_OFFSET_TEMP, &out); 239 SOC_DTS_OFFSET_TEMP, &out);
240 if (status) 240 if (status)
241 return status; 241 return status;
@@ -259,14 +259,14 @@ static int soc_dts_enable(int id)
259 u32 out; 259 u32 out;
260 int ret; 260 int ret;
261 261
262 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 262 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
263 SOC_DTS_OFFSET_ENABLE, &out); 263 SOC_DTS_OFFSET_ENABLE, &out);
264 if (ret) 264 if (ret)
265 return ret; 265 return ret;
266 266
267 if (!(out & BIT(id))) { 267 if (!(out & BIT(id))) {
268 out |= BIT(id); 268 out |= BIT(id);
269 ret = iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 269 ret = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
270 SOC_DTS_OFFSET_ENABLE, out); 270 SOC_DTS_OFFSET_ENABLE, out);
271 if (ret) 271 if (ret)
272 return ret; 272 return ret;
@@ -278,7 +278,7 @@ static int soc_dts_enable(int id)
278static void remove_dts_thermal_zone(struct intel_soc_dts_sensor_entry *dts) 278static void remove_dts_thermal_zone(struct intel_soc_dts_sensor_entry *dts)
279{ 279{
280 if (dts) { 280 if (dts) {
281 iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 281 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
282 SOC_DTS_OFFSET_ENABLE, dts->store_status); 282 SOC_DTS_OFFSET_ENABLE, dts->store_status);
283 thermal_zone_device_unregister(dts->tzone); 283 thermal_zone_device_unregister(dts->tzone);
284 } 284 }
@@ -296,9 +296,8 @@ static int add_dts_thermal_zone(int id, struct intel_soc_dts_sensor_entry *dts,
296 int i; 296 int i;
297 297
298 /* Store status to restor on exit */ 298 /* Store status to restor on exit */
299 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 299 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
300 SOC_DTS_OFFSET_ENABLE, 300 SOC_DTS_OFFSET_ENABLE, &dts->store_status);
301 &dts->store_status);
302 if (ret) 301 if (ret)
303 goto err_ret; 302 goto err_ret;
304 303
@@ -311,7 +310,7 @@ static int add_dts_thermal_zone(int id, struct intel_soc_dts_sensor_entry *dts,
311 } 310 }
312 311
313 /* Check if the writable trip we provide is not used by BIOS */ 312 /* Check if the writable trip we provide is not used by BIOS */
314 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 313 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
315 SOC_DTS_OFFSET_PTPS, &store_ptps); 314 SOC_DTS_OFFSET_PTPS, &store_ptps);
316 if (ret) 315 if (ret)
317 trip_mask = 0; 316 trip_mask = 0;
@@ -374,19 +373,19 @@ void intel_soc_dts_iosf_interrupt_handler(struct intel_soc_dts_sensors *sensors)
374 373
375 spin_lock_irqsave(&sensors->intr_notify_lock, flags); 374 spin_lock_irqsave(&sensors->intr_notify_lock, flags);
376 375
377 status = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 376 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
378 SOC_DTS_OFFSET_PTMC, &ptmc_out); 377 SOC_DTS_OFFSET_PTMC, &ptmc_out);
379 ptmc_out |= SOC_DTS_PTMC_APIC_DEASSERT_BIT; 378 ptmc_out |= SOC_DTS_PTMC_APIC_DEASSERT_BIT;
380 status = iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 379 status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
381 SOC_DTS_OFFSET_PTMC, ptmc_out); 380 SOC_DTS_OFFSET_PTMC, ptmc_out);
382 381
383 status = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 382 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
384 SOC_DTS_OFFSET_PTTSS, &sticky_out); 383 SOC_DTS_OFFSET_PTTSS, &sticky_out);
385 pr_debug("status %d PTTSS %x\n", status, sticky_out); 384 pr_debug("status %d PTTSS %x\n", status, sticky_out);
386 if (sticky_out & SOC_DTS_TRIP_MASK) { 385 if (sticky_out & SOC_DTS_TRIP_MASK) {
387 int i; 386 int i;
388 /* reset sticky bit */ 387 /* reset sticky bit */
389 status = iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 388 status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
390 SOC_DTS_OFFSET_PTTSS, sticky_out); 389 SOC_DTS_OFFSET_PTTSS, sticky_out);
391 spin_unlock_irqrestore(&sensors->intr_notify_lock, flags); 390 spin_unlock_irqrestore(&sensors->intr_notify_lock, flags);
392 391
diff --git a/include/linux/device.h b/include/linux/device.h
index b8f411b57dcb..f627ba20a46c 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -191,6 +191,7 @@ extern int bus_unregister_notifier(struct bus_type *bus,
191 unbound */ 191 unbound */
192#define BUS_NOTIFY_UNBOUND_DRIVER 0x00000007 /* driver is unbound 192#define BUS_NOTIFY_UNBOUND_DRIVER 0x00000007 /* driver is unbound
193 from the device */ 193 from the device */
194#define BUS_NOTIFY_DRIVER_NOT_BOUND 0x00000008 /* driver fails to be bound */
194 195
195extern struct kset *bus_get_kset(struct bus_type *bus); 196extern struct kset *bus_get_kset(struct bus_type *bus);
196extern struct klist *bus_get_device_klist(struct bus_type *bus); 197extern struct klist *bus_get_device_klist(struct bus_type *bus);