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authorKumar Gala <galak@codeaurora.org>2014-07-16 12:10:09 -0400
committerKishon Vijay Abraham I <kishon@ti.com>2014-07-22 03:16:12 -0400
commitc4aee1aacb4798d23f514ab4eb59acef752d2397 (patch)
tree502fa39026e9dc58bed50dc81153bc005e23a3e3
parent4f6160d4089ec0e39e33a197138413bd0701ce21 (diff)
phy: qcom: Add device tree bindings for IPQ806x SATA PHY
Add binding spec for Qualcomm SoC PHYs, starting with the SATA PHY on the IPQ806x family of SoCs. Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
-rw-r--r--Documentation/devicetree/bindings/phy/qcom-ipq806x-sata-phy.txt23
1 files changed, 23 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/qcom-ipq806x-sata-phy.txt b/Documentation/devicetree/bindings/phy/qcom-ipq806x-sata-phy.txt
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1Qualcomm IPQ806x SATA PHY Controller
2------------------------------------
3
4SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
5Each SATA PHY controller should have its own node.
6
7Required properties:
8- compatible: compatible list, contains "qcom,ipq806x-sata-phy"
9- reg: offset and length of the SATA PHY register set;
10- #phy-cells: must be zero
11- clocks: must be exactly one entry
12- clock-names: must be "cfg"
13
14Example:
15 sata_phy: sata-phy@1b400000 {
16 compatible = "qcom,ipq806x-sata-phy";
17 reg = <0x1b400000 0x200>;
18
19 clocks = <&gcc SATA_PHY_CFG_CLK>;
20 clock-names = "cfg";
21
22 #phy-cells = <0>;
23 };