diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-05-05 18:31:35 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-05-05 18:31:35 -0400 |
commit | c4781a8df9566ca13bf3ac6a65f6aae8d3f6e499 (patch) | |
tree | fe8d1390f67159503c48c89a15d948f3683d9353 | |
parent | 54176cc6803844613b3dca13174c13c47e9686db (diff) | |
parent | ed19ca7fa8bd44936aa3d5284bf38f5d96a28b35 (diff) |
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"Here are a couple last-minute fixes for ARM SoCs. Most of them are
for the OMAP platforms, the rest are all for different platforms.
OMAP:
All dts fixes, mostly affecting voltages and pinctrl for various
device drivers:
- Regulator minimum voltage fixes for omap5
- ISP syscon register offset fix for omap3
- Fix regulator initial modes for n900
- Fix omap5 pinctrl wkup instance size
Allwinner:
Remove incorrect constraints from a dcdc1 regulator
Alltera SoCFPGA:
Fix compilation in thumb2 mode
Samsung exynos:
Fix a potential oops in the pm-domain error handling
Davinci:
Avoid a link error if NVMEM is disabled
Renesas:
Do not mark an external uart clock as disabled, to allow probing
the uarts"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: davinci: only use NVMEM when available
ARM: SoCFPGA: Fix secondary CPU startup in thumb2 kernel
ARM: dts: omap5: fix range of permitted wakeup pinmux registers
ARM: dts: omap3-n900: Specify peripherals LDO regulators initial mode
ARM: dts: omap3: Fix ISP syscon register offset
ARM: dts: omap5-cm-t54: fix ldo1_reg and ldo4_reg ranges
ARM: dts: omap5-board-common: fix ldo1_reg and ldo4_reg ranges
arm64: dts: r8a7795: Don't disable referenced optional scif clock
ARM: EXYNOS: Properly skip unitialized parent clock in power domain on
ARM: dts: sun8i-q8-common: Do not set constraints on dc1sw regulator
-rw-r--r-- | arch/arm/boot/dts/omap3-n900.dts | 9 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap34xx.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap5-board-common.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap5-cm-t54.dts | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap5.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/sun8i-q8-common.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/mach-davinci/board-mityomapl138.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-davinci/common.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-exynos/pm_domains.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-socfpga/headsmp.S | 1 | ||||
-rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7795.dtsi | 1 |
11 files changed, 27 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts index b3c26a96a726..d9e2d9c6e999 100644 --- a/arch/arm/boot/dts/omap3-n900.dts +++ b/arch/arm/boot/dts/omap3-n900.dts | |||
@@ -329,6 +329,7 @@ | |||
329 | regulator-name = "V28"; | 329 | regulator-name = "V28"; |
330 | regulator-min-microvolt = <2800000>; | 330 | regulator-min-microvolt = <2800000>; |
331 | regulator-max-microvolt = <2800000>; | 331 | regulator-max-microvolt = <2800000>; |
332 | regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ | ||
332 | regulator-always-on; /* due to battery cover sensor */ | 333 | regulator-always-on; /* due to battery cover sensor */ |
333 | }; | 334 | }; |
334 | 335 | ||
@@ -336,30 +337,35 @@ | |||
336 | regulator-name = "VCSI"; | 337 | regulator-name = "VCSI"; |
337 | regulator-min-microvolt = <1800000>; | 338 | regulator-min-microvolt = <1800000>; |
338 | regulator-max-microvolt = <1800000>; | 339 | regulator-max-microvolt = <1800000>; |
340 | regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ | ||
339 | }; | 341 | }; |
340 | 342 | ||
341 | &vaux3 { | 343 | &vaux3 { |
342 | regulator-name = "VMMC2_30"; | 344 | regulator-name = "VMMC2_30"; |
343 | regulator-min-microvolt = <2800000>; | 345 | regulator-min-microvolt = <2800000>; |
344 | regulator-max-microvolt = <3000000>; | 346 | regulator-max-microvolt = <3000000>; |
347 | regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ | ||
345 | }; | 348 | }; |
346 | 349 | ||
347 | &vaux4 { | 350 | &vaux4 { |
348 | regulator-name = "VCAM_ANA_28"; | 351 | regulator-name = "VCAM_ANA_28"; |
349 | regulator-min-microvolt = <2800000>; | 352 | regulator-min-microvolt = <2800000>; |
350 | regulator-max-microvolt = <2800000>; | 353 | regulator-max-microvolt = <2800000>; |
354 | regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ | ||
351 | }; | 355 | }; |
352 | 356 | ||
353 | &vmmc1 { | 357 | &vmmc1 { |
354 | regulator-name = "VMMC1"; | 358 | regulator-name = "VMMC1"; |
355 | regulator-min-microvolt = <1850000>; | 359 | regulator-min-microvolt = <1850000>; |
356 | regulator-max-microvolt = <3150000>; | 360 | regulator-max-microvolt = <3150000>; |
361 | regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ | ||
357 | }; | 362 | }; |
358 | 363 | ||
359 | &vmmc2 { | 364 | &vmmc2 { |
360 | regulator-name = "V28_A"; | 365 | regulator-name = "V28_A"; |
361 | regulator-min-microvolt = <2800000>; | 366 | regulator-min-microvolt = <2800000>; |
362 | regulator-max-microvolt = <3000000>; | 367 | regulator-max-microvolt = <3000000>; |
368 | regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ | ||
363 | regulator-always-on; /* due VIO leak to AIC34 VDDs */ | 369 | regulator-always-on; /* due VIO leak to AIC34 VDDs */ |
364 | }; | 370 | }; |
365 | 371 | ||
@@ -367,6 +373,7 @@ | |||
367 | regulator-name = "VPLL"; | 373 | regulator-name = "VPLL"; |
368 | regulator-min-microvolt = <1800000>; | 374 | regulator-min-microvolt = <1800000>; |
369 | regulator-max-microvolt = <1800000>; | 375 | regulator-max-microvolt = <1800000>; |
376 | regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ | ||
370 | regulator-always-on; | 377 | regulator-always-on; |
371 | }; | 378 | }; |
372 | 379 | ||
@@ -374,6 +381,7 @@ | |||
374 | regulator-name = "VSDI_CSI"; | 381 | regulator-name = "VSDI_CSI"; |
375 | regulator-min-microvolt = <1800000>; | 382 | regulator-min-microvolt = <1800000>; |
376 | regulator-max-microvolt = <1800000>; | 383 | regulator-max-microvolt = <1800000>; |
384 | regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ | ||
377 | regulator-always-on; | 385 | regulator-always-on; |
378 | }; | 386 | }; |
379 | 387 | ||
@@ -381,6 +389,7 @@ | |||
381 | regulator-name = "VMMC2_IO_18"; | 389 | regulator-name = "VMMC2_IO_18"; |
382 | regulator-min-microvolt = <1800000>; | 390 | regulator-min-microvolt = <1800000>; |
383 | regulator-max-microvolt = <1800000>; | 391 | regulator-max-microvolt = <1800000>; |
392 | regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ | ||
384 | }; | 393 | }; |
385 | 394 | ||
386 | &vio { | 395 | &vio { |
diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi index 387dc31822fe..96f8ce7bd2af 100644 --- a/arch/arm/boot/dts/omap34xx.dtsi +++ b/arch/arm/boot/dts/omap34xx.dtsi | |||
@@ -46,7 +46,7 @@ | |||
46 | 0x480bd800 0x017c>; | 46 | 0x480bd800 0x017c>; |
47 | interrupts = <24>; | 47 | interrupts = <24>; |
48 | iommus = <&mmu_isp>; | 48 | iommus = <&mmu_isp>; |
49 | syscon = <&scm_conf 0xdc>; | 49 | syscon = <&scm_conf 0x6c>; |
50 | ti,phy-type = <OMAP3ISP_PHY_TYPE_COMPLEX_IO>; | 50 | ti,phy-type = <OMAP3ISP_PHY_TYPE_COMPLEX_IO>; |
51 | #clock-cells = <1>; | 51 | #clock-cells = <1>; |
52 | ports { | 52 | ports { |
diff --git a/arch/arm/boot/dts/omap5-board-common.dtsi b/arch/arm/boot/dts/omap5-board-common.dtsi index 902657d6713b..914bf4c47404 100644 --- a/arch/arm/boot/dts/omap5-board-common.dtsi +++ b/arch/arm/boot/dts/omap5-board-common.dtsi | |||
@@ -472,7 +472,7 @@ | |||
472 | ldo1_reg: ldo1 { | 472 | ldo1_reg: ldo1 { |
473 | /* VDDAPHY_CAM: vdda_csiport */ | 473 | /* VDDAPHY_CAM: vdda_csiport */ |
474 | regulator-name = "ldo1"; | 474 | regulator-name = "ldo1"; |
475 | regulator-min-microvolt = <1500000>; | 475 | regulator-min-microvolt = <1800000>; |
476 | regulator-max-microvolt = <1800000>; | 476 | regulator-max-microvolt = <1800000>; |
477 | }; | 477 | }; |
478 | 478 | ||
@@ -498,7 +498,7 @@ | |||
498 | ldo4_reg: ldo4 { | 498 | ldo4_reg: ldo4 { |
499 | /* VDDAPHY_DISP: vdda_dsiport/hdmi */ | 499 | /* VDDAPHY_DISP: vdda_dsiport/hdmi */ |
500 | regulator-name = "ldo4"; | 500 | regulator-name = "ldo4"; |
501 | regulator-min-microvolt = <1500000>; | 501 | regulator-min-microvolt = <1800000>; |
502 | regulator-max-microvolt = <1800000>; | 502 | regulator-max-microvolt = <1800000>; |
503 | }; | 503 | }; |
504 | 504 | ||
diff --git a/arch/arm/boot/dts/omap5-cm-t54.dts b/arch/arm/boot/dts/omap5-cm-t54.dts index ecc591dc0778..4d87d9c6c86d 100644 --- a/arch/arm/boot/dts/omap5-cm-t54.dts +++ b/arch/arm/boot/dts/omap5-cm-t54.dts | |||
@@ -513,7 +513,7 @@ | |||
513 | ldo1_reg: ldo1 { | 513 | ldo1_reg: ldo1 { |
514 | /* VDDAPHY_CAM: vdda_csiport */ | 514 | /* VDDAPHY_CAM: vdda_csiport */ |
515 | regulator-name = "ldo1"; | 515 | regulator-name = "ldo1"; |
516 | regulator-min-microvolt = <1500000>; | 516 | regulator-min-microvolt = <1800000>; |
517 | regulator-max-microvolt = <1800000>; | 517 | regulator-max-microvolt = <1800000>; |
518 | }; | 518 | }; |
519 | 519 | ||
@@ -537,7 +537,7 @@ | |||
537 | ldo4_reg: ldo4 { | 537 | ldo4_reg: ldo4 { |
538 | /* VDDAPHY_DISP: vdda_dsiport/hdmi */ | 538 | /* VDDAPHY_DISP: vdda_dsiport/hdmi */ |
539 | regulator-name = "ldo4"; | 539 | regulator-name = "ldo4"; |
540 | regulator-min-microvolt = <1500000>; | 540 | regulator-min-microvolt = <1800000>; |
541 | regulator-max-microvolt = <1800000>; | 541 | regulator-max-microvolt = <1800000>; |
542 | }; | 542 | }; |
543 | 543 | ||
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 38805ebbe2ba..120b6b80cd39 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi | |||
@@ -269,7 +269,7 @@ | |||
269 | omap5_pmx_wkup: pinmux@c840 { | 269 | omap5_pmx_wkup: pinmux@c840 { |
270 | compatible = "ti,omap5-padconf", | 270 | compatible = "ti,omap5-padconf", |
271 | "pinctrl-single"; | 271 | "pinctrl-single"; |
272 | reg = <0xc840 0x0038>; | 272 | reg = <0xc840 0x003c>; |
273 | #address-cells = <1>; | 273 | #address-cells = <1>; |
274 | #size-cells = <0>; | 274 | #size-cells = <0>; |
275 | #interrupt-cells = <1>; | 275 | #interrupt-cells = <1>; |
diff --git a/arch/arm/boot/dts/sun8i-q8-common.dtsi b/arch/arm/boot/dts/sun8i-q8-common.dtsi index 9d2b7e2f5975..346a49d805a7 100644 --- a/arch/arm/boot/dts/sun8i-q8-common.dtsi +++ b/arch/arm/boot/dts/sun8i-q8-common.dtsi | |||
@@ -125,8 +125,6 @@ | |||
125 | }; | 125 | }; |
126 | 126 | ||
127 | ®_dc1sw { | 127 | ®_dc1sw { |
128 | regulator-min-microvolt = <3000000>; | ||
129 | regulator-max-microvolt = <3000000>; | ||
130 | regulator-name = "vcc-lcd"; | 128 | regulator-name = "vcc-lcd"; |
131 | }; | 129 | }; |
132 | 130 | ||
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c index d97c588550ad..bc4e63fa9808 100644 --- a/arch/arm/mach-davinci/board-mityomapl138.c +++ b/arch/arm/mach-davinci/board-mityomapl138.c | |||
@@ -121,6 +121,11 @@ static void read_factory_config(struct nvmem_device *nvmem, void *context) | |||
121 | const char *partnum = NULL; | 121 | const char *partnum = NULL; |
122 | struct davinci_soc_info *soc_info = &davinci_soc_info; | 122 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
123 | 123 | ||
124 | if (!IS_BUILTIN(CONFIG_NVMEM)) { | ||
125 | pr_warn("Factory Config not available without CONFIG_NVMEM\n"); | ||
126 | goto bad_config; | ||
127 | } | ||
128 | |||
124 | ret = nvmem_device_read(nvmem, 0, sizeof(factory_config), | 129 | ret = nvmem_device_read(nvmem, 0, sizeof(factory_config), |
125 | &factory_config); | 130 | &factory_config); |
126 | if (ret != sizeof(struct factory_config)) { | 131 | if (ret != sizeof(struct factory_config)) { |
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c index f55ef2ef2f92..742133b7266a 100644 --- a/arch/arm/mach-davinci/common.c +++ b/arch/arm/mach-davinci/common.c | |||
@@ -33,6 +33,11 @@ void davinci_get_mac_addr(struct nvmem_device *nvmem, void *context) | |||
33 | char *mac_addr = davinci_soc_info.emac_pdata->mac_addr; | 33 | char *mac_addr = davinci_soc_info.emac_pdata->mac_addr; |
34 | off_t offset = (off_t)context; | 34 | off_t offset = (off_t)context; |
35 | 35 | ||
36 | if (!IS_BUILTIN(CONFIG_NVMEM)) { | ||
37 | pr_warn("Cannot read MAC addr from EEPROM without CONFIG_NVMEM\n"); | ||
38 | return; | ||
39 | } | ||
40 | |||
36 | /* Read MAC addr from EEPROM */ | 41 | /* Read MAC addr from EEPROM */ |
37 | if (nvmem_device_read(nvmem, offset, ETH_ALEN, mac_addr) == ETH_ALEN) | 42 | if (nvmem_device_read(nvmem, offset, ETH_ALEN, mac_addr) == ETH_ALEN) |
38 | pr_info("Read MAC addr from EEPROM: %pM\n", mac_addr); | 43 | pr_info("Read MAC addr from EEPROM: %pM\n", mac_addr); |
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c index 7c21760f590f..875a2bab64f6 100644 --- a/arch/arm/mach-exynos/pm_domains.c +++ b/arch/arm/mach-exynos/pm_domains.c | |||
@@ -92,7 +92,7 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) | |||
92 | if (IS_ERR(pd->clk[i])) | 92 | if (IS_ERR(pd->clk[i])) |
93 | break; | 93 | break; |
94 | 94 | ||
95 | if (IS_ERR(pd->clk[i])) | 95 | if (IS_ERR(pd->pclk[i])) |
96 | continue; /* Skip on first power up */ | 96 | continue; /* Skip on first power up */ |
97 | if (clk_set_parent(pd->clk[i], pd->pclk[i])) | 97 | if (clk_set_parent(pd->clk[i], pd->pclk[i])) |
98 | pr_err("%s: error setting parent to clock%d\n", | 98 | pr_err("%s: error setting parent to clock%d\n", |
diff --git a/arch/arm/mach-socfpga/headsmp.S b/arch/arm/mach-socfpga/headsmp.S index 5d94b7a2fb10..c160fa3007e9 100644 --- a/arch/arm/mach-socfpga/headsmp.S +++ b/arch/arm/mach-socfpga/headsmp.S | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <asm/assembler.h> | 13 | #include <asm/assembler.h> |
14 | 14 | ||
15 | .arch armv7-a | 15 | .arch armv7-a |
16 | .arm | ||
16 | 17 | ||
17 | ENTRY(secondary_trampoline) | 18 | ENTRY(secondary_trampoline) |
18 | /* CPU1 will always fetch from 0x0 when it is brought out of reset. | 19 | /* CPU1 will always fetch from 0x0 when it is brought out of reset. |
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index a7315ebe3883..706d2426024f 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi | |||
@@ -120,7 +120,6 @@ | |||
120 | compatible = "fixed-clock"; | 120 | compatible = "fixed-clock"; |
121 | #clock-cells = <0>; | 121 | #clock-cells = <0>; |
122 | clock-frequency = <0>; | 122 | clock-frequency = <0>; |
123 | status = "disabled"; | ||
124 | }; | 123 | }; |
125 | 124 | ||
126 | soc { | 125 | soc { |