diff options
author | Peter Zijlstra <peterz@infradead.org> | 2016-04-21 09:14:17 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@kernel.org> | 2016-04-23 08:14:26 -0400 |
commit | c416e5aa40c51b3e8ae75a3e122dd5eabce078cd (patch) | |
tree | 8f0c4fcead4626037812c9e24685becbdedba7ed | |
parent | dcee75b3b7f025cc6765e6c92ba0a4e59a4d25f4 (diff) |
x86/perf/rapl: Reorder model numbers
Re-order the model array to match the order in events/intel/core.c,
to easier spot gaps and such.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
-rw-r--r-- | arch/x86/events/intel/rapl.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/arch/x86/events/intel/rapl.c b/arch/x86/events/intel/rapl.c index 26c7d7d8a657..1e7b1dfff1c7 100644 --- a/arch/x86/events/intel/rapl.c +++ b/arch/x86/events/intel/rapl.c | |||
@@ -787,17 +787,22 @@ static const struct intel_rapl_init_fun skl_rapl_init __initconst = { | |||
787 | 787 | ||
788 | static const struct x86_cpu_id rapl_cpu_match[] __initconst = { | 788 | static const struct x86_cpu_id rapl_cpu_match[] __initconst = { |
789 | X86_RAPL_MODEL_MATCH(42, snb_rapl_init), /* Sandy Bridge */ | 789 | X86_RAPL_MODEL_MATCH(42, snb_rapl_init), /* Sandy Bridge */ |
790 | X86_RAPL_MODEL_MATCH(45, snbep_rapl_init), /* Sandy Bridge-EP */ | ||
791 | |||
790 | X86_RAPL_MODEL_MATCH(58, snb_rapl_init), /* Ivy Bridge */ | 792 | X86_RAPL_MODEL_MATCH(58, snb_rapl_init), /* Ivy Bridge */ |
791 | X86_RAPL_MODEL_MATCH(63, hsx_rapl_init), /* Haswell-Server */ | 793 | X86_RAPL_MODEL_MATCH(62, snbep_rapl_init), /* IvyTown */ |
792 | X86_RAPL_MODEL_MATCH(79, hsx_rapl_init), /* Broadwell-Server */ | 794 | |
793 | X86_RAPL_MODEL_MATCH(60, hsw_rapl_init), /* Haswell */ | 795 | X86_RAPL_MODEL_MATCH(60, hsw_rapl_init), /* Haswell */ |
796 | X86_RAPL_MODEL_MATCH(63, hsx_rapl_init), /* Haswell-Server */ | ||
794 | X86_RAPL_MODEL_MATCH(69, hsw_rapl_init), /* Haswell-Celeron */ | 797 | X86_RAPL_MODEL_MATCH(69, hsw_rapl_init), /* Haswell-Celeron */ |
795 | X86_RAPL_MODEL_MATCH(70, hsw_rapl_init), /* Haswell GT3e */ | 798 | X86_RAPL_MODEL_MATCH(70, hsw_rapl_init), /* Haswell GT3e */ |
799 | |||
796 | X86_RAPL_MODEL_MATCH(61, hsw_rapl_init), /* Broadwell */ | 800 | X86_RAPL_MODEL_MATCH(61, hsw_rapl_init), /* Broadwell */ |
797 | X86_RAPL_MODEL_MATCH(71, hsw_rapl_init), /* Broadwell-H */ | 801 | X86_RAPL_MODEL_MATCH(71, hsw_rapl_init), /* Broadwell-H */ |
798 | X86_RAPL_MODEL_MATCH(45, snbep_rapl_init), /* Sandy Bridge-EP */ | 802 | X86_RAPL_MODEL_MATCH(79, hsx_rapl_init), /* Broadwell-Server */ |
799 | X86_RAPL_MODEL_MATCH(62, snbep_rapl_init), /* IvyTown */ | 803 | |
800 | X86_RAPL_MODEL_MATCH(87, knl_rapl_init), /* Knights Landing */ | 804 | X86_RAPL_MODEL_MATCH(87, knl_rapl_init), /* Knights Landing */ |
805 | |||
801 | X86_RAPL_MODEL_MATCH(78, skl_rapl_init), /* Skylake */ | 806 | X86_RAPL_MODEL_MATCH(78, skl_rapl_init), /* Skylake */ |
802 | X86_RAPL_MODEL_MATCH(94, skl_rapl_init), /* Skylake H/S */ | 807 | X86_RAPL_MODEL_MATCH(94, skl_rapl_init), /* Skylake H/S */ |
803 | {}, | 808 | {}, |