diff options
author | Dave Airlie <airlied@redhat.com> | 2014-08-21 17:29:25 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2014-08-21 17:29:25 -0400 |
commit | c3735aeb657c18200b5d67bd3306cddcac1a71c8 (patch) | |
tree | 821008e2e2100dbe06f665527dabee3ee860f755 | |
parent | c39502c5508fb0106167f80a037c444701faa65f (diff) | |
parent | b738ca5d68e4051c86e32f46f67a69f3bb9cee5e (diff) |
Merge branch 'drm-fixes-3.17' of git://people.freedesktop.org/~agd5f/linux
more radeon fixes
* 'drm-fixes-3.17' of git://people.freedesktop.org/~agd5f/linux:
Revert "drm/radeon: Use write-combined CPU mappings of ring buffers with PCIe"
drm/radeon: fix active_cu mask on SI and CIK after re-init (v3)
drm/radeon: fix active cu count for SI and CIK
drm/radeon: re-enable selective GPUVM flushing
drm/radeon: Sync ME and PFP after CP semaphore waits v4
drm/radeon: fix display handling in radeon_gpu_reset
drm/radeon: fix pm handling in radeon_gpu_reset
drm/radeon: Only flush HDP cache for indirect buffers from userspace
drm/radeon: properly document reloc priority mask
28 files changed, 154 insertions, 85 deletions
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index e7d99e1547cc..f4e14702639d 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c | |||
@@ -3483,7 +3483,7 @@ static void cik_gpu_init(struct radeon_device *rdev) | |||
3483 | u32 mc_shared_chmap, mc_arb_ramcfg; | 3483 | u32 mc_shared_chmap, mc_arb_ramcfg; |
3484 | u32 hdp_host_path_cntl; | 3484 | u32 hdp_host_path_cntl; |
3485 | u32 tmp; | 3485 | u32 tmp; |
3486 | int i, j, k; | 3486 | int i, j; |
3487 | 3487 | ||
3488 | switch (rdev->family) { | 3488 | switch (rdev->family) { |
3489 | case CHIP_BONAIRE: | 3489 | case CHIP_BONAIRE: |
@@ -3672,12 +3672,11 @@ static void cik_gpu_init(struct radeon_device *rdev) | |||
3672 | rdev->config.cik.max_sh_per_se, | 3672 | rdev->config.cik.max_sh_per_se, |
3673 | rdev->config.cik.max_backends_per_se); | 3673 | rdev->config.cik.max_backends_per_se); |
3674 | 3674 | ||
3675 | rdev->config.cik.active_cus = 0; | ||
3675 | for (i = 0; i < rdev->config.cik.max_shader_engines; i++) { | 3676 | for (i = 0; i < rdev->config.cik.max_shader_engines; i++) { |
3676 | for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) { | 3677 | for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) { |
3677 | for (k = 0; k < rdev->config.cik.max_cu_per_sh; k++) { | 3678 | rdev->config.cik.active_cus += |
3678 | rdev->config.cik.active_cus += | 3679 | hweight32(cik_get_cu_active_bitmap(rdev, i, j)); |
3679 | hweight32(cik_get_cu_active_bitmap(rdev, i, j)); | ||
3680 | } | ||
3681 | } | 3680 | } |
3682 | } | 3681 | } |
3683 | 3682 | ||
@@ -3801,7 +3800,7 @@ int cik_ring_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
3801 | radeon_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1)); | 3800 | radeon_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1)); |
3802 | radeon_ring_write(ring, ((scratch - PACKET3_SET_UCONFIG_REG_START) >> 2)); | 3801 | radeon_ring_write(ring, ((scratch - PACKET3_SET_UCONFIG_REG_START) >> 2)); |
3803 | radeon_ring_write(ring, 0xDEADBEEF); | 3802 | radeon_ring_write(ring, 0xDEADBEEF); |
3804 | radeon_ring_unlock_commit(rdev, ring); | 3803 | radeon_ring_unlock_commit(rdev, ring, false); |
3805 | 3804 | ||
3806 | for (i = 0; i < rdev->usec_timeout; i++) { | 3805 | for (i = 0; i < rdev->usec_timeout; i++) { |
3807 | tmp = RREG32(scratch); | 3806 | tmp = RREG32(scratch); |
@@ -3920,6 +3919,17 @@ void cik_fence_compute_ring_emit(struct radeon_device *rdev, | |||
3920 | radeon_ring_write(ring, 0); | 3919 | radeon_ring_write(ring, 0); |
3921 | } | 3920 | } |
3922 | 3921 | ||
3922 | /** | ||
3923 | * cik_semaphore_ring_emit - emit a semaphore on the CP ring | ||
3924 | * | ||
3925 | * @rdev: radeon_device pointer | ||
3926 | * @ring: radeon ring buffer object | ||
3927 | * @semaphore: radeon semaphore object | ||
3928 | * @emit_wait: Is this a sempahore wait? | ||
3929 | * | ||
3930 | * Emits a semaphore signal/wait packet to the CP ring and prevents the PFP | ||
3931 | * from running ahead of semaphore waits. | ||
3932 | */ | ||
3923 | bool cik_semaphore_ring_emit(struct radeon_device *rdev, | 3933 | bool cik_semaphore_ring_emit(struct radeon_device *rdev, |
3924 | struct radeon_ring *ring, | 3934 | struct radeon_ring *ring, |
3925 | struct radeon_semaphore *semaphore, | 3935 | struct radeon_semaphore *semaphore, |
@@ -3932,6 +3942,12 @@ bool cik_semaphore_ring_emit(struct radeon_device *rdev, | |||
3932 | radeon_ring_write(ring, lower_32_bits(addr)); | 3942 | radeon_ring_write(ring, lower_32_bits(addr)); |
3933 | radeon_ring_write(ring, (upper_32_bits(addr) & 0xffff) | sel); | 3943 | radeon_ring_write(ring, (upper_32_bits(addr) & 0xffff) | sel); |
3934 | 3944 | ||
3945 | if (emit_wait && ring->idx == RADEON_RING_TYPE_GFX_INDEX) { | ||
3946 | /* Prevent the PFP from running ahead of the semaphore wait */ | ||
3947 | radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); | ||
3948 | radeon_ring_write(ring, 0x0); | ||
3949 | } | ||
3950 | |||
3935 | return true; | 3951 | return true; |
3936 | } | 3952 | } |
3937 | 3953 | ||
@@ -4004,7 +4020,7 @@ int cik_copy_cpdma(struct radeon_device *rdev, | |||
4004 | return r; | 4020 | return r; |
4005 | } | 4021 | } |
4006 | 4022 | ||
4007 | radeon_ring_unlock_commit(rdev, ring); | 4023 | radeon_ring_unlock_commit(rdev, ring, false); |
4008 | radeon_semaphore_free(rdev, &sem, *fence); | 4024 | radeon_semaphore_free(rdev, &sem, *fence); |
4009 | 4025 | ||
4010 | return r; | 4026 | return r; |
@@ -4103,7 +4119,7 @@ int cik_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
4103 | ib.ptr[1] = ((scratch - PACKET3_SET_UCONFIG_REG_START) >> 2); | 4119 | ib.ptr[1] = ((scratch - PACKET3_SET_UCONFIG_REG_START) >> 2); |
4104 | ib.ptr[2] = 0xDEADBEEF; | 4120 | ib.ptr[2] = 0xDEADBEEF; |
4105 | ib.length_dw = 3; | 4121 | ib.length_dw = 3; |
4106 | r = radeon_ib_schedule(rdev, &ib, NULL); | 4122 | r = radeon_ib_schedule(rdev, &ib, NULL, false); |
4107 | if (r) { | 4123 | if (r) { |
4108 | radeon_scratch_free(rdev, scratch); | 4124 | radeon_scratch_free(rdev, scratch); |
4109 | radeon_ib_free(rdev, &ib); | 4125 | radeon_ib_free(rdev, &ib); |
@@ -4324,7 +4340,7 @@ static int cik_cp_gfx_start(struct radeon_device *rdev) | |||
4324 | radeon_ring_write(ring, 0x0000000e); /* VGT_VERTEX_REUSE_BLOCK_CNTL */ | 4340 | radeon_ring_write(ring, 0x0000000e); /* VGT_VERTEX_REUSE_BLOCK_CNTL */ |
4325 | radeon_ring_write(ring, 0x00000010); /* VGT_OUT_DEALLOC_CNTL */ | 4341 | radeon_ring_write(ring, 0x00000010); /* VGT_OUT_DEALLOC_CNTL */ |
4326 | 4342 | ||
4327 | radeon_ring_unlock_commit(rdev, ring); | 4343 | radeon_ring_unlock_commit(rdev, ring, false); |
4328 | 4344 | ||
4329 | return 0; | 4345 | return 0; |
4330 | } | 4346 | } |
diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c index bcf480510ac2..192278bc993c 100644 --- a/drivers/gpu/drm/radeon/cik_sdma.c +++ b/drivers/gpu/drm/radeon/cik_sdma.c | |||
@@ -596,7 +596,7 @@ int cik_copy_dma(struct radeon_device *rdev, | |||
596 | return r; | 596 | return r; |
597 | } | 597 | } |
598 | 598 | ||
599 | radeon_ring_unlock_commit(rdev, ring); | 599 | radeon_ring_unlock_commit(rdev, ring, false); |
600 | radeon_semaphore_free(rdev, &sem, *fence); | 600 | radeon_semaphore_free(rdev, &sem, *fence); |
601 | 601 | ||
602 | return r; | 602 | return r; |
@@ -638,7 +638,7 @@ int cik_sdma_ring_test(struct radeon_device *rdev, | |||
638 | radeon_ring_write(ring, upper_32_bits(rdev->vram_scratch.gpu_addr)); | 638 | radeon_ring_write(ring, upper_32_bits(rdev->vram_scratch.gpu_addr)); |
639 | radeon_ring_write(ring, 1); /* number of DWs to follow */ | 639 | radeon_ring_write(ring, 1); /* number of DWs to follow */ |
640 | radeon_ring_write(ring, 0xDEADBEEF); | 640 | radeon_ring_write(ring, 0xDEADBEEF); |
641 | radeon_ring_unlock_commit(rdev, ring); | 641 | radeon_ring_unlock_commit(rdev, ring, false); |
642 | 642 | ||
643 | for (i = 0; i < rdev->usec_timeout; i++) { | 643 | for (i = 0; i < rdev->usec_timeout; i++) { |
644 | tmp = readl(ptr); | 644 | tmp = readl(ptr); |
@@ -695,7 +695,7 @@ int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
695 | ib.ptr[4] = 0xDEADBEEF; | 695 | ib.ptr[4] = 0xDEADBEEF; |
696 | ib.length_dw = 5; | 696 | ib.length_dw = 5; |
697 | 697 | ||
698 | r = radeon_ib_schedule(rdev, &ib, NULL); | 698 | r = radeon_ib_schedule(rdev, &ib, NULL, false); |
699 | if (r) { | 699 | if (r) { |
700 | radeon_ib_free(rdev, &ib); | 700 | radeon_ib_free(rdev, &ib); |
701 | DRM_ERROR("radeon: failed to schedule ib (%d).\n", r); | 701 | DRM_ERROR("radeon: failed to schedule ib (%d).\n", r); |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 4fedd14e670a..dbca60c7d097 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -2869,7 +2869,7 @@ static int evergreen_cp_start(struct radeon_device *rdev) | |||
2869 | radeon_ring_write(ring, PACKET3_ME_INITIALIZE_DEVICE_ID(1)); | 2869 | radeon_ring_write(ring, PACKET3_ME_INITIALIZE_DEVICE_ID(1)); |
2870 | radeon_ring_write(ring, 0); | 2870 | radeon_ring_write(ring, 0); |
2871 | radeon_ring_write(ring, 0); | 2871 | radeon_ring_write(ring, 0); |
2872 | radeon_ring_unlock_commit(rdev, ring); | 2872 | radeon_ring_unlock_commit(rdev, ring, false); |
2873 | 2873 | ||
2874 | cp_me = 0xff; | 2874 | cp_me = 0xff; |
2875 | WREG32(CP_ME_CNTL, cp_me); | 2875 | WREG32(CP_ME_CNTL, cp_me); |
@@ -2912,7 +2912,7 @@ static int evergreen_cp_start(struct radeon_device *rdev) | |||
2912 | radeon_ring_write(ring, 0x0000000e); /* VGT_VERTEX_REUSE_BLOCK_CNTL */ | 2912 | radeon_ring_write(ring, 0x0000000e); /* VGT_VERTEX_REUSE_BLOCK_CNTL */ |
2913 | radeon_ring_write(ring, 0x00000010); /* */ | 2913 | radeon_ring_write(ring, 0x00000010); /* */ |
2914 | 2914 | ||
2915 | radeon_ring_unlock_commit(rdev, ring); | 2915 | radeon_ring_unlock_commit(rdev, ring, false); |
2916 | 2916 | ||
2917 | return 0; | 2917 | return 0; |
2918 | } | 2918 | } |
diff --git a/drivers/gpu/drm/radeon/evergreen_dma.c b/drivers/gpu/drm/radeon/evergreen_dma.c index 478caefe0fef..afaba388c36d 100644 --- a/drivers/gpu/drm/radeon/evergreen_dma.c +++ b/drivers/gpu/drm/radeon/evergreen_dma.c | |||
@@ -155,7 +155,7 @@ int evergreen_copy_dma(struct radeon_device *rdev, | |||
155 | return r; | 155 | return r; |
156 | } | 156 | } |
157 | 157 | ||
158 | radeon_ring_unlock_commit(rdev, ring); | 158 | radeon_ring_unlock_commit(rdev, ring, false); |
159 | radeon_semaphore_free(rdev, &sem, *fence); | 159 | radeon_semaphore_free(rdev, &sem, *fence); |
160 | 160 | ||
161 | return r; | 161 | return r; |
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index 327b85f7fd0d..ba89375f197f 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c | |||
@@ -1505,7 +1505,7 @@ static int cayman_cp_start(struct radeon_device *rdev) | |||
1505 | radeon_ring_write(ring, PACKET3_ME_INITIALIZE_DEVICE_ID(1)); | 1505 | radeon_ring_write(ring, PACKET3_ME_INITIALIZE_DEVICE_ID(1)); |
1506 | radeon_ring_write(ring, 0); | 1506 | radeon_ring_write(ring, 0); |
1507 | radeon_ring_write(ring, 0); | 1507 | radeon_ring_write(ring, 0); |
1508 | radeon_ring_unlock_commit(rdev, ring); | 1508 | radeon_ring_unlock_commit(rdev, ring, false); |
1509 | 1509 | ||
1510 | cayman_cp_enable(rdev, true); | 1510 | cayman_cp_enable(rdev, true); |
1511 | 1511 | ||
@@ -1547,7 +1547,7 @@ static int cayman_cp_start(struct radeon_device *rdev) | |||
1547 | radeon_ring_write(ring, 0x0000000e); /* VGT_VERTEX_REUSE_BLOCK_CNTL */ | 1547 | radeon_ring_write(ring, 0x0000000e); /* VGT_VERTEX_REUSE_BLOCK_CNTL */ |
1548 | radeon_ring_write(ring, 0x00000010); /* */ | 1548 | radeon_ring_write(ring, 0x00000010); /* */ |
1549 | 1549 | ||
1550 | radeon_ring_unlock_commit(rdev, ring); | 1550 | radeon_ring_unlock_commit(rdev, ring, false); |
1551 | 1551 | ||
1552 | /* XXX init other rings */ | 1552 | /* XXX init other rings */ |
1553 | 1553 | ||
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 04b5940b8923..4c5ec44ff328 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -925,7 +925,7 @@ int r100_copy_blit(struct radeon_device *rdev, | |||
925 | if (fence) { | 925 | if (fence) { |
926 | r = radeon_fence_emit(rdev, fence, RADEON_RING_TYPE_GFX_INDEX); | 926 | r = radeon_fence_emit(rdev, fence, RADEON_RING_TYPE_GFX_INDEX); |
927 | } | 927 | } |
928 | radeon_ring_unlock_commit(rdev, ring); | 928 | radeon_ring_unlock_commit(rdev, ring, false); |
929 | return r; | 929 | return r; |
930 | } | 930 | } |
931 | 931 | ||
@@ -958,7 +958,7 @@ void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring) | |||
958 | RADEON_ISYNC_ANY3D_IDLE2D | | 958 | RADEON_ISYNC_ANY3D_IDLE2D | |
959 | RADEON_ISYNC_WAIT_IDLEGUI | | 959 | RADEON_ISYNC_WAIT_IDLEGUI | |
960 | RADEON_ISYNC_CPSCRATCH_IDLEGUI); | 960 | RADEON_ISYNC_CPSCRATCH_IDLEGUI); |
961 | radeon_ring_unlock_commit(rdev, ring); | 961 | radeon_ring_unlock_commit(rdev, ring, false); |
962 | } | 962 | } |
963 | 963 | ||
964 | 964 | ||
@@ -3638,7 +3638,7 @@ int r100_ring_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
3638 | } | 3638 | } |
3639 | radeon_ring_write(ring, PACKET0(scratch, 0)); | 3639 | radeon_ring_write(ring, PACKET0(scratch, 0)); |
3640 | radeon_ring_write(ring, 0xDEADBEEF); | 3640 | radeon_ring_write(ring, 0xDEADBEEF); |
3641 | radeon_ring_unlock_commit(rdev, ring); | 3641 | radeon_ring_unlock_commit(rdev, ring, false); |
3642 | for (i = 0; i < rdev->usec_timeout; i++) { | 3642 | for (i = 0; i < rdev->usec_timeout; i++) { |
3643 | tmp = RREG32(scratch); | 3643 | tmp = RREG32(scratch); |
3644 | if (tmp == 0xDEADBEEF) { | 3644 | if (tmp == 0xDEADBEEF) { |
@@ -3700,7 +3700,7 @@ int r100_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
3700 | ib.ptr[6] = PACKET2(0); | 3700 | ib.ptr[6] = PACKET2(0); |
3701 | ib.ptr[7] = PACKET2(0); | 3701 | ib.ptr[7] = PACKET2(0); |
3702 | ib.length_dw = 8; | 3702 | ib.length_dw = 8; |
3703 | r = radeon_ib_schedule(rdev, &ib, NULL); | 3703 | r = radeon_ib_schedule(rdev, &ib, NULL, false); |
3704 | if (r) { | 3704 | if (r) { |
3705 | DRM_ERROR("radeon: failed to schedule ib (%d).\n", r); | 3705 | DRM_ERROR("radeon: failed to schedule ib (%d).\n", r); |
3706 | goto free_ib; | 3706 | goto free_ib; |
diff --git a/drivers/gpu/drm/radeon/r200.c b/drivers/gpu/drm/radeon/r200.c index 58f0473aa73f..67780374a652 100644 --- a/drivers/gpu/drm/radeon/r200.c +++ b/drivers/gpu/drm/radeon/r200.c | |||
@@ -121,7 +121,7 @@ int r200_copy_dma(struct radeon_device *rdev, | |||
121 | if (fence) { | 121 | if (fence) { |
122 | r = radeon_fence_emit(rdev, fence, RADEON_RING_TYPE_GFX_INDEX); | 122 | r = radeon_fence_emit(rdev, fence, RADEON_RING_TYPE_GFX_INDEX); |
123 | } | 123 | } |
124 | radeon_ring_unlock_commit(rdev, ring); | 124 | radeon_ring_unlock_commit(rdev, ring, false); |
125 | return r; | 125 | return r; |
126 | } | 126 | } |
127 | 127 | ||
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index 75b30338c226..1bc4704034ce 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c | |||
@@ -295,7 +295,7 @@ void r300_ring_start(struct radeon_device *rdev, struct radeon_ring *ring) | |||
295 | radeon_ring_write(ring, | 295 | radeon_ring_write(ring, |
296 | R300_GEOMETRY_ROUND_NEAREST | | 296 | R300_GEOMETRY_ROUND_NEAREST | |
297 | R300_COLOR_ROUND_NEAREST); | 297 | R300_COLOR_ROUND_NEAREST); |
298 | radeon_ring_unlock_commit(rdev, ring); | 298 | radeon_ring_unlock_commit(rdev, ring, false); |
299 | } | 299 | } |
300 | 300 | ||
301 | static void r300_errata(struct radeon_device *rdev) | 301 | static void r300_errata(struct radeon_device *rdev) |
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c index 802b19220a21..2828605aef3f 100644 --- a/drivers/gpu/drm/radeon/r420.c +++ b/drivers/gpu/drm/radeon/r420.c | |||
@@ -219,7 +219,7 @@ static void r420_cp_errata_init(struct radeon_device *rdev) | |||
219 | radeon_ring_write(ring, PACKET0(R300_CP_RESYNC_ADDR, 1)); | 219 | radeon_ring_write(ring, PACKET0(R300_CP_RESYNC_ADDR, 1)); |
220 | radeon_ring_write(ring, rdev->config.r300.resync_scratch); | 220 | radeon_ring_write(ring, rdev->config.r300.resync_scratch); |
221 | radeon_ring_write(ring, 0xDEADBEEF); | 221 | radeon_ring_write(ring, 0xDEADBEEF); |
222 | radeon_ring_unlock_commit(rdev, ring); | 222 | radeon_ring_unlock_commit(rdev, ring, false); |
223 | } | 223 | } |
224 | 224 | ||
225 | static void r420_cp_errata_fini(struct radeon_device *rdev) | 225 | static void r420_cp_errata_fini(struct radeon_device *rdev) |
@@ -232,7 +232,7 @@ static void r420_cp_errata_fini(struct radeon_device *rdev) | |||
232 | radeon_ring_lock(rdev, ring, 8); | 232 | radeon_ring_lock(rdev, ring, 8); |
233 | radeon_ring_write(ring, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); | 233 | radeon_ring_write(ring, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); |
234 | radeon_ring_write(ring, R300_RB3D_DC_FINISH); | 234 | radeon_ring_write(ring, R300_RB3D_DC_FINISH); |
235 | radeon_ring_unlock_commit(rdev, ring); | 235 | radeon_ring_unlock_commit(rdev, ring, false); |
236 | radeon_scratch_free(rdev, rdev->config.r300.resync_scratch); | 236 | radeon_scratch_free(rdev, rdev->config.r300.resync_scratch); |
237 | } | 237 | } |
238 | 238 | ||
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index c70a504d96af..e8bf0ea2dade 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -2547,7 +2547,7 @@ int r600_cp_start(struct radeon_device *rdev) | |||
2547 | radeon_ring_write(ring, PACKET3_ME_INITIALIZE_DEVICE_ID(1)); | 2547 | radeon_ring_write(ring, PACKET3_ME_INITIALIZE_DEVICE_ID(1)); |
2548 | radeon_ring_write(ring, 0); | 2548 | radeon_ring_write(ring, 0); |
2549 | radeon_ring_write(ring, 0); | 2549 | radeon_ring_write(ring, 0); |
2550 | radeon_ring_unlock_commit(rdev, ring); | 2550 | radeon_ring_unlock_commit(rdev, ring, false); |
2551 | 2551 | ||
2552 | cp_me = 0xff; | 2552 | cp_me = 0xff; |
2553 | WREG32(R_0086D8_CP_ME_CNTL, cp_me); | 2553 | WREG32(R_0086D8_CP_ME_CNTL, cp_me); |
@@ -2683,7 +2683,7 @@ int r600_ring_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
2683 | radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); | 2683 | radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); |
2684 | radeon_ring_write(ring, ((scratch - PACKET3_SET_CONFIG_REG_OFFSET) >> 2)); | 2684 | radeon_ring_write(ring, ((scratch - PACKET3_SET_CONFIG_REG_OFFSET) >> 2)); |
2685 | radeon_ring_write(ring, 0xDEADBEEF); | 2685 | radeon_ring_write(ring, 0xDEADBEEF); |
2686 | radeon_ring_unlock_commit(rdev, ring); | 2686 | radeon_ring_unlock_commit(rdev, ring, false); |
2687 | for (i = 0; i < rdev->usec_timeout; i++) { | 2687 | for (i = 0; i < rdev->usec_timeout; i++) { |
2688 | tmp = RREG32(scratch); | 2688 | tmp = RREG32(scratch); |
2689 | if (tmp == 0xDEADBEEF) | 2689 | if (tmp == 0xDEADBEEF) |
@@ -2753,6 +2753,17 @@ void r600_fence_ring_emit(struct radeon_device *rdev, | |||
2753 | } | 2753 | } |
2754 | } | 2754 | } |
2755 | 2755 | ||
2756 | /** | ||
2757 | * r600_semaphore_ring_emit - emit a semaphore on the CP ring | ||
2758 | * | ||
2759 | * @rdev: radeon_device pointer | ||
2760 | * @ring: radeon ring buffer object | ||
2761 | * @semaphore: radeon semaphore object | ||
2762 | * @emit_wait: Is this a sempahore wait? | ||
2763 | * | ||
2764 | * Emits a semaphore signal/wait packet to the CP ring and prevents the PFP | ||
2765 | * from running ahead of semaphore waits. | ||
2766 | */ | ||
2756 | bool r600_semaphore_ring_emit(struct radeon_device *rdev, | 2767 | bool r600_semaphore_ring_emit(struct radeon_device *rdev, |
2757 | struct radeon_ring *ring, | 2768 | struct radeon_ring *ring, |
2758 | struct radeon_semaphore *semaphore, | 2769 | struct radeon_semaphore *semaphore, |
@@ -2768,6 +2779,13 @@ bool r600_semaphore_ring_emit(struct radeon_device *rdev, | |||
2768 | radeon_ring_write(ring, lower_32_bits(addr)); | 2779 | radeon_ring_write(ring, lower_32_bits(addr)); |
2769 | radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | sel); | 2780 | radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | sel); |
2770 | 2781 | ||
2782 | /* PFP_SYNC_ME packet only exists on 7xx+ */ | ||
2783 | if (emit_wait && (rdev->family >= CHIP_RV770)) { | ||
2784 | /* Prevent the PFP from running ahead of the semaphore wait */ | ||
2785 | radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); | ||
2786 | radeon_ring_write(ring, 0x0); | ||
2787 | } | ||
2788 | |||
2771 | return true; | 2789 | return true; |
2772 | } | 2790 | } |
2773 | 2791 | ||
@@ -2845,7 +2863,7 @@ int r600_copy_cpdma(struct radeon_device *rdev, | |||
2845 | return r; | 2863 | return r; |
2846 | } | 2864 | } |
2847 | 2865 | ||
2848 | radeon_ring_unlock_commit(rdev, ring); | 2866 | radeon_ring_unlock_commit(rdev, ring, false); |
2849 | radeon_semaphore_free(rdev, &sem, *fence); | 2867 | radeon_semaphore_free(rdev, &sem, *fence); |
2850 | 2868 | ||
2851 | return r; | 2869 | return r; |
@@ -3165,7 +3183,7 @@ int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
3165 | ib.ptr[1] = ((scratch - PACKET3_SET_CONFIG_REG_OFFSET) >> 2); | 3183 | ib.ptr[1] = ((scratch - PACKET3_SET_CONFIG_REG_OFFSET) >> 2); |
3166 | ib.ptr[2] = 0xDEADBEEF; | 3184 | ib.ptr[2] = 0xDEADBEEF; |
3167 | ib.length_dw = 3; | 3185 | ib.length_dw = 3; |
3168 | r = radeon_ib_schedule(rdev, &ib, NULL); | 3186 | r = radeon_ib_schedule(rdev, &ib, NULL, false); |
3169 | if (r) { | 3187 | if (r) { |
3170 | DRM_ERROR("radeon: failed to schedule ib (%d).\n", r); | 3188 | DRM_ERROR("radeon: failed to schedule ib (%d).\n", r); |
3171 | goto free_ib; | 3189 | goto free_ib; |
diff --git a/drivers/gpu/drm/radeon/r600_dma.c b/drivers/gpu/drm/radeon/r600_dma.c index 4969cef44a19..51fd98553eaf 100644 --- a/drivers/gpu/drm/radeon/r600_dma.c +++ b/drivers/gpu/drm/radeon/r600_dma.c | |||
@@ -261,7 +261,7 @@ int r600_dma_ring_test(struct radeon_device *rdev, | |||
261 | radeon_ring_write(ring, rdev->vram_scratch.gpu_addr & 0xfffffffc); | 261 | radeon_ring_write(ring, rdev->vram_scratch.gpu_addr & 0xfffffffc); |
262 | radeon_ring_write(ring, upper_32_bits(rdev->vram_scratch.gpu_addr) & 0xff); | 262 | radeon_ring_write(ring, upper_32_bits(rdev->vram_scratch.gpu_addr) & 0xff); |
263 | radeon_ring_write(ring, 0xDEADBEEF); | 263 | radeon_ring_write(ring, 0xDEADBEEF); |
264 | radeon_ring_unlock_commit(rdev, ring); | 264 | radeon_ring_unlock_commit(rdev, ring, false); |
265 | 265 | ||
266 | for (i = 0; i < rdev->usec_timeout; i++) { | 266 | for (i = 0; i < rdev->usec_timeout; i++) { |
267 | tmp = readl(ptr); | 267 | tmp = readl(ptr); |
@@ -368,7 +368,7 @@ int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
368 | ib.ptr[3] = 0xDEADBEEF; | 368 | ib.ptr[3] = 0xDEADBEEF; |
369 | ib.length_dw = 4; | 369 | ib.length_dw = 4; |
370 | 370 | ||
371 | r = radeon_ib_schedule(rdev, &ib, NULL); | 371 | r = radeon_ib_schedule(rdev, &ib, NULL, false); |
372 | if (r) { | 372 | if (r) { |
373 | radeon_ib_free(rdev, &ib); | 373 | radeon_ib_free(rdev, &ib); |
374 | DRM_ERROR("radeon: failed to schedule ib (%d).\n", r); | 374 | DRM_ERROR("radeon: failed to schedule ib (%d).\n", r); |
@@ -493,7 +493,7 @@ int r600_copy_dma(struct radeon_device *rdev, | |||
493 | return r; | 493 | return r; |
494 | } | 494 | } |
495 | 495 | ||
496 | radeon_ring_unlock_commit(rdev, ring); | 496 | radeon_ring_unlock_commit(rdev, ring, false); |
497 | radeon_semaphore_free(rdev, &sem, *fence); | 497 | radeon_semaphore_free(rdev, &sem, *fence); |
498 | 498 | ||
499 | return r; | 499 | return r; |
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h index f94e7a9afe75..0c4a7d8d93e0 100644 --- a/drivers/gpu/drm/radeon/r600d.h +++ b/drivers/gpu/drm/radeon/r600d.h | |||
@@ -1597,6 +1597,7 @@ | |||
1597 | */ | 1597 | */ |
1598 | # define PACKET3_CP_DMA_CMD_SAIC (1 << 28) | 1598 | # define PACKET3_CP_DMA_CMD_SAIC (1 << 28) |
1599 | # define PACKET3_CP_DMA_CMD_DAIC (1 << 29) | 1599 | # define PACKET3_CP_DMA_CMD_DAIC (1 << 29) |
1600 | #define PACKET3_PFP_SYNC_ME 0x42 /* r7xx+ only */ | ||
1600 | #define PACKET3_SURFACE_SYNC 0x43 | 1601 | #define PACKET3_SURFACE_SYNC 0x43 |
1601 | # define PACKET3_CB0_DEST_BASE_ENA (1 << 6) | 1602 | # define PACKET3_CB0_DEST_BASE_ENA (1 << 6) |
1602 | # define PACKET3_FULL_CACHE_ENA (1 << 20) /* r7xx+ only */ | 1603 | # define PACKET3_FULL_CACHE_ENA (1 << 20) /* r7xx+ only */ |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index e715e0c1f5d8..b281886f6f51 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -968,7 +968,7 @@ int radeon_ib_get(struct radeon_device *rdev, int ring, | |||
968 | unsigned size); | 968 | unsigned size); |
969 | void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib); | 969 | void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib); |
970 | int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, | 970 | int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, |
971 | struct radeon_ib *const_ib); | 971 | struct radeon_ib *const_ib, bool hdp_flush); |
972 | int radeon_ib_pool_init(struct radeon_device *rdev); | 972 | int radeon_ib_pool_init(struct radeon_device *rdev); |
973 | void radeon_ib_pool_fini(struct radeon_device *rdev); | 973 | void radeon_ib_pool_fini(struct radeon_device *rdev); |
974 | int radeon_ib_ring_tests(struct radeon_device *rdev); | 974 | int radeon_ib_ring_tests(struct radeon_device *rdev); |
@@ -978,8 +978,10 @@ bool radeon_ring_supports_scratch_reg(struct radeon_device *rdev, | |||
978 | void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *cp); | 978 | void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *cp); |
979 | int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ndw); | 979 | int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ndw); |
980 | int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ndw); | 980 | int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ndw); |
981 | void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *cp); | 981 | void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *cp, |
982 | void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *cp); | 982 | bool hdp_flush); |
983 | void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *cp, | ||
984 | bool hdp_flush); | ||
983 | void radeon_ring_undo(struct radeon_ring *ring); | 985 | void radeon_ring_undo(struct radeon_ring *ring); |
984 | void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *cp); | 986 | void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *cp); |
985 | int radeon_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); | 987 | int radeon_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); |
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c index ee712c199b25..83f382e8e40e 100644 --- a/drivers/gpu/drm/radeon/radeon_cs.c +++ b/drivers/gpu/drm/radeon/radeon_cs.c | |||
@@ -132,7 +132,8 @@ static int radeon_cs_parser_relocs(struct radeon_cs_parser *p) | |||
132 | * the buffers used for read only, which doubles the range | 132 | * the buffers used for read only, which doubles the range |
133 | * to 0 to 31. 32 is reserved for the kernel driver. | 133 | * to 0 to 31. 32 is reserved for the kernel driver. |
134 | */ | 134 | */ |
135 | priority = (r->flags & 0xf) * 2 + !!r->write_domain; | 135 | priority = (r->flags & RADEON_RELOC_PRIO_MASK) * 2 |
136 | + !!r->write_domain; | ||
136 | 137 | ||
137 | /* the first reloc of an UVD job is the msg and that must be in | 138 | /* the first reloc of an UVD job is the msg and that must be in |
138 | VRAM, also but everything into VRAM on AGP cards to avoid | 139 | VRAM, also but everything into VRAM on AGP cards to avoid |
@@ -450,7 +451,7 @@ static int radeon_cs_ib_chunk(struct radeon_device *rdev, | |||
450 | radeon_vce_note_usage(rdev); | 451 | radeon_vce_note_usage(rdev); |
451 | 452 | ||
452 | radeon_cs_sync_rings(parser); | 453 | radeon_cs_sync_rings(parser); |
453 | r = radeon_ib_schedule(rdev, &parser->ib, NULL); | 454 | r = radeon_ib_schedule(rdev, &parser->ib, NULL, true); |
454 | if (r) { | 455 | if (r) { |
455 | DRM_ERROR("Failed to schedule IB !\n"); | 456 | DRM_ERROR("Failed to schedule IB !\n"); |
456 | } | 457 | } |
@@ -541,9 +542,9 @@ static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev, | |||
541 | 542 | ||
542 | if ((rdev->family >= CHIP_TAHITI) && | 543 | if ((rdev->family >= CHIP_TAHITI) && |
543 | (parser->chunk_const_ib_idx != -1)) { | 544 | (parser->chunk_const_ib_idx != -1)) { |
544 | r = radeon_ib_schedule(rdev, &parser->ib, &parser->const_ib); | 545 | r = radeon_ib_schedule(rdev, &parser->ib, &parser->const_ib, true); |
545 | } else { | 546 | } else { |
546 | r = radeon_ib_schedule(rdev, &parser->ib, NULL); | 547 | r = radeon_ib_schedule(rdev, &parser->ib, NULL, true); |
547 | } | 548 | } |
548 | 549 | ||
549 | out: | 550 | out: |
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index c8ea050c8fa4..6a219bcee66d 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -1680,8 +1680,8 @@ int radeon_gpu_reset(struct radeon_device *rdev) | |||
1680 | radeon_save_bios_scratch_regs(rdev); | 1680 | radeon_save_bios_scratch_regs(rdev); |
1681 | /* block TTM */ | 1681 | /* block TTM */ |
1682 | resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev); | 1682 | resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev); |
1683 | radeon_pm_suspend(rdev); | ||
1684 | radeon_suspend(rdev); | 1683 | radeon_suspend(rdev); |
1684 | radeon_hpd_fini(rdev); | ||
1685 | 1685 | ||
1686 | for (i = 0; i < RADEON_NUM_RINGS; ++i) { | 1686 | for (i = 0; i < RADEON_NUM_RINGS; ++i) { |
1687 | ring_sizes[i] = radeon_ring_backup(rdev, &rdev->ring[i], | 1687 | ring_sizes[i] = radeon_ring_backup(rdev, &rdev->ring[i], |
@@ -1726,9 +1726,39 @@ retry: | |||
1726 | } | 1726 | } |
1727 | } | 1727 | } |
1728 | 1728 | ||
1729 | radeon_pm_resume(rdev); | 1729 | if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { |
1730 | /* do dpm late init */ | ||
1731 | r = radeon_pm_late_init(rdev); | ||
1732 | if (r) { | ||
1733 | rdev->pm.dpm_enabled = false; | ||
1734 | DRM_ERROR("radeon_pm_late_init failed, disabling dpm\n"); | ||
1735 | } | ||
1736 | } else { | ||
1737 | /* resume old pm late */ | ||
1738 | radeon_pm_resume(rdev); | ||
1739 | } | ||
1740 | |||
1741 | /* init dig PHYs, disp eng pll */ | ||
1742 | if (rdev->is_atom_bios) { | ||
1743 | radeon_atom_encoder_init(rdev); | ||
1744 | radeon_atom_disp_eng_pll_init(rdev); | ||
1745 | /* turn on the BL */ | ||
1746 | if (rdev->mode_info.bl_encoder) { | ||
1747 | u8 bl_level = radeon_get_backlight_level(rdev, | ||
1748 | rdev->mode_info.bl_encoder); | ||
1749 | radeon_set_backlight_level(rdev, rdev->mode_info.bl_encoder, | ||
1750 | bl_level); | ||
1751 | } | ||
1752 | } | ||
1753 | /* reset hpd state */ | ||
1754 | radeon_hpd_init(rdev); | ||
1755 | |||
1730 | drm_helper_resume_force_mode(rdev->ddev); | 1756 | drm_helper_resume_force_mode(rdev->ddev); |
1731 | 1757 | ||
1758 | /* set the power state here in case we are a PX system or headless */ | ||
1759 | if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) | ||
1760 | radeon_pm_compute_clocks(rdev); | ||
1761 | |||
1732 | ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched); | 1762 | ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched); |
1733 | if (r) { | 1763 | if (r) { |
1734 | /* bad news, how to tell it to userspace ? */ | 1764 | /* bad news, how to tell it to userspace ? */ |
diff --git a/drivers/gpu/drm/radeon/radeon_ib.c b/drivers/gpu/drm/radeon/radeon_ib.c index 65b0c213488d..5bf2c0a05827 100644 --- a/drivers/gpu/drm/radeon/radeon_ib.c +++ b/drivers/gpu/drm/radeon/radeon_ib.c | |||
@@ -107,6 +107,7 @@ void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib) | |||
107 | * @rdev: radeon_device pointer | 107 | * @rdev: radeon_device pointer |
108 | * @ib: IB object to schedule | 108 | * @ib: IB object to schedule |
109 | * @const_ib: Const IB to schedule (SI only) | 109 | * @const_ib: Const IB to schedule (SI only) |
110 | * @hdp_flush: Whether or not to perform an HDP cache flush | ||
110 | * | 111 | * |
111 | * Schedule an IB on the associated ring (all asics). | 112 | * Schedule an IB on the associated ring (all asics). |
112 | * Returns 0 on success, error on failure. | 113 | * Returns 0 on success, error on failure. |
@@ -122,7 +123,7 @@ void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib) | |||
122 | * to SI there was just a DE IB. | 123 | * to SI there was just a DE IB. |
123 | */ | 124 | */ |
124 | int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, | 125 | int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, |
125 | struct radeon_ib *const_ib) | 126 | struct radeon_ib *const_ib, bool hdp_flush) |
126 | { | 127 | { |
127 | struct radeon_ring *ring = &rdev->ring[ib->ring]; | 128 | struct radeon_ring *ring = &rdev->ring[ib->ring]; |
128 | int r = 0; | 129 | int r = 0; |
@@ -176,7 +177,7 @@ int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, | |||
176 | if (ib->vm) | 177 | if (ib->vm) |
177 | radeon_vm_fence(rdev, ib->vm, ib->fence); | 178 | radeon_vm_fence(rdev, ib->vm, ib->fence); |
178 | 179 | ||
179 | radeon_ring_unlock_commit(rdev, ring); | 180 | radeon_ring_unlock_commit(rdev, ring, hdp_flush); |
180 | return 0; | 181 | return 0; |
181 | } | 182 | } |
182 | 183 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c index 5b4e0cf231a0..d65607902537 100644 --- a/drivers/gpu/drm/radeon/radeon_ring.c +++ b/drivers/gpu/drm/radeon/radeon_ring.c | |||
@@ -177,16 +177,18 @@ int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *ring, unsig | |||
177 | * | 177 | * |
178 | * @rdev: radeon_device pointer | 178 | * @rdev: radeon_device pointer |
179 | * @ring: radeon_ring structure holding ring information | 179 | * @ring: radeon_ring structure holding ring information |
180 | * @hdp_flush: Whether or not to perform an HDP cache flush | ||
180 | * | 181 | * |
181 | * Update the wptr (write pointer) to tell the GPU to | 182 | * Update the wptr (write pointer) to tell the GPU to |
182 | * execute new commands on the ring buffer (all asics). | 183 | * execute new commands on the ring buffer (all asics). |
183 | */ | 184 | */ |
184 | void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring) | 185 | void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring, |
186 | bool hdp_flush) | ||
185 | { | 187 | { |
186 | /* If we are emitting the HDP flush via the ring buffer, we need to | 188 | /* If we are emitting the HDP flush via the ring buffer, we need to |
187 | * do it before padding. | 189 | * do it before padding. |
188 | */ | 190 | */ |
189 | if (rdev->asic->ring[ring->idx]->hdp_flush) | 191 | if (hdp_flush && rdev->asic->ring[ring->idx]->hdp_flush) |
190 | rdev->asic->ring[ring->idx]->hdp_flush(rdev, ring); | 192 | rdev->asic->ring[ring->idx]->hdp_flush(rdev, ring); |
191 | /* We pad to match fetch size */ | 193 | /* We pad to match fetch size */ |
192 | while (ring->wptr & ring->align_mask) { | 194 | while (ring->wptr & ring->align_mask) { |
@@ -196,7 +198,7 @@ void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring) | |||
196 | /* If we are emitting the HDP flush via MMIO, we need to do it after | 198 | /* If we are emitting the HDP flush via MMIO, we need to do it after |
197 | * all CPU writes to VRAM finished. | 199 | * all CPU writes to VRAM finished. |
198 | */ | 200 | */ |
199 | if (rdev->asic->mmio_hdp_flush) | 201 | if (hdp_flush && rdev->asic->mmio_hdp_flush) |
200 | rdev->asic->mmio_hdp_flush(rdev); | 202 | rdev->asic->mmio_hdp_flush(rdev); |
201 | radeon_ring_set_wptr(rdev, ring); | 203 | radeon_ring_set_wptr(rdev, ring); |
202 | } | 204 | } |
@@ -207,12 +209,14 @@ void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring) | |||
207 | * | 209 | * |
208 | * @rdev: radeon_device pointer | 210 | * @rdev: radeon_device pointer |
209 | * @ring: radeon_ring structure holding ring information | 211 | * @ring: radeon_ring structure holding ring information |
212 | * @hdp_flush: Whether or not to perform an HDP cache flush | ||
210 | * | 213 | * |
211 | * Call radeon_ring_commit() then unlock the ring (all asics). | 214 | * Call radeon_ring_commit() then unlock the ring (all asics). |
212 | */ | 215 | */ |
213 | void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *ring) | 216 | void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *ring, |
217 | bool hdp_flush) | ||
214 | { | 218 | { |
215 | radeon_ring_commit(rdev, ring); | 219 | radeon_ring_commit(rdev, ring, hdp_flush); |
216 | mutex_unlock(&rdev->ring_lock); | 220 | mutex_unlock(&rdev->ring_lock); |
217 | } | 221 | } |
218 | 222 | ||
@@ -372,7 +376,7 @@ int radeon_ring_restore(struct radeon_device *rdev, struct radeon_ring *ring, | |||
372 | radeon_ring_write(ring, data[i]); | 376 | radeon_ring_write(ring, data[i]); |
373 | } | 377 | } |
374 | 378 | ||
375 | radeon_ring_unlock_commit(rdev, ring); | 379 | radeon_ring_unlock_commit(rdev, ring, false); |
376 | kfree(data); | 380 | kfree(data); |
377 | return 0; | 381 | return 0; |
378 | } | 382 | } |
@@ -400,9 +404,7 @@ int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsig | |||
400 | /* Allocate ring buffer */ | 404 | /* Allocate ring buffer */ |
401 | if (ring->ring_obj == NULL) { | 405 | if (ring->ring_obj == NULL) { |
402 | r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true, | 406 | r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true, |
403 | RADEON_GEM_DOMAIN_GTT, | 407 | RADEON_GEM_DOMAIN_GTT, 0, |
404 | (rdev->flags & RADEON_IS_PCIE) ? | ||
405 | RADEON_GEM_GTT_WC : 0, | ||
406 | NULL, &ring->ring_obj); | 408 | NULL, &ring->ring_obj); |
407 | if (r) { | 409 | if (r) { |
408 | dev_err(rdev->dev, "(%d) ring create failed\n", r); | 410 | dev_err(rdev->dev, "(%d) ring create failed\n", r); |
diff --git a/drivers/gpu/drm/radeon/radeon_semaphore.c b/drivers/gpu/drm/radeon/radeon_semaphore.c index dbd6bcde92de..56d9fd66d8ae 100644 --- a/drivers/gpu/drm/radeon/radeon_semaphore.c +++ b/drivers/gpu/drm/radeon/radeon_semaphore.c | |||
@@ -179,7 +179,7 @@ int radeon_semaphore_sync_rings(struct radeon_device *rdev, | |||
179 | continue; | 179 | continue; |
180 | } | 180 | } |
181 | 181 | ||
182 | radeon_ring_commit(rdev, &rdev->ring[i]); | 182 | radeon_ring_commit(rdev, &rdev->ring[i], false); |
183 | radeon_fence_note_sync(fence, ring); | 183 | radeon_fence_note_sync(fence, ring); |
184 | 184 | ||
185 | semaphore->gpu_addr += 8; | 185 | semaphore->gpu_addr += 8; |
diff --git a/drivers/gpu/drm/radeon/radeon_test.c b/drivers/gpu/drm/radeon/radeon_test.c index 5adf4207453d..17bc3dced9f1 100644 --- a/drivers/gpu/drm/radeon/radeon_test.c +++ b/drivers/gpu/drm/radeon/radeon_test.c | |||
@@ -288,7 +288,7 @@ static int radeon_test_create_and_emit_fence(struct radeon_device *rdev, | |||
288 | return r; | 288 | return r; |
289 | } | 289 | } |
290 | radeon_fence_emit(rdev, fence, ring->idx); | 290 | radeon_fence_emit(rdev, fence, ring->idx); |
291 | radeon_ring_unlock_commit(rdev, ring); | 291 | radeon_ring_unlock_commit(rdev, ring, false); |
292 | } | 292 | } |
293 | return 0; | 293 | return 0; |
294 | } | 294 | } |
@@ -313,7 +313,7 @@ void radeon_test_ring_sync(struct radeon_device *rdev, | |||
313 | goto out_cleanup; | 313 | goto out_cleanup; |
314 | } | 314 | } |
315 | radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); | 315 | radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); |
316 | radeon_ring_unlock_commit(rdev, ringA); | 316 | radeon_ring_unlock_commit(rdev, ringA, false); |
317 | 317 | ||
318 | r = radeon_test_create_and_emit_fence(rdev, ringA, &fence1); | 318 | r = radeon_test_create_and_emit_fence(rdev, ringA, &fence1); |
319 | if (r) | 319 | if (r) |
@@ -325,7 +325,7 @@ void radeon_test_ring_sync(struct radeon_device *rdev, | |||
325 | goto out_cleanup; | 325 | goto out_cleanup; |
326 | } | 326 | } |
327 | radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); | 327 | radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); |
328 | radeon_ring_unlock_commit(rdev, ringA); | 328 | radeon_ring_unlock_commit(rdev, ringA, false); |
329 | 329 | ||
330 | r = radeon_test_create_and_emit_fence(rdev, ringA, &fence2); | 330 | r = radeon_test_create_and_emit_fence(rdev, ringA, &fence2); |
331 | if (r) | 331 | if (r) |
@@ -344,7 +344,7 @@ void radeon_test_ring_sync(struct radeon_device *rdev, | |||
344 | goto out_cleanup; | 344 | goto out_cleanup; |
345 | } | 345 | } |
346 | radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore); | 346 | radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore); |
347 | radeon_ring_unlock_commit(rdev, ringB); | 347 | radeon_ring_unlock_commit(rdev, ringB, false); |
348 | 348 | ||
349 | r = radeon_fence_wait(fence1, false); | 349 | r = radeon_fence_wait(fence1, false); |
350 | if (r) { | 350 | if (r) { |
@@ -365,7 +365,7 @@ void radeon_test_ring_sync(struct radeon_device *rdev, | |||
365 | goto out_cleanup; | 365 | goto out_cleanup; |
366 | } | 366 | } |
367 | radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore); | 367 | radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore); |
368 | radeon_ring_unlock_commit(rdev, ringB); | 368 | radeon_ring_unlock_commit(rdev, ringB, false); |
369 | 369 | ||
370 | r = radeon_fence_wait(fence2, false); | 370 | r = radeon_fence_wait(fence2, false); |
371 | if (r) { | 371 | if (r) { |
@@ -408,7 +408,7 @@ static void radeon_test_ring_sync2(struct radeon_device *rdev, | |||
408 | goto out_cleanup; | 408 | goto out_cleanup; |
409 | } | 409 | } |
410 | radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); | 410 | radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); |
411 | radeon_ring_unlock_commit(rdev, ringA); | 411 | radeon_ring_unlock_commit(rdev, ringA, false); |
412 | 412 | ||
413 | r = radeon_test_create_and_emit_fence(rdev, ringA, &fenceA); | 413 | r = radeon_test_create_and_emit_fence(rdev, ringA, &fenceA); |
414 | if (r) | 414 | if (r) |
@@ -420,7 +420,7 @@ static void radeon_test_ring_sync2(struct radeon_device *rdev, | |||
420 | goto out_cleanup; | 420 | goto out_cleanup; |
421 | } | 421 | } |
422 | radeon_semaphore_emit_wait(rdev, ringB->idx, semaphore); | 422 | radeon_semaphore_emit_wait(rdev, ringB->idx, semaphore); |
423 | radeon_ring_unlock_commit(rdev, ringB); | 423 | radeon_ring_unlock_commit(rdev, ringB, false); |
424 | r = radeon_test_create_and_emit_fence(rdev, ringB, &fenceB); | 424 | r = radeon_test_create_and_emit_fence(rdev, ringB, &fenceB); |
425 | if (r) | 425 | if (r) |
426 | goto out_cleanup; | 426 | goto out_cleanup; |
@@ -442,7 +442,7 @@ static void radeon_test_ring_sync2(struct radeon_device *rdev, | |||
442 | goto out_cleanup; | 442 | goto out_cleanup; |
443 | } | 443 | } |
444 | radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore); | 444 | radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore); |
445 | radeon_ring_unlock_commit(rdev, ringC); | 445 | radeon_ring_unlock_commit(rdev, ringC, false); |
446 | 446 | ||
447 | for (i = 0; i < 30; ++i) { | 447 | for (i = 0; i < 30; ++i) { |
448 | mdelay(100); | 448 | mdelay(100); |
@@ -468,7 +468,7 @@ static void radeon_test_ring_sync2(struct radeon_device *rdev, | |||
468 | goto out_cleanup; | 468 | goto out_cleanup; |
469 | } | 469 | } |
470 | radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore); | 470 | radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore); |
471 | radeon_ring_unlock_commit(rdev, ringC); | 471 | radeon_ring_unlock_commit(rdev, ringC, false); |
472 | 472 | ||
473 | mdelay(1000); | 473 | mdelay(1000); |
474 | 474 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c index 6bf55ec85b62..341848a14376 100644 --- a/drivers/gpu/drm/radeon/radeon_uvd.c +++ b/drivers/gpu/drm/radeon/radeon_uvd.c | |||
@@ -646,7 +646,7 @@ static int radeon_uvd_send_msg(struct radeon_device *rdev, | |||
646 | ib.ptr[i] = PACKET2(0); | 646 | ib.ptr[i] = PACKET2(0); |
647 | ib.length_dw = 16; | 647 | ib.length_dw = 16; |
648 | 648 | ||
649 | r = radeon_ib_schedule(rdev, &ib, NULL); | 649 | r = radeon_ib_schedule(rdev, &ib, NULL, false); |
650 | if (r) | 650 | if (r) |
651 | goto err; | 651 | goto err; |
652 | ttm_eu_fence_buffer_objects(&ticket, &head, ib.fence); | 652 | ttm_eu_fence_buffer_objects(&ticket, &head, ib.fence); |
diff --git a/drivers/gpu/drm/radeon/radeon_vce.c b/drivers/gpu/drm/radeon/radeon_vce.c index f9b70a43aa52..c7190aadbd89 100644 --- a/drivers/gpu/drm/radeon/radeon_vce.c +++ b/drivers/gpu/drm/radeon/radeon_vce.c | |||
@@ -368,7 +368,7 @@ int radeon_vce_get_create_msg(struct radeon_device *rdev, int ring, | |||
368 | for (i = ib.length_dw; i < ib_size_dw; ++i) | 368 | for (i = ib.length_dw; i < ib_size_dw; ++i) |
369 | ib.ptr[i] = 0x0; | 369 | ib.ptr[i] = 0x0; |
370 | 370 | ||
371 | r = radeon_ib_schedule(rdev, &ib, NULL); | 371 | r = radeon_ib_schedule(rdev, &ib, NULL, false); |
372 | if (r) { | 372 | if (r) { |
373 | DRM_ERROR("radeon: failed to schedule ib (%d).\n", r); | 373 | DRM_ERROR("radeon: failed to schedule ib (%d).\n", r); |
374 | } | 374 | } |
@@ -425,7 +425,7 @@ int radeon_vce_get_destroy_msg(struct radeon_device *rdev, int ring, | |||
425 | for (i = ib.length_dw; i < ib_size_dw; ++i) | 425 | for (i = ib.length_dw; i < ib_size_dw; ++i) |
426 | ib.ptr[i] = 0x0; | 426 | ib.ptr[i] = 0x0; |
427 | 427 | ||
428 | r = radeon_ib_schedule(rdev, &ib, NULL); | 428 | r = radeon_ib_schedule(rdev, &ib, NULL, false); |
429 | if (r) { | 429 | if (r) { |
430 | DRM_ERROR("radeon: failed to schedule ib (%d).\n", r); | 430 | DRM_ERROR("radeon: failed to schedule ib (%d).\n", r); |
431 | } | 431 | } |
@@ -715,7 +715,7 @@ int radeon_vce_ring_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
715 | return r; | 715 | return r; |
716 | } | 716 | } |
717 | radeon_ring_write(ring, VCE_CMD_END); | 717 | radeon_ring_write(ring, VCE_CMD_END); |
718 | radeon_ring_unlock_commit(rdev, ring); | 718 | radeon_ring_unlock_commit(rdev, ring, false); |
719 | 719 | ||
720 | for (i = 0; i < rdev->usec_timeout; i++) { | 720 | for (i = 0; i < rdev->usec_timeout; i++) { |
721 | if (vce_v1_0_get_rptr(rdev, ring) != rptr) | 721 | if (vce_v1_0_get_rptr(rdev, ring) != rptr) |
diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c index 058f20085369..088ffdc2f577 100644 --- a/drivers/gpu/drm/radeon/radeon_vm.c +++ b/drivers/gpu/drm/radeon/radeon_vm.c | |||
@@ -238,9 +238,7 @@ void radeon_vm_flush(struct radeon_device *rdev, | |||
238 | uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory); | 238 | uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory); |
239 | 239 | ||
240 | /* if we can't remember our last VM flush then flush now! */ | 240 | /* if we can't remember our last VM flush then flush now! */ |
241 | /* XXX figure out why we have to flush all the time before CIK */ | 241 | if (!vm->last_flush || pd_addr != vm->pd_gpu_addr) { |
242 | if (rdev->family < CHIP_BONAIRE || | ||
243 | !vm->last_flush || pd_addr != vm->pd_gpu_addr) { | ||
244 | trace_radeon_vm_flush(pd_addr, ring, vm->id); | 242 | trace_radeon_vm_flush(pd_addr, ring, vm->id); |
245 | vm->pd_gpu_addr = pd_addr; | 243 | vm->pd_gpu_addr = pd_addr; |
246 | radeon_ring_vm_flush(rdev, ring, vm); | 244 | radeon_ring_vm_flush(rdev, ring, vm); |
@@ -422,7 +420,7 @@ static int radeon_vm_clear_bo(struct radeon_device *rdev, | |||
422 | radeon_asic_vm_pad_ib(rdev, &ib); | 420 | radeon_asic_vm_pad_ib(rdev, &ib); |
423 | WARN_ON(ib.length_dw > 64); | 421 | WARN_ON(ib.length_dw > 64); |
424 | 422 | ||
425 | r = radeon_ib_schedule(rdev, &ib, NULL); | 423 | r = radeon_ib_schedule(rdev, &ib, NULL, false); |
426 | if (r) | 424 | if (r) |
427 | goto error; | 425 | goto error; |
428 | 426 | ||
@@ -699,7 +697,7 @@ int radeon_vm_update_page_directory(struct radeon_device *rdev, | |||
699 | radeon_semaphore_sync_to(ib.semaphore, pd->tbo.sync_obj); | 697 | radeon_semaphore_sync_to(ib.semaphore, pd->tbo.sync_obj); |
700 | radeon_semaphore_sync_to(ib.semaphore, vm->last_id_use); | 698 | radeon_semaphore_sync_to(ib.semaphore, vm->last_id_use); |
701 | WARN_ON(ib.length_dw > ndw); | 699 | WARN_ON(ib.length_dw > ndw); |
702 | r = radeon_ib_schedule(rdev, &ib, NULL); | 700 | r = radeon_ib_schedule(rdev, &ib, NULL, false); |
703 | if (r) { | 701 | if (r) { |
704 | radeon_ib_free(rdev, &ib); | 702 | radeon_ib_free(rdev, &ib); |
705 | return r; | 703 | return r; |
@@ -963,7 +961,7 @@ int radeon_vm_bo_update(struct radeon_device *rdev, | |||
963 | WARN_ON(ib.length_dw > ndw); | 961 | WARN_ON(ib.length_dw > ndw); |
964 | 962 | ||
965 | radeon_semaphore_sync_to(ib.semaphore, vm->fence); | 963 | radeon_semaphore_sync_to(ib.semaphore, vm->fence); |
966 | r = radeon_ib_schedule(rdev, &ib, NULL); | 964 | r = radeon_ib_schedule(rdev, &ib, NULL, false); |
967 | if (r) { | 965 | if (r) { |
968 | radeon_ib_free(rdev, &ib); | 966 | radeon_ib_free(rdev, &ib); |
969 | return r; | 967 | return r; |
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c index 3e21e869015f..8a477bf1fdb3 100644 --- a/drivers/gpu/drm/radeon/rv515.c +++ b/drivers/gpu/drm/radeon/rv515.c | |||
@@ -124,7 +124,7 @@ void rv515_ring_start(struct radeon_device *rdev, struct radeon_ring *ring) | |||
124 | radeon_ring_write(ring, GEOMETRY_ROUND_NEAREST | COLOR_ROUND_NEAREST); | 124 | radeon_ring_write(ring, GEOMETRY_ROUND_NEAREST | COLOR_ROUND_NEAREST); |
125 | radeon_ring_write(ring, PACKET0(0x20C8, 0)); | 125 | radeon_ring_write(ring, PACKET0(0x20C8, 0)); |
126 | radeon_ring_write(ring, 0); | 126 | radeon_ring_write(ring, 0); |
127 | radeon_ring_unlock_commit(rdev, ring); | 127 | radeon_ring_unlock_commit(rdev, ring, false); |
128 | } | 128 | } |
129 | 129 | ||
130 | int rv515_mc_wait_for_idle(struct radeon_device *rdev) | 130 | int rv515_mc_wait_for_idle(struct radeon_device *rdev) |
diff --git a/drivers/gpu/drm/radeon/rv770_dma.c b/drivers/gpu/drm/radeon/rv770_dma.c index bbf2e076ee45..74426ac2bb5c 100644 --- a/drivers/gpu/drm/radeon/rv770_dma.c +++ b/drivers/gpu/drm/radeon/rv770_dma.c | |||
@@ -90,7 +90,7 @@ int rv770_copy_dma(struct radeon_device *rdev, | |||
90 | return r; | 90 | return r; |
91 | } | 91 | } |
92 | 92 | ||
93 | radeon_ring_unlock_commit(rdev, ring); | 93 | radeon_ring_unlock_commit(rdev, ring, false); |
94 | radeon_semaphore_free(rdev, &sem, *fence); | 94 | radeon_semaphore_free(rdev, &sem, *fence); |
95 | 95 | ||
96 | return r; | 96 | return r; |
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index dbd9d8101f05..a1274a31405c 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
@@ -3057,7 +3057,7 @@ static void si_gpu_init(struct radeon_device *rdev) | |||
3057 | u32 sx_debug_1; | 3057 | u32 sx_debug_1; |
3058 | u32 hdp_host_path_cntl; | 3058 | u32 hdp_host_path_cntl; |
3059 | u32 tmp; | 3059 | u32 tmp; |
3060 | int i, j, k; | 3060 | int i, j; |
3061 | 3061 | ||
3062 | switch (rdev->family) { | 3062 | switch (rdev->family) { |
3063 | case CHIP_TAHITI: | 3063 | case CHIP_TAHITI: |
@@ -3255,12 +3255,11 @@ static void si_gpu_init(struct radeon_device *rdev) | |||
3255 | rdev->config.si.max_sh_per_se, | 3255 | rdev->config.si.max_sh_per_se, |
3256 | rdev->config.si.max_cu_per_sh); | 3256 | rdev->config.si.max_cu_per_sh); |
3257 | 3257 | ||
3258 | rdev->config.si.active_cus = 0; | ||
3258 | for (i = 0; i < rdev->config.si.max_shader_engines; i++) { | 3259 | for (i = 0; i < rdev->config.si.max_shader_engines; i++) { |
3259 | for (j = 0; j < rdev->config.si.max_sh_per_se; j++) { | 3260 | for (j = 0; j < rdev->config.si.max_sh_per_se; j++) { |
3260 | for (k = 0; k < rdev->config.si.max_cu_per_sh; k++) { | 3261 | rdev->config.si.active_cus += |
3261 | rdev->config.si.active_cus += | 3262 | hweight32(si_get_cu_active_bitmap(rdev, i, j)); |
3262 | hweight32(si_get_cu_active_bitmap(rdev, i, j)); | ||
3263 | } | ||
3264 | } | 3263 | } |
3265 | } | 3264 | } |
3266 | 3265 | ||
@@ -3541,7 +3540,7 @@ static int si_cp_start(struct radeon_device *rdev) | |||
3541 | radeon_ring_write(ring, PACKET3_BASE_INDEX(CE_PARTITION_BASE)); | 3540 | radeon_ring_write(ring, PACKET3_BASE_INDEX(CE_PARTITION_BASE)); |
3542 | radeon_ring_write(ring, 0xc000); | 3541 | radeon_ring_write(ring, 0xc000); |
3543 | radeon_ring_write(ring, 0xe000); | 3542 | radeon_ring_write(ring, 0xe000); |
3544 | radeon_ring_unlock_commit(rdev, ring); | 3543 | radeon_ring_unlock_commit(rdev, ring, false); |
3545 | 3544 | ||
3546 | si_cp_enable(rdev, true); | 3545 | si_cp_enable(rdev, true); |
3547 | 3546 | ||
@@ -3570,7 +3569,7 @@ static int si_cp_start(struct radeon_device *rdev) | |||
3570 | radeon_ring_write(ring, 0x0000000e); /* VGT_VERTEX_REUSE_BLOCK_CNTL */ | 3569 | radeon_ring_write(ring, 0x0000000e); /* VGT_VERTEX_REUSE_BLOCK_CNTL */ |
3571 | radeon_ring_write(ring, 0x00000010); /* VGT_OUT_DEALLOC_CNTL */ | 3570 | radeon_ring_write(ring, 0x00000010); /* VGT_OUT_DEALLOC_CNTL */ |
3572 | 3571 | ||
3573 | radeon_ring_unlock_commit(rdev, ring); | 3572 | radeon_ring_unlock_commit(rdev, ring, false); |
3574 | 3573 | ||
3575 | for (i = RADEON_RING_TYPE_GFX_INDEX; i <= CAYMAN_RING_TYPE_CP2_INDEX; ++i) { | 3574 | for (i = RADEON_RING_TYPE_GFX_INDEX; i <= CAYMAN_RING_TYPE_CP2_INDEX; ++i) { |
3576 | ring = &rdev->ring[i]; | 3575 | ring = &rdev->ring[i]; |
@@ -3580,7 +3579,7 @@ static int si_cp_start(struct radeon_device *rdev) | |||
3580 | radeon_ring_write(ring, PACKET3_COMPUTE(PACKET3_CLEAR_STATE, 0)); | 3579 | radeon_ring_write(ring, PACKET3_COMPUTE(PACKET3_CLEAR_STATE, 0)); |
3581 | radeon_ring_write(ring, 0); | 3580 | radeon_ring_write(ring, 0); |
3582 | 3581 | ||
3583 | radeon_ring_unlock_commit(rdev, ring); | 3582 | radeon_ring_unlock_commit(rdev, ring, false); |
3584 | } | 3583 | } |
3585 | 3584 | ||
3586 | return 0; | 3585 | return 0; |
diff --git a/drivers/gpu/drm/radeon/si_dma.c b/drivers/gpu/drm/radeon/si_dma.c index 716505129450..7c22baaf94db 100644 --- a/drivers/gpu/drm/radeon/si_dma.c +++ b/drivers/gpu/drm/radeon/si_dma.c | |||
@@ -275,7 +275,7 @@ int si_copy_dma(struct radeon_device *rdev, | |||
275 | return r; | 275 | return r; |
276 | } | 276 | } |
277 | 277 | ||
278 | radeon_ring_unlock_commit(rdev, ring); | 278 | radeon_ring_unlock_commit(rdev, ring, false); |
279 | radeon_semaphore_free(rdev, &sem, *fence); | 279 | radeon_semaphore_free(rdev, &sem, *fence); |
280 | 280 | ||
281 | return r; | 281 | return r; |
diff --git a/drivers/gpu/drm/radeon/uvd_v1_0.c b/drivers/gpu/drm/radeon/uvd_v1_0.c index be42c8125203..cda391347286 100644 --- a/drivers/gpu/drm/radeon/uvd_v1_0.c +++ b/drivers/gpu/drm/radeon/uvd_v1_0.c | |||
@@ -124,7 +124,7 @@ int uvd_v1_0_init(struct radeon_device *rdev) | |||
124 | radeon_ring_write(ring, PACKET0(UVD_SEMA_CNTL, 0)); | 124 | radeon_ring_write(ring, PACKET0(UVD_SEMA_CNTL, 0)); |
125 | radeon_ring_write(ring, 3); | 125 | radeon_ring_write(ring, 3); |
126 | 126 | ||
127 | radeon_ring_unlock_commit(rdev, ring); | 127 | radeon_ring_unlock_commit(rdev, ring, false); |
128 | 128 | ||
129 | done: | 129 | done: |
130 | /* lower clocks again */ | 130 | /* lower clocks again */ |
@@ -331,7 +331,7 @@ int uvd_v1_0_ring_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
331 | } | 331 | } |
332 | radeon_ring_write(ring, PACKET0(UVD_CONTEXT_ID, 0)); | 332 | radeon_ring_write(ring, PACKET0(UVD_CONTEXT_ID, 0)); |
333 | radeon_ring_write(ring, 0xDEADBEEF); | 333 | radeon_ring_write(ring, 0xDEADBEEF); |
334 | radeon_ring_unlock_commit(rdev, ring); | 334 | radeon_ring_unlock_commit(rdev, ring, false); |
335 | for (i = 0; i < rdev->usec_timeout; i++) { | 335 | for (i = 0; i < rdev->usec_timeout; i++) { |
336 | tmp = RREG32(UVD_CONTEXT_ID); | 336 | tmp = RREG32(UVD_CONTEXT_ID); |
337 | if (tmp == 0xDEADBEEF) | 337 | if (tmp == 0xDEADBEEF) |
diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h index 509b2d7a41b7..fea6099608ef 100644 --- a/include/uapi/drm/radeon_drm.h +++ b/include/uapi/drm/radeon_drm.h | |||
@@ -944,6 +944,7 @@ struct drm_radeon_cs_chunk { | |||
944 | }; | 944 | }; |
945 | 945 | ||
946 | /* drm_radeon_cs_reloc.flags */ | 946 | /* drm_radeon_cs_reloc.flags */ |
947 | #define RADEON_RELOC_PRIO_MASK (0xf << 0) | ||
947 | 948 | ||
948 | struct drm_radeon_cs_reloc { | 949 | struct drm_radeon_cs_reloc { |
949 | uint32_t handle; | 950 | uint32_t handle; |