diff options
author | Joel Fernandes <joelf@ti.com> | 2016-10-18 03:55:21 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2016-11-09 17:35:09 -0500 |
commit | c311864310ae04fe6c6588911f62fa747984864a (patch) | |
tree | e7beed518dafece2b7c0b2afbf0eac39c0c281a7 | |
parent | 1001354ca34179f3db924eb66672442a173147dc (diff) |
ARM: DRA7: hwmod: Add data for DES IP
DRA7 SoC contains DES crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index 1ab7096af8e2..e89a7ecdc567 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c | |||
@@ -2541,6 +2541,34 @@ static struct omap_hwmod dra7xx_uart10_hwmod = { | |||
2541 | }, | 2541 | }, |
2542 | }; | 2542 | }; |
2543 | 2543 | ||
2544 | /* DES (the 'P' (public) device) */ | ||
2545 | static struct omap_hwmod_class_sysconfig dra7xx_des_sysc = { | ||
2546 | .rev_offs = 0x0030, | ||
2547 | .sysc_offs = 0x0034, | ||
2548 | .syss_offs = 0x0038, | ||
2549 | .sysc_flags = SYSS_HAS_RESET_STATUS, | ||
2550 | }; | ||
2551 | |||
2552 | static struct omap_hwmod_class dra7xx_des_hwmod_class = { | ||
2553 | .name = "des", | ||
2554 | .sysc = &dra7xx_des_sysc, | ||
2555 | }; | ||
2556 | |||
2557 | /* DES */ | ||
2558 | static struct omap_hwmod dra7xx_des_hwmod = { | ||
2559 | .name = "des", | ||
2560 | .class = &dra7xx_des_hwmod_class, | ||
2561 | .clkdm_name = "l4sec_clkdm", | ||
2562 | .main_clk = "l3_iclk_div", | ||
2563 | .prcm = { | ||
2564 | .omap4 = { | ||
2565 | .clkctrl_offs = DRA7XX_CM_L4SEC_DES3DES_CLKCTRL_OFFSET, | ||
2566 | .context_offs = DRA7XX_RM_L4SEC_DES3DES_CONTEXT_OFFSET, | ||
2567 | .modulemode = MODULEMODE_HWCTRL, | ||
2568 | }, | ||
2569 | }, | ||
2570 | }; | ||
2571 | |||
2544 | /* | 2572 | /* |
2545 | * 'usb_otg_ss' class | 2573 | * 'usb_otg_ss' class |
2546 | * | 2574 | * |
@@ -3642,6 +3670,14 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per2__uart7 = { | |||
3642 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 3670 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
3643 | }; | 3671 | }; |
3644 | 3672 | ||
3673 | /* l4_per1 -> des */ | ||
3674 | static struct omap_hwmod_ocp_if dra7xx_l4_per1__des = { | ||
3675 | .master = &dra7xx_l4_per1_hwmod, | ||
3676 | .slave = &dra7xx_des_hwmod, | ||
3677 | .clk = "l3_iclk_div", | ||
3678 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
3679 | }; | ||
3680 | |||
3645 | /* l4_per2 -> uart8 */ | 3681 | /* l4_per2 -> uart8 */ |
3646 | static struct omap_hwmod_ocp_if dra7xx_l4_per2__uart8 = { | 3682 | static struct omap_hwmod_ocp_if dra7xx_l4_per2__uart8 = { |
3647 | .master = &dra7xx_l4_per2_hwmod, | 3683 | .master = &dra7xx_l4_per2_hwmod, |
@@ -3875,6 +3911,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { | |||
3875 | &dra7xx_l4_per2__uart8, | 3911 | &dra7xx_l4_per2__uart8, |
3876 | &dra7xx_l4_per2__uart9, | 3912 | &dra7xx_l4_per2__uart9, |
3877 | &dra7xx_l4_wkup__uart10, | 3913 | &dra7xx_l4_wkup__uart10, |
3914 | &dra7xx_l4_per1__des, | ||
3878 | &dra7xx_l4_per3__usb_otg_ss1, | 3915 | &dra7xx_l4_per3__usb_otg_ss1, |
3879 | &dra7xx_l4_per3__usb_otg_ss2, | 3916 | &dra7xx_l4_per3__usb_otg_ss2, |
3880 | &dra7xx_l4_per3__usb_otg_ss3, | 3917 | &dra7xx_l4_per3__usb_otg_ss3, |