diff options
author | Frank Li <Frank.Li@freescale.com> | 2015-04-29 10:20:05 -0400 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2015-05-06 08:45:19 -0400 |
commit | c30024a6449070d6fde51a8bddf4c97f884db2cc (patch) | |
tree | 4632ac3a2d09acbe914b90e37ad56e43fa6e5ae5 | |
parent | abbc48e1c2a246d3d10393dec070e02ee150d0ae (diff) |
pinctrl: add imx7d support
Add i.MX7D pinctrl driver support
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r-- | drivers/pinctrl/freescale/Kconfig | 7 | ||||
-rw-r--r-- | drivers/pinctrl/freescale/Makefile | 1 | ||||
-rw-r--r-- | drivers/pinctrl/freescale/pinctrl-imx7d.c | 385 |
3 files changed, 393 insertions, 0 deletions
diff --git a/drivers/pinctrl/freescale/Kconfig b/drivers/pinctrl/freescale/Kconfig index 16aac38793fe..12ef544b4894 100644 --- a/drivers/pinctrl/freescale/Kconfig +++ b/drivers/pinctrl/freescale/Kconfig | |||
@@ -87,6 +87,13 @@ config PINCTRL_IMX6SX | |||
87 | help | 87 | help |
88 | Say Y here to enable the imx6sx pinctrl driver | 88 | Say Y here to enable the imx6sx pinctrl driver |
89 | 89 | ||
90 | config PINCTRL_IMX7D | ||
91 | bool "IMX7D pinctrl driver" | ||
92 | depends on SOC_IMX7D | ||
93 | select PINCTRL_IMX | ||
94 | help | ||
95 | Say Y here to enable the imx7d pinctrl driver | ||
96 | |||
90 | config PINCTRL_VF610 | 97 | config PINCTRL_VF610 |
91 | bool "Freescale Vybrid VF610 pinctrl driver" | 98 | bool "Freescale Vybrid VF610 pinctrl driver" |
92 | depends on SOC_VF610 | 99 | depends on SOC_VF610 |
diff --git a/drivers/pinctrl/freescale/Makefile b/drivers/pinctrl/freescale/Makefile index bba73c22f043..343cb436ab17 100644 --- a/drivers/pinctrl/freescale/Makefile +++ b/drivers/pinctrl/freescale/Makefile | |||
@@ -12,6 +12,7 @@ obj-$(CONFIG_PINCTRL_IMX6Q) += pinctrl-imx6q.o | |||
12 | obj-$(CONFIG_PINCTRL_IMX6Q) += pinctrl-imx6dl.o | 12 | obj-$(CONFIG_PINCTRL_IMX6Q) += pinctrl-imx6dl.o |
13 | obj-$(CONFIG_PINCTRL_IMX6SL) += pinctrl-imx6sl.o | 13 | obj-$(CONFIG_PINCTRL_IMX6SL) += pinctrl-imx6sl.o |
14 | obj-$(CONFIG_PINCTRL_IMX6SX) += pinctrl-imx6sx.o | 14 | obj-$(CONFIG_PINCTRL_IMX6SX) += pinctrl-imx6sx.o |
15 | obj-$(CONFIG_PINCTRL_IMX7D) += pinctrl-imx7d.o | ||
15 | obj-$(CONFIG_PINCTRL_VF610) += pinctrl-vf610.o | 16 | obj-$(CONFIG_PINCTRL_VF610) += pinctrl-vf610.o |
16 | obj-$(CONFIG_PINCTRL_MXS) += pinctrl-mxs.o | 17 | obj-$(CONFIG_PINCTRL_MXS) += pinctrl-mxs.o |
17 | obj-$(CONFIG_PINCTRL_IMX23) += pinctrl-imx23.o | 18 | obj-$(CONFIG_PINCTRL_IMX23) += pinctrl-imx23.o |
diff --git a/drivers/pinctrl/freescale/pinctrl-imx7d.c b/drivers/pinctrl/freescale/pinctrl-imx7d.c new file mode 100644 index 000000000000..d8ab17e4af3a --- /dev/null +++ b/drivers/pinctrl/freescale/pinctrl-imx7d.c | |||
@@ -0,0 +1,385 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2014-2015 Freescale Semiconductor, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #include <linux/err.h> | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/io.h> | ||
12 | #include <linux/module.h> | ||
13 | #include <linux/of.h> | ||
14 | #include <linux/of_device.h> | ||
15 | #include <linux/pinctrl/pinctrl.h> | ||
16 | |||
17 | #include "pinctrl-imx.h" | ||
18 | |||
19 | enum imx7d_pads { | ||
20 | MX7D_PAD_RESERVE0 = 0, | ||
21 | MX7D_PAD_RESERVE1 = 1, | ||
22 | MX7D_PAD_RESERVE2 = 2, | ||
23 | MX7D_PAD_RESERVE3 = 3, | ||
24 | MX7D_PAD_RESERVE4 = 4, | ||
25 | MX7D_PAD_GPIO1_IO08 = 5, | ||
26 | MX7D_PAD_GPIO1_IO09 = 6, | ||
27 | MX7D_PAD_GPIO1_IO10 = 7, | ||
28 | MX7D_PAD_GPIO1_IO11 = 8, | ||
29 | MX7D_PAD_GPIO1_IO12 = 9, | ||
30 | MX7D_PAD_GPIO1_IO13 = 10, | ||
31 | MX7D_PAD_GPIO1_IO14 = 11, | ||
32 | MX7D_PAD_GPIO1_IO15 = 12, | ||
33 | MX7D_PAD_EPDC_DATA00 = 13, | ||
34 | MX7D_PAD_EPDC_DATA01 = 14, | ||
35 | MX7D_PAD_EPDC_DATA02 = 15, | ||
36 | MX7D_PAD_EPDC_DATA03 = 16, | ||
37 | MX7D_PAD_EPDC_DATA04 = 17, | ||
38 | MX7D_PAD_EPDC_DATA05 = 18, | ||
39 | MX7D_PAD_EPDC_DATA06 = 19, | ||
40 | MX7D_PAD_EPDC_DATA07 = 20, | ||
41 | MX7D_PAD_EPDC_DATA08 = 21, | ||
42 | MX7D_PAD_EPDC_DATA09 = 22, | ||
43 | MX7D_PAD_EPDC_DATA10 = 23, | ||
44 | MX7D_PAD_EPDC_DATA11 = 24, | ||
45 | MX7D_PAD_EPDC_DATA12 = 25, | ||
46 | MX7D_PAD_EPDC_DATA13 = 26, | ||
47 | MX7D_PAD_EPDC_DATA14 = 27, | ||
48 | MX7D_PAD_EPDC_DATA15 = 28, | ||
49 | MX7D_PAD_EPDC_SDCLK = 29, | ||
50 | MX7D_PAD_EPDC_SDLE = 30, | ||
51 | MX7D_PAD_EPDC_SDOE = 31, | ||
52 | MX7D_PAD_EPDC_SDSHR = 32, | ||
53 | MX7D_PAD_EPDC_SDCE0 = 33, | ||
54 | MX7D_PAD_EPDC_SDCE1 = 34, | ||
55 | MX7D_PAD_EPDC_SDCE2 = 35, | ||
56 | MX7D_PAD_EPDC_SDCE3 = 36, | ||
57 | MX7D_PAD_EPDC_GDCLK = 37, | ||
58 | MX7D_PAD_EPDC_GDOE = 38, | ||
59 | MX7D_PAD_EPDC_GDRL = 39, | ||
60 | MX7D_PAD_EPDC_GDSP = 40, | ||
61 | MX7D_PAD_EPDC_BDR0 = 41, | ||
62 | MX7D_PAD_EPDC_BDR1 = 42, | ||
63 | MX7D_PAD_EPDC_PWR_COM = 43, | ||
64 | MX7D_PAD_EPDC_PWR_STAT = 44, | ||
65 | MX7D_PAD_LCD_CLK = 45, | ||
66 | MX7D_PAD_LCD_ENABLE = 46, | ||
67 | MX7D_PAD_LCD_HSYNC = 47, | ||
68 | MX7D_PAD_LCD_VSYNC = 48, | ||
69 | MX7D_PAD_LCD_RESET = 49, | ||
70 | MX7D_PAD_LCD_DATA00 = 50, | ||
71 | MX7D_PAD_LCD_DATA01 = 51, | ||
72 | MX7D_PAD_LCD_DATA02 = 52, | ||
73 | MX7D_PAD_LCD_DATA03 = 53, | ||
74 | MX7D_PAD_LCD_DATA04 = 54, | ||
75 | MX7D_PAD_LCD_DATA05 = 55, | ||
76 | MX7D_PAD_LCD_DATA06 = 56, | ||
77 | MX7D_PAD_LCD_DATA07 = 57, | ||
78 | MX7D_PAD_LCD_DATA08 = 58, | ||
79 | MX7D_PAD_LCD_DATA09 = 59, | ||
80 | MX7D_PAD_LCD_DATA10 = 60, | ||
81 | MX7D_PAD_LCD_DATA11 = 61, | ||
82 | MX7D_PAD_LCD_DATA12 = 62, | ||
83 | MX7D_PAD_LCD_DATA13 = 63, | ||
84 | MX7D_PAD_LCD_DATA14 = 64, | ||
85 | MX7D_PAD_LCD_DATA15 = 65, | ||
86 | MX7D_PAD_LCD_DATA16 = 66, | ||
87 | MX7D_PAD_LCD_DATA17 = 67, | ||
88 | MX7D_PAD_LCD_DATA18 = 68, | ||
89 | MX7D_PAD_LCD_DATA19 = 69, | ||
90 | MX7D_PAD_LCD_DATA20 = 70, | ||
91 | MX7D_PAD_LCD_DATA21 = 71, | ||
92 | MX7D_PAD_LCD_DATA22 = 72, | ||
93 | MX7D_PAD_LCD_DATA23 = 73, | ||
94 | MX7D_PAD_UART1_RX_DATA = 74, | ||
95 | MX7D_PAD_UART1_TX_DATA = 75, | ||
96 | MX7D_PAD_UART2_RX_DATA = 76, | ||
97 | MX7D_PAD_UART2_TX_DATA = 77, | ||
98 | MX7D_PAD_UART3_RX_DATA = 78, | ||
99 | MX7D_PAD_UART3_TX_DATA = 79, | ||
100 | MX7D_PAD_UART3_RTS_B = 80, | ||
101 | MX7D_PAD_UART3_CTS_B = 81, | ||
102 | MX7D_PAD_I2C1_SCL = 82, | ||
103 | MX7D_PAD_I2C1_SDA = 83, | ||
104 | MX7D_PAD_I2C2_SCL = 84, | ||
105 | MX7D_PAD_I2C2_SDA = 85, | ||
106 | MX7D_PAD_I2C3_SCL = 86, | ||
107 | MX7D_PAD_I2C3_SDA = 87, | ||
108 | MX7D_PAD_I2C4_SCL = 88, | ||
109 | MX7D_PAD_I2C4_SDA = 89, | ||
110 | MX7D_PAD_ECSPI1_SCLK = 90, | ||
111 | MX7D_PAD_ECSPI1_MOSI = 91, | ||
112 | MX7D_PAD_ECSPI1_MISO = 92, | ||
113 | MX7D_PAD_ECSPI1_SS0 = 93, | ||
114 | MX7D_PAD_ECSPI2_SCLK = 94, | ||
115 | MX7D_PAD_ECSPI2_MOSI = 95, | ||
116 | MX7D_PAD_ECSPI2_MISO = 96, | ||
117 | MX7D_PAD_ECSPI2_SS0 = 97, | ||
118 | MX7D_PAD_SD1_CD_B = 98, | ||
119 | MX7D_PAD_SD1_WP = 99, | ||
120 | MX7D_PAD_SD1_RESET_B = 100, | ||
121 | MX7D_PAD_SD1_CLK = 101, | ||
122 | MX7D_PAD_SD1_CMD = 102, | ||
123 | MX7D_PAD_SD1_DATA0 = 103, | ||
124 | MX7D_PAD_SD1_DATA1 = 104, | ||
125 | MX7D_PAD_SD1_DATA2 = 105, | ||
126 | MX7D_PAD_SD1_DATA3 = 106, | ||
127 | MX7D_PAD_SD2_CD_B = 107, | ||
128 | MX7D_PAD_SD2_WP = 108, | ||
129 | MX7D_PAD_SD2_RESET_B = 109, | ||
130 | MX7D_PAD_SD2_CLK = 110, | ||
131 | MX7D_PAD_SD2_CMD = 111, | ||
132 | MX7D_PAD_SD2_DATA0 = 112, | ||
133 | MX7D_PAD_SD2_DATA1 = 113, | ||
134 | MX7D_PAD_SD2_DATA2 = 114, | ||
135 | MX7D_PAD_SD2_DATA3 = 115, | ||
136 | MX7D_PAD_SD3_CLK = 116, | ||
137 | MX7D_PAD_SD3_CMD = 117, | ||
138 | MX7D_PAD_SD3_DATA0 = 118, | ||
139 | MX7D_PAD_SD3_DATA1 = 119, | ||
140 | MX7D_PAD_SD3_DATA2 = 120, | ||
141 | MX7D_PAD_SD3_DATA3 = 121, | ||
142 | MX7D_PAD_SD3_DATA4 = 122, | ||
143 | MX7D_PAD_SD3_DATA5 = 123, | ||
144 | MX7D_PAD_SD3_DATA6 = 124, | ||
145 | MX7D_PAD_SD3_DATA7 = 125, | ||
146 | MX7D_PAD_SD3_STROBE = 126, | ||
147 | MX7D_PAD_SD3_RESET_B = 127, | ||
148 | MX7D_PAD_SAI1_RX_DATA = 128, | ||
149 | MX7D_PAD_SAI1_TX_BCLK = 129, | ||
150 | MX7D_PAD_SAI1_TX_SYNC = 130, | ||
151 | MX7D_PAD_SAI1_TX_DATA = 131, | ||
152 | MX7D_PAD_SAI1_RX_SYNC = 132, | ||
153 | MX7D_PAD_SAI1_RX_BCLK = 133, | ||
154 | MX7D_PAD_SAI1_MCLK = 134, | ||
155 | MX7D_PAD_SAI2_TX_SYNC = 135, | ||
156 | MX7D_PAD_SAI2_TX_BCLK = 136, | ||
157 | MX7D_PAD_SAI2_RX_DATA = 137, | ||
158 | MX7D_PAD_SAI2_TX_DATA = 138, | ||
159 | MX7D_PAD_ENET1_RGMII_RD0 = 139, | ||
160 | MX7D_PAD_ENET1_RGMII_RD1 = 140, | ||
161 | MX7D_PAD_ENET1_RGMII_RD2 = 141, | ||
162 | MX7D_PAD_ENET1_RGMII_RD3 = 142, | ||
163 | MX7D_PAD_ENET1_RGMII_RX_CTL = 143, | ||
164 | MX7D_PAD_ENET1_RGMII_RXC = 144, | ||
165 | MX7D_PAD_ENET1_RGMII_TD0 = 145, | ||
166 | MX7D_PAD_ENET1_RGMII_TD1 = 146, | ||
167 | MX7D_PAD_ENET1_RGMII_TD2 = 147, | ||
168 | MX7D_PAD_ENET1_RGMII_TD3 = 148, | ||
169 | MX7D_PAD_ENET1_RGMII_TX_CTL = 149, | ||
170 | MX7D_PAD_ENET1_RGMII_TXC = 150, | ||
171 | MX7D_PAD_ENET1_TX_CLK = 151, | ||
172 | MX7D_PAD_ENET1_RX_CLK = 152, | ||
173 | MX7D_PAD_ENET1_CRS = 153, | ||
174 | MX7D_PAD_ENET1_COL = 154, | ||
175 | }; | ||
176 | |||
177 | /* Pad names for the pinmux subsystem */ | ||
178 | static const struct pinctrl_pin_desc imx7d_pinctrl_pads[] = { | ||
179 | IMX_PINCTRL_PIN(MX7D_PAD_RESERVE0), | ||
180 | IMX_PINCTRL_PIN(MX7D_PAD_RESERVE1), | ||
181 | IMX_PINCTRL_PIN(MX7D_PAD_RESERVE2), | ||
182 | IMX_PINCTRL_PIN(MX7D_PAD_RESERVE3), | ||
183 | IMX_PINCTRL_PIN(MX7D_PAD_RESERVE4), | ||
184 | IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO08), | ||
185 | IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO09), | ||
186 | IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO10), | ||
187 | IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO11), | ||
188 | IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO12), | ||
189 | IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO13), | ||
190 | IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO14), | ||
191 | IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO15), | ||
192 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA00), | ||
193 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA01), | ||
194 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA02), | ||
195 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA03), | ||
196 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA04), | ||
197 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA05), | ||
198 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA06), | ||
199 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA07), | ||
200 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA08), | ||
201 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA09), | ||
202 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA10), | ||
203 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA11), | ||
204 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA12), | ||
205 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA13), | ||
206 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA14), | ||
207 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA15), | ||
208 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCLK), | ||
209 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDLE), | ||
210 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDOE), | ||
211 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDSHR), | ||
212 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE0), | ||
213 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE1), | ||
214 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE2), | ||
215 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE3), | ||
216 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDCLK), | ||
217 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDOE), | ||
218 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDRL), | ||
219 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDSP), | ||
220 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_BDR0), | ||
221 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_BDR1), | ||
222 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_PWR_COM), | ||
223 | IMX_PINCTRL_PIN(MX7D_PAD_EPDC_PWR_STAT), | ||
224 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_CLK), | ||
225 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_ENABLE), | ||
226 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_HSYNC), | ||
227 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_VSYNC), | ||
228 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_RESET), | ||
229 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA00), | ||
230 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA01), | ||
231 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA02), | ||
232 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA03), | ||
233 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA04), | ||
234 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA05), | ||
235 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA06), | ||
236 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA07), | ||
237 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA08), | ||
238 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA09), | ||
239 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA10), | ||
240 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA11), | ||
241 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA12), | ||
242 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA13), | ||
243 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA14), | ||
244 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA15), | ||
245 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA16), | ||
246 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA17), | ||
247 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA18), | ||
248 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA19), | ||
249 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA20), | ||
250 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA21), | ||
251 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA22), | ||
252 | IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA23), | ||
253 | IMX_PINCTRL_PIN(MX7D_PAD_UART1_RX_DATA), | ||
254 | IMX_PINCTRL_PIN(MX7D_PAD_UART1_TX_DATA), | ||
255 | IMX_PINCTRL_PIN(MX7D_PAD_UART2_RX_DATA), | ||
256 | IMX_PINCTRL_PIN(MX7D_PAD_UART2_TX_DATA), | ||
257 | IMX_PINCTRL_PIN(MX7D_PAD_UART3_RX_DATA), | ||
258 | IMX_PINCTRL_PIN(MX7D_PAD_UART3_TX_DATA), | ||
259 | IMX_PINCTRL_PIN(MX7D_PAD_UART3_RTS_B), | ||
260 | IMX_PINCTRL_PIN(MX7D_PAD_UART3_CTS_B), | ||
261 | IMX_PINCTRL_PIN(MX7D_PAD_I2C1_SCL), | ||
262 | IMX_PINCTRL_PIN(MX7D_PAD_I2C1_SDA), | ||
263 | IMX_PINCTRL_PIN(MX7D_PAD_I2C2_SCL), | ||
264 | IMX_PINCTRL_PIN(MX7D_PAD_I2C2_SDA), | ||
265 | IMX_PINCTRL_PIN(MX7D_PAD_I2C3_SCL), | ||
266 | IMX_PINCTRL_PIN(MX7D_PAD_I2C3_SDA), | ||
267 | IMX_PINCTRL_PIN(MX7D_PAD_I2C4_SCL), | ||
268 | IMX_PINCTRL_PIN(MX7D_PAD_I2C4_SDA), | ||
269 | IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_SCLK), | ||
270 | IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_MOSI), | ||
271 | IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_MISO), | ||
272 | IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_SS0), | ||
273 | IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_SCLK), | ||
274 | IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_MOSI), | ||
275 | IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_MISO), | ||
276 | IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_SS0), | ||
277 | IMX_PINCTRL_PIN(MX7D_PAD_SD1_CD_B), | ||
278 | IMX_PINCTRL_PIN(MX7D_PAD_SD1_WP), | ||
279 | IMX_PINCTRL_PIN(MX7D_PAD_SD1_RESET_B), | ||
280 | IMX_PINCTRL_PIN(MX7D_PAD_SD1_CLK), | ||
281 | IMX_PINCTRL_PIN(MX7D_PAD_SD1_CMD), | ||
282 | IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA0), | ||
283 | IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA1), | ||
284 | IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA2), | ||
285 | IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA3), | ||
286 | IMX_PINCTRL_PIN(MX7D_PAD_SD2_CD_B), | ||
287 | IMX_PINCTRL_PIN(MX7D_PAD_SD2_WP), | ||
288 | IMX_PINCTRL_PIN(MX7D_PAD_SD2_RESET_B), | ||
289 | IMX_PINCTRL_PIN(MX7D_PAD_SD2_CLK), | ||
290 | IMX_PINCTRL_PIN(MX7D_PAD_SD2_CMD), | ||
291 | IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA0), | ||
292 | IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA1), | ||
293 | IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA2), | ||
294 | IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA3), | ||
295 | IMX_PINCTRL_PIN(MX7D_PAD_SD3_CLK), | ||
296 | IMX_PINCTRL_PIN(MX7D_PAD_SD3_CMD), | ||
297 | IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA0), | ||
298 | IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA1), | ||
299 | IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA2), | ||
300 | IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA3), | ||
301 | IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA4), | ||
302 | IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA5), | ||
303 | IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA6), | ||
304 | IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA7), | ||
305 | IMX_PINCTRL_PIN(MX7D_PAD_SD3_STROBE), | ||
306 | IMX_PINCTRL_PIN(MX7D_PAD_SD3_RESET_B), | ||
307 | IMX_PINCTRL_PIN(MX7D_PAD_SAI1_RX_DATA), | ||
308 | IMX_PINCTRL_PIN(MX7D_PAD_SAI1_TX_BCLK), | ||
309 | IMX_PINCTRL_PIN(MX7D_PAD_SAI1_TX_SYNC), | ||
310 | IMX_PINCTRL_PIN(MX7D_PAD_SAI1_TX_DATA), | ||
311 | IMX_PINCTRL_PIN(MX7D_PAD_SAI1_RX_SYNC), | ||
312 | IMX_PINCTRL_PIN(MX7D_PAD_SAI1_RX_BCLK), | ||
313 | IMX_PINCTRL_PIN(MX7D_PAD_SAI1_MCLK), | ||
314 | IMX_PINCTRL_PIN(MX7D_PAD_SAI2_TX_SYNC), | ||
315 | IMX_PINCTRL_PIN(MX7D_PAD_SAI2_TX_BCLK), | ||
316 | IMX_PINCTRL_PIN(MX7D_PAD_SAI2_RX_DATA), | ||
317 | IMX_PINCTRL_PIN(MX7D_PAD_SAI2_TX_DATA), | ||
318 | IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD0), | ||
319 | IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD1), | ||
320 | IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD2), | ||
321 | IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD3), | ||
322 | IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RX_CTL), | ||
323 | IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RXC), | ||
324 | IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD0), | ||
325 | IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD1), | ||
326 | IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD2), | ||
327 | IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD3), | ||
328 | IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TX_CTL), | ||
329 | IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TXC), | ||
330 | IMX_PINCTRL_PIN(MX7D_PAD_ENET1_TX_CLK), | ||
331 | IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RX_CLK), | ||
332 | IMX_PINCTRL_PIN(MX7D_PAD_ENET1_CRS), | ||
333 | IMX_PINCTRL_PIN(MX7D_PAD_ENET1_COL), | ||
334 | }; | ||
335 | |||
336 | static struct imx_pinctrl_soc_info imx7d_pinctrl_info = { | ||
337 | .pins = imx7d_pinctrl_pads, | ||
338 | .npins = ARRAY_SIZE(imx7d_pinctrl_pads), | ||
339 | }; | ||
340 | |||
341 | static struct of_device_id imx7d_pinctrl_of_match[] = { | ||
342 | { .compatible = "fsl,imx7d-iomuxc", .data = &imx7d_pinctrl_info, }, | ||
343 | { /* sentinel */ } | ||
344 | }; | ||
345 | |||
346 | static int imx7d_pinctrl_probe(struct platform_device *pdev) | ||
347 | { | ||
348 | const struct of_device_id *match; | ||
349 | struct imx_pinctrl_soc_info *pinctrl_info; | ||
350 | |||
351 | match = of_match_device(imx7d_pinctrl_of_match, &pdev->dev); | ||
352 | |||
353 | if (!match) | ||
354 | return -ENODEV; | ||
355 | |||
356 | pinctrl_info = (struct imx_pinctrl_soc_info *) match->data; | ||
357 | |||
358 | return imx_pinctrl_probe(pdev, pinctrl_info); | ||
359 | } | ||
360 | |||
361 | static struct platform_driver imx7d_pinctrl_driver = { | ||
362 | .driver = { | ||
363 | .name = "imx7d-pinctrl", | ||
364 | .owner = THIS_MODULE, | ||
365 | .of_match_table = of_match_ptr(imx7d_pinctrl_of_match), | ||
366 | }, | ||
367 | .probe = imx7d_pinctrl_probe, | ||
368 | .remove = imx_pinctrl_remove, | ||
369 | }; | ||
370 | |||
371 | static int __init imx7d_pinctrl_init(void) | ||
372 | { | ||
373 | return platform_driver_register(&imx7d_pinctrl_driver); | ||
374 | } | ||
375 | arch_initcall(imx7d_pinctrl_init); | ||
376 | |||
377 | static void __exit imx7d_pinctrl_exit(void) | ||
378 | { | ||
379 | platform_driver_unregister(&imx7d_pinctrl_driver); | ||
380 | } | ||
381 | module_exit(imx7d_pinctrl_exit); | ||
382 | |||
383 | MODULE_AUTHOR("Anson Huang <Anson.Huang@freescale.com>"); | ||
384 | MODULE_DESCRIPTION("Freescale imx7d pinctrl driver"); | ||
385 | MODULE_LICENSE("GPL v2"); | ||