diff options
author | Magnus Damm <damm+renesas@opensource.se> | 2017-10-16 08:30:39 -0400 |
---|---|---|
committer | Alex Williamson <alex.williamson@redhat.com> | 2017-11-06 12:29:39 -0500 |
commit | c295f504fb5a38abbb4094e687ee333a75613a0c (patch) | |
tree | ada199e9793d0ec6fd8cca72d9ce4f2d9164b499 | |
parent | f5c858912acd2b17059ebe6f34abac183bdfbf80 (diff) |
iommu/ipmmu-vmsa: Allow two bit SL0
Introduce support for two bit SL0 bitfield in IMTTBCR
by using a separate feature flag.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
-rw-r--r-- | drivers/iommu/ipmmu-vmsa.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c index 49f2c697b108..65ad6910cb70 100644 --- a/drivers/iommu/ipmmu-vmsa.c +++ b/drivers/iommu/ipmmu-vmsa.c | |||
@@ -45,6 +45,7 @@ struct ipmmu_features { | |||
45 | bool has_cache_leaf_nodes; | 45 | bool has_cache_leaf_nodes; |
46 | unsigned int number_of_contexts; | 46 | unsigned int number_of_contexts; |
47 | bool setup_imbuscr; | 47 | bool setup_imbuscr; |
48 | bool twobit_imttbcr_sl0; | ||
48 | }; | 49 | }; |
49 | 50 | ||
50 | struct ipmmu_vmsa_device { | 51 | struct ipmmu_vmsa_device { |
@@ -144,6 +145,10 @@ static struct ipmmu_vmsa_device *to_ipmmu(struct device *dev) | |||
144 | #define IMTTBCR_TSZ0_MASK (7 << 0) | 145 | #define IMTTBCR_TSZ0_MASK (7 << 0) |
145 | #define IMTTBCR_TSZ0_SHIFT O | 146 | #define IMTTBCR_TSZ0_SHIFT O |
146 | 147 | ||
148 | #define IMTTBCR_SL0_TWOBIT_LVL_3 (0 << 6) | ||
149 | #define IMTTBCR_SL0_TWOBIT_LVL_2 (1 << 6) | ||
150 | #define IMTTBCR_SL0_TWOBIT_LVL_1 (2 << 6) | ||
151 | |||
147 | #define IMBUSCR 0x000c | 152 | #define IMBUSCR 0x000c |
148 | #define IMBUSCR_DVM (1 << 2) | 153 | #define IMBUSCR_DVM (1 << 2) |
149 | #define IMBUSCR_BUSSEL_SYS (0 << 0) | 154 | #define IMBUSCR_BUSSEL_SYS (0 << 0) |
@@ -396,6 +401,7 @@ static void ipmmu_domain_free_context(struct ipmmu_vmsa_device *mmu, | |||
396 | static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain) | 401 | static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain) |
397 | { | 402 | { |
398 | u64 ttbr; | 403 | u64 ttbr; |
404 | u32 tmp; | ||
399 | int ret; | 405 | int ret; |
400 | 406 | ||
401 | /* | 407 | /* |
@@ -449,9 +455,14 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain) | |||
449 | * We use long descriptors with inner-shareable WBWA tables and allocate | 455 | * We use long descriptors with inner-shareable WBWA tables and allocate |
450 | * the whole 32-bit VA space to TTBR0. | 456 | * the whole 32-bit VA space to TTBR0. |
451 | */ | 457 | */ |
458 | if (domain->mmu->features->twobit_imttbcr_sl0) | ||
459 | tmp = IMTTBCR_SL0_TWOBIT_LVL_1; | ||
460 | else | ||
461 | tmp = IMTTBCR_SL0_LVL_1; | ||
462 | |||
452 | ipmmu_ctx_write_root(domain, IMTTBCR, IMTTBCR_EAE | | 463 | ipmmu_ctx_write_root(domain, IMTTBCR, IMTTBCR_EAE | |
453 | IMTTBCR_SH0_INNER_SHAREABLE | IMTTBCR_ORGN0_WB_WA | | 464 | IMTTBCR_SH0_INNER_SHAREABLE | IMTTBCR_ORGN0_WB_WA | |
454 | IMTTBCR_IRGN0_WB_WA | IMTTBCR_SL0_LVL_1); | 465 | IMTTBCR_IRGN0_WB_WA | tmp); |
455 | 466 | ||
456 | /* MAIR0 */ | 467 | /* MAIR0 */ |
457 | ipmmu_ctx_write_root(domain, IMMAIR0, | 468 | ipmmu_ctx_write_root(domain, IMMAIR0, |
@@ -889,6 +900,7 @@ static const struct ipmmu_features ipmmu_features_default = { | |||
889 | .has_cache_leaf_nodes = false, | 900 | .has_cache_leaf_nodes = false, |
890 | .number_of_contexts = 1, /* software only tested with one context */ | 901 | .number_of_contexts = 1, /* software only tested with one context */ |
891 | .setup_imbuscr = true, | 902 | .setup_imbuscr = true, |
903 | .twobit_imttbcr_sl0 = false, | ||
892 | }; | 904 | }; |
893 | 905 | ||
894 | static const struct of_device_id ipmmu_of_ids[] = { | 906 | static const struct of_device_id ipmmu_of_ids[] = { |