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authorTomi Valkeinen <tomi.valkeinen@ti.com>2016-05-18 03:45:20 -0400
committerTomi Valkeinen <tomi.valkeinen@ti.com>2016-05-19 13:19:08 -0400
commitc17dc0e3a1e053936c1e08bcbfc771843beabff1 (patch)
tree23835409909fd18452e81ad3e299607085536354
parentcd0715ffba49794472a260eab4e792489d185b72 (diff)
drm/omap: move HDMI PLL calc function to pll.c
Move hdmi_pll_compute(), used to calculate the config for HDMI PLL, from hdmi_pll.c to pll.c, with the name of dss_pll_calc_b(), to make it available to non-HDMI users. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-rw-r--r--drivers/gpu/drm/omapdrm/dss/dss.h4
-rw-r--r--drivers/gpu/drm/omapdrm/dss/hdmi.h2
-rw-r--r--drivers/gpu/drm/omapdrm/dss/hdmi4.c3
-rw-r--r--drivers/gpu/drm/omapdrm/dss/hdmi5.c3
-rw-r--r--drivers/gpu/drm/omapdrm/dss/hdmi_pll.c60
-rw-r--r--drivers/gpu/drm/omapdrm/dss/pll.c59
6 files changed, 67 insertions, 64 deletions
diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h b/drivers/gpu/drm/omapdrm/dss/dss.h
index 6a4b718f234e..11d9805e3ac3 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.h
+++ b/drivers/gpu/drm/omapdrm/dss/dss.h
@@ -441,6 +441,10 @@ bool dss_pll_hsdiv_calc_a(const struct dss_pll *pll, unsigned long clkdco,
441bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin, 441bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin,
442 unsigned long pll_min, unsigned long pll_max, 442 unsigned long pll_min, unsigned long pll_max,
443 dss_pll_calc_func func, void *data); 443 dss_pll_calc_func func, void *data);
444
445bool dss_pll_calc_b(const struct dss_pll *pll, unsigned long clkin,
446 unsigned long target_tmds, struct dss_pll_clock_info *cinfo);
447
444int dss_pll_write_config_type_a(struct dss_pll *pll, 448int dss_pll_write_config_type_a(struct dss_pll *pll,
445 const struct dss_pll_clock_info *cinfo); 449 const struct dss_pll_clock_info *cinfo);
446int dss_pll_write_config_type_b(struct dss_pll *pll, 450int dss_pll_write_config_type_b(struct dss_pll *pll,
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi.h b/drivers/gpu/drm/omapdrm/dss/hdmi.h
index d8757abfa175..597ee204d699 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi.h
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi.h
@@ -307,8 +307,6 @@ phys_addr_t hdmi_wp_get_audio_dma_addr(struct hdmi_wp_data *wp);
307 307
308/* HDMI PLL funcs */ 308/* HDMI PLL funcs */
309void hdmi_pll_dump(struct hdmi_pll_data *pll, struct seq_file *s); 309void hdmi_pll_dump(struct hdmi_pll_data *pll, struct seq_file *s);
310void hdmi_pll_compute(struct hdmi_pll_data *pll,
311 unsigned long target_tmds, struct dss_pll_clock_info *pi);
312int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll, 310int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll,
313 struct hdmi_wp_data *wp); 311 struct hdmi_wp_data *wp);
314void hdmi_pll_uninit(struct hdmi_pll_data *hpll); 312void hdmi_pll_uninit(struct hdmi_pll_data *hpll);
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4.c b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
index f892ae157ff3..eaf2bd6ffe7d 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi4.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
@@ -186,7 +186,8 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
186 if (p->double_pixel) 186 if (p->double_pixel)
187 pc *= 2; 187 pc *= 2;
188 188
189 hdmi_pll_compute(&hdmi.pll, pc, &hdmi_cinfo); 189 dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin),
190 pc, &hdmi_cinfo);
190 191
191 r = dss_pll_enable(&hdmi.pll.pll); 192 r = dss_pll_enable(&hdmi.pll.pll);
192 if (r) { 193 if (r) {
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5.c b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
index a43f7b10e113..435061475c30 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
@@ -198,7 +198,8 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
198 if (p->double_pixel) 198 if (p->double_pixel)
199 pc *= 2; 199 pc *= 2;
200 200
201 hdmi_pll_compute(&hdmi.pll, pc, &hdmi_cinfo); 201 dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin),
202 pc, &hdmi_cinfo);
202 203
203 /* disable and clear irqs */ 204 /* disable and clear irqs */
204 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff); 205 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c b/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
index a9896e7454c5..ac866d23c2dc 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
@@ -39,66 +39,6 @@ void hdmi_pll_dump(struct hdmi_pll_data *pll, struct seq_file *s)
39 DUMPPLL(PLLCTRL_CFG4); 39 DUMPPLL(PLLCTRL_CFG4);
40} 40}
41 41
42void hdmi_pll_compute(struct hdmi_pll_data *pll,
43 unsigned long target_tmds, struct dss_pll_clock_info *pi)
44{
45 unsigned long fint, clkdco, clkout;
46 unsigned long target_bitclk, target_clkdco;
47 unsigned long min_dco;
48 unsigned n, m, mf, m2, sd;
49 unsigned long clkin;
50 const struct dss_pll_hw *hw = pll->pll.hw;
51
52 clkin = clk_get_rate(pll->pll.clkin);
53
54 DSSDBG("clkin %lu, target tmds %lu\n", clkin, target_tmds);
55
56 target_bitclk = target_tmds * 10;
57
58 /* Fint */
59 n = DIV_ROUND_UP(clkin, hw->fint_max);
60 fint = clkin / n;
61
62 /* adjust m2 so that the clkdco will be high enough */
63 min_dco = roundup(hw->clkdco_min, fint);
64 m2 = DIV_ROUND_UP(min_dco, target_bitclk);
65 if (m2 == 0)
66 m2 = 1;
67
68 target_clkdco = target_bitclk * m2;
69 m = target_clkdco / fint;
70
71 clkdco = fint * m;
72
73 /* adjust clkdco with fractional mf */
74 if (WARN_ON(target_clkdco - clkdco > fint))
75 mf = 0;
76 else
77 mf = (u32)div_u64(262144ull * (target_clkdco - clkdco), fint);
78
79 if (mf > 0)
80 clkdco += (u32)div_u64((u64)mf * fint, 262144);
81
82 clkout = clkdco / m2;
83
84 /* sigma-delta */
85 sd = DIV_ROUND_UP(fint * m, 250000000);
86
87 DSSDBG("N = %u, M = %u, M.f = %u, M2 = %u, SD = %u\n",
88 n, m, mf, m2, sd);
89 DSSDBG("Fint %lu, clkdco %lu, clkout %lu\n", fint, clkdco, clkout);
90
91 pi->n = n;
92 pi->m = m;
93 pi->mf = mf;
94 pi->mX[0] = m2;
95 pi->sd = sd;
96
97 pi->fint = fint;
98 pi->clkdco = clkdco;
99 pi->clkout[0] = clkout;
100}
101
102static int hdmi_pll_enable(struct dss_pll *dsspll) 42static int hdmi_pll_enable(struct dss_pll *dsspll)
103{ 43{
104 struct hdmi_pll_data *pll = container_of(dsspll, struct hdmi_pll_data, pll); 44 struct hdmi_pll_data *pll = container_of(dsspll, struct hdmi_pll_data, pll);
diff --git a/drivers/gpu/drm/omapdrm/dss/pll.c b/drivers/gpu/drm/omapdrm/dss/pll.c
index 0242917cb281..bdfc88a7caaf 100644
--- a/drivers/gpu/drm/omapdrm/dss/pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/pll.c
@@ -248,6 +248,65 @@ bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin,
248 return false; 248 return false;
249} 249}
250 250
251bool dss_pll_calc_b(const struct dss_pll *pll, unsigned long clkin,
252 unsigned long target_tmds, struct dss_pll_clock_info *cinfo)
253{
254 unsigned long fint, clkdco, clkout;
255 unsigned long target_bitclk, target_clkdco;
256 unsigned long min_dco;
257 unsigned n, m, mf, m2, sd;
258 const struct dss_pll_hw *hw = pll->hw;
259
260 DSSDBG("clkin %lu, target tmds %lu\n", clkin, target_tmds);
261
262 target_bitclk = target_tmds * 10;
263
264 /* Fint */
265 n = DIV_ROUND_UP(clkin, hw->fint_max);
266 fint = clkin / n;
267
268 /* adjust m2 so that the clkdco will be high enough */
269 min_dco = roundup(hw->clkdco_min, fint);
270 m2 = DIV_ROUND_UP(min_dco, target_bitclk);
271 if (m2 == 0)
272 m2 = 1;
273
274 target_clkdco = target_bitclk * m2;
275 m = target_clkdco / fint;
276
277 clkdco = fint * m;
278
279 /* adjust clkdco with fractional mf */
280 if (WARN_ON(target_clkdco - clkdco > fint))
281 mf = 0;
282 else
283 mf = (u32)div_u64(262144ull * (target_clkdco - clkdco), fint);
284
285 if (mf > 0)
286 clkdco += (u32)div_u64((u64)mf * fint, 262144);
287
288 clkout = clkdco / m2;
289
290 /* sigma-delta */
291 sd = DIV_ROUND_UP(fint * m, 250000000);
292
293 DSSDBG("N = %u, M = %u, M.f = %u, M2 = %u, SD = %u\n",
294 n, m, mf, m2, sd);
295 DSSDBG("Fint %lu, clkdco %lu, clkout %lu\n", fint, clkdco, clkout);
296
297 cinfo->n = n;
298 cinfo->m = m;
299 cinfo->mf = mf;
300 cinfo->mX[0] = m2;
301 cinfo->sd = sd;
302
303 cinfo->fint = fint;
304 cinfo->clkdco = clkdco;
305 cinfo->clkout[0] = clkout;
306
307 return true;
308}
309
251static int wait_for_bit_change(void __iomem *reg, int bitnum, int value) 310static int wait_for_bit_change(void __iomem *reg, int bitnum, int value)
252{ 311{
253 unsigned long timeout; 312 unsigned long timeout;