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authorAlex Deucher <alexander.deucher@amd.com>2013-06-07 10:04:54 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-06-14 17:05:57 -0400
commitc139b1ee4e36374af705660af6172d7477352792 (patch)
treedb7a1cd3446e15b33e6912423a2f346ca11d946d
parent089920f21db0108fb105ecfd81de4c92d88f06d0 (diff)
drm/radeon: fix UVD on big endian
This fixes the kernel side so that the ring should come up and ring and IB tests should work. The userspace UVD drivers will also need big endian fixes. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/radeon/r600.c13
-rw-r--r--drivers/gpu/drm/radeon/radeon_uvd.c34
2 files changed, 27 insertions, 20 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 0e5341695922..6948eb88c2b7 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2687,6 +2687,9 @@ void r600_uvd_rbc_stop(struct radeon_device *rdev)
2687int r600_uvd_init(struct radeon_device *rdev) 2687int r600_uvd_init(struct radeon_device *rdev)
2688{ 2688{
2689 int i, j, r; 2689 int i, j, r;
2690 /* disable byte swapping */
2691 u32 lmi_swap_cntl = 0;
2692 u32 mp_swap_cntl = 0;
2690 2693
2691 /* raise clocks while booting up the VCPU */ 2694 /* raise clocks while booting up the VCPU */
2692 radeon_set_uvd_clocks(rdev, 53300, 40000); 2695 radeon_set_uvd_clocks(rdev, 53300, 40000);
@@ -2711,9 +2714,13 @@ int r600_uvd_init(struct radeon_device *rdev)
2711 WREG32(UVD_LMI_CTRL, 0x40 | (1 << 8) | (1 << 13) | 2714 WREG32(UVD_LMI_CTRL, 0x40 | (1 << 8) | (1 << 13) |
2712 (1 << 21) | (1 << 9) | (1 << 20)); 2715 (1 << 21) | (1 << 9) | (1 << 20));
2713 2716
2714 /* disable byte swapping */ 2717#ifdef __BIG_ENDIAN
2715 WREG32(UVD_LMI_SWAP_CNTL, 0); 2718 /* swap (8 in 32) RB and IB */
2716 WREG32(UVD_MP_SWAP_CNTL, 0); 2719 lmi_swap_cntl = 0xa;
2720 mp_swap_cntl = 0;
2721#endif
2722 WREG32(UVD_LMI_SWAP_CNTL, lmi_swap_cntl);
2723 WREG32(UVD_MP_SWAP_CNTL, mp_swap_cntl);
2717 2724
2718 WREG32(UVD_MPC_SET_MUXA0, 0x40c2040); 2725 WREG32(UVD_MPC_SET_MUXA0, 0x40c2040);
2719 WREG32(UVD_MPC_SET_MUXA1, 0x0); 2726 WREG32(UVD_MPC_SET_MUXA1, 0x0);
diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c
index 9f55adefa8e0..cad735dd02c6 100644
--- a/drivers/gpu/drm/radeon/radeon_uvd.c
+++ b/drivers/gpu/drm/radeon/radeon_uvd.c
@@ -627,19 +627,19 @@ int radeon_uvd_get_create_msg(struct radeon_device *rdev, int ring,
627 } 627 }
628 628
629 /* stitch together an UVD create msg */ 629 /* stitch together an UVD create msg */
630 msg[0] = 0x00000de4; 630 msg[0] = cpu_to_le32(0x00000de4);
631 msg[1] = 0x00000000; 631 msg[1] = cpu_to_le32(0x00000000);
632 msg[2] = handle; 632 msg[2] = cpu_to_le32(handle);
633 msg[3] = 0x00000000; 633 msg[3] = cpu_to_le32(0x00000000);
634 msg[4] = 0x00000000; 634 msg[4] = cpu_to_le32(0x00000000);
635 msg[5] = 0x00000000; 635 msg[5] = cpu_to_le32(0x00000000);
636 msg[6] = 0x00000000; 636 msg[6] = cpu_to_le32(0x00000000);
637 msg[7] = 0x00000780; 637 msg[7] = cpu_to_le32(0x00000780);
638 msg[8] = 0x00000440; 638 msg[8] = cpu_to_le32(0x00000440);
639 msg[9] = 0x00000000; 639 msg[9] = cpu_to_le32(0x00000000);
640 msg[10] = 0x01b37000; 640 msg[10] = cpu_to_le32(0x01b37000);
641 for (i = 11; i < 1024; ++i) 641 for (i = 11; i < 1024; ++i)
642 msg[i] = 0x0; 642 msg[i] = cpu_to_le32(0x0);
643 643
644 radeon_bo_kunmap(bo); 644 radeon_bo_kunmap(bo);
645 radeon_bo_unreserve(bo); 645 radeon_bo_unreserve(bo);
@@ -673,12 +673,12 @@ int radeon_uvd_get_destroy_msg(struct radeon_device *rdev, int ring,
673 } 673 }
674 674
675 /* stitch together an UVD destroy msg */ 675 /* stitch together an UVD destroy msg */
676 msg[0] = 0x00000de4; 676 msg[0] = cpu_to_le32(0x00000de4);
677 msg[1] = 0x00000002; 677 msg[1] = cpu_to_le32(0x00000002);
678 msg[2] = handle; 678 msg[2] = cpu_to_le32(handle);
679 msg[3] = 0x00000000; 679 msg[3] = cpu_to_le32(0x00000000);
680 for (i = 4; i < 1024; ++i) 680 for (i = 4; i < 1024; ++i)
681 msg[i] = 0x0; 681 msg[i] = cpu_to_le32(0x0);
682 682
683 radeon_bo_kunmap(bo); 683 radeon_bo_kunmap(bo);
684 radeon_bo_unreserve(bo); 684 radeon_bo_unreserve(bo);