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authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2019-04-24 08:02:21 -0400
committerManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2019-04-29 01:17:36 -0400
commitc1294fb5cb7804fb5c469c7b528a7d0fff2027c2 (patch)
tree391d8b1847d184a0598c99813be4202e4f2a8653
parent9fe408413f501b3262e591f521bf7aff767f6eba (diff)
arm64: dts: bitmain: Add pinctrl support for BM1880 SoC
Add pinctrl support for Bitmain BM1880 SoC. This SoC only supports pinmuxing and the pinctrl registers are part of the sctrl block. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--arch/arm64/boot/dts/bitmain/bm1880.dtsi14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/bitmain/bm1880.dtsi b/arch/arm64/boot/dts/bitmain/bm1880.dtsi
index e4da4ec6a5ee..7726fd4c6be6 100644
--- a/arch/arm64/boot/dts/bitmain/bm1880.dtsi
+++ b/arch/arm64/boot/dts/bitmain/bm1880.dtsi
@@ -80,6 +80,20 @@
80 #interrupt-cells = <3>; 80 #interrupt-cells = <3>;
81 }; 81 };
82 82
83 sctrl: system-controller@50010000 {
84 compatible = "bitmain,bm1880-sctrl", "syscon",
85 "simple-mfd";
86 reg = <0x0 0x50010000 0x0 0x1000>;
87 #address-cells = <1>;
88 #size-cells = <1>;
89 ranges = <0x0 0x0 0x50010000 0x1000>;
90
91 pinctrl: pinctrl@50 {
92 compatible = "bitmain,bm1880-pinctrl";
93 reg = <0x50 0x4B0>;
94 };
95 };
96
83 gpio0: gpio@50027000 { 97 gpio0: gpio@50027000 {
84 #address-cells = <1>; 98 #address-cells = <1>;
85 #size-cells = <0>; 99 #size-cells = <0>;