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authorJagan Teki <jagannadh.teki@gmail.com>2017-10-16 13:13:07 -0400
committerHeiko Stuebner <heiko@sntech.de>2017-10-17 15:13:16 -0400
commitc09cd2537097985e9030a25dfe52d98f2fb9a1ad (patch)
tree216d9e1b8e09bb4fc7a81691076c7b91f86d3565
parent8f6fc8245cfcd2b71567c564f87a7b0e5144736b (diff)
ARM: dts: rockchip: Add gmac support for rk3288-vyasa board
Add the external clock-reference, enable the gmac node and define the phy-related pin settings. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--arch/arm/boot/dts/rk3288-vyasa.dts41
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3288-vyasa.dts b/arch/arm/boot/dts/rk3288-vyasa.dts
index 738796add05e..3672a0dcb802 100644
--- a/arch/arm/boot/dts/rk3288-vyasa.dts
+++ b/arch/arm/boot/dts/rk3288-vyasa.dts
@@ -104,12 +104,35 @@
104 regulator-boot-on; 104 regulator-boot-on;
105 vin-supply = <&dc12_vbat>; 105 vin-supply = <&dc12_vbat>;
106 }; 106 };
107
108 ext_gmac: external-gmac-clock {
109 compatible = "fixed-clock";
110 #clock-cells = <0>;
111 clock-frequency = <125000000>;
112 clock-output-names = "ext_gmac";
113 };
107}; 114};
108 115
109&cpu0 { 116&cpu0 {
110 cpu0-supply = <&vdd_cpu>; 117 cpu0-supply = <&vdd_cpu>;
111}; 118};
112 119
120&gmac {
121 assigned-clocks = <&cru SCLK_MAC>;
122 assigned-clock-parents = <&ext_gmac>;
123 clock_in_out = "input";
124 pinctrl-names = "default";
125 pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
126 phy-supply = <&vcc_lan>;
127 phy-mode = "rgmii";
128 snps,reset-active-low;
129 snps,reset-delays-us = <0 10000 1000000>;
130 snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
131 tx_delay = <0x30>;
132 rx_delay = <0x10>;
133 status = "okay";
134};
135
113&gpu { 136&gpu {
114 mali-supply = <&vdd_gpu>; 137 mali-supply = <&vdd_gpu>;
115 status = "okay"; 138 status = "okay";
@@ -361,6 +384,24 @@
361}; 384};
362 385
363&pinctrl { 386&pinctrl {
387 pcfg_output_high: pcfg-output-high {
388 output-high;
389 };
390
391 gmac {
392 phy_int: phy-int {
393 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
394 };
395
396 phy_pmeb: phy-pmeb {
397 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
398 };
399
400 phy_rst: phy-rst {
401 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
402 };
403 };
404
364 pmic { 405 pmic {
365 pmic_int: pmic-int { 406 pmic_int: pmic-int {
366 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>; 407 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;