aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorRobert Jarzmik <robert.jarzmik@free.fr>2015-05-25 17:29:21 -0400
committerVinod Koul <vinod.koul@intel.com>2015-05-25 23:48:29 -0400
commitc01d1b5159425dce61f5835122c3e2950dba1bd1 (patch)
tree51f34a3f06c33212c36a85d13036b709fed53391
parenta57e16cf03339c20b09642f46f60190069ff70c7 (diff)
dmaengine: pxa_dma: add debug information
Reuse the debugging features which were available in pxa architecture. This is a copy of the code from arch/arm/plat-pxa/dma, which is doomed to disappear once the conversion is completed towards dmaengine. This is a transfer of the commit "[ARM] pxa/dma: add debugfs entries" (d294948c2ce4e1c85f452154469752cc9b8e876d). Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-rw-r--r--drivers/dma/pxa_dma.c244
1 files changed, 244 insertions, 0 deletions
diff --git a/drivers/dma/pxa_dma.c b/drivers/dma/pxa_dma.c
index 80b68b4326fa..7da79d030f8e 100644
--- a/drivers/dma/pxa_dma.c
+++ b/drivers/dma/pxa_dma.c
@@ -125,6 +125,11 @@ struct pxad_device {
125 void __iomem *base; 125 void __iomem *base;
126 struct pxad_phy *phys; 126 struct pxad_phy *phys;
127 spinlock_t phy_lock; /* Phy association */ 127 spinlock_t phy_lock; /* Phy association */
128#ifdef CONFIG_DEBUG_FS
129 struct dentry *dbgfs_root;
130 struct dentry *dbgfs_state;
131 struct dentry **dbgfs_chan;
132#endif
128}; 133};
129 134
130#define tx_to_pxad_desc(tx) \ 135#define tx_to_pxad_desc(tx) \
@@ -168,6 +173,243 @@ static unsigned int pxad_drcmr(unsigned int line)
168 return 0x100 + line * 4; 173 return 0x100 + line * 4;
169 return 0x1000 + line * 4; 174 return 0x1000 + line * 4;
170} 175}
176
177/*
178 * Debug fs
179 */
180#ifdef CONFIG_DEBUG_FS
181#include <linux/debugfs.h>
182#include <linux/uaccess.h>
183#include <linux/seq_file.h>
184
185static int dbg_show_requester_chan(struct seq_file *s, void *p)
186{
187 int pos = 0;
188 struct pxad_phy *phy = s->private;
189 int i;
190 u32 drcmr;
191
192 pos += seq_printf(s, "DMA channel %d requester :\n", phy->idx);
193 for (i = 0; i < 70; i++) {
194 drcmr = readl_relaxed(phy->base + pxad_drcmr(i));
195 if ((drcmr & DRCMR_CHLNUM) == phy->idx)
196 pos += seq_printf(s, "\tRequester %d (MAPVLD=%d)\n", i,
197 !!(drcmr & DRCMR_MAPVLD));
198 }
199 return pos;
200}
201
202static inline int dbg_burst_from_dcmd(u32 dcmd)
203{
204 int burst = (dcmd >> 16) & 0x3;
205
206 return burst ? 4 << burst : 0;
207}
208
209static int is_phys_valid(unsigned long addr)
210{
211 return pfn_valid(__phys_to_pfn(addr));
212}
213
214#define PXA_DCSR_STR(flag) (dcsr & PXA_DCSR_##flag ? #flag" " : "")
215#define PXA_DCMD_STR(flag) (dcmd & PXA_DCMD_##flag ? #flag" " : "")
216
217static int dbg_show_descriptors(struct seq_file *s, void *p)
218{
219 struct pxad_phy *phy = s->private;
220 int i, max_show = 20, burst, width;
221 u32 dcmd;
222 unsigned long phys_desc, ddadr;
223 struct pxad_desc_hw *desc;
224
225 phys_desc = ddadr = _phy_readl_relaxed(phy, DDADR);
226
227 seq_printf(s, "DMA channel %d descriptors :\n", phy->idx);
228 seq_printf(s, "[%03d] First descriptor unknown\n", 0);
229 for (i = 1; i < max_show && is_phys_valid(phys_desc); i++) {
230 desc = phys_to_virt(phys_desc);
231 dcmd = desc->dcmd;
232 burst = dbg_burst_from_dcmd(dcmd);
233 width = (1 << ((dcmd >> 14) & 0x3)) >> 1;
234
235 seq_printf(s, "[%03d] Desc at %08lx(virt %p)\n",
236 i, phys_desc, desc);
237 seq_printf(s, "\tDDADR = %08x\n", desc->ddadr);
238 seq_printf(s, "\tDSADR = %08x\n", desc->dsadr);
239 seq_printf(s, "\tDTADR = %08x\n", desc->dtadr);
240 seq_printf(s, "\tDCMD = %08x (%s%s%s%s%s%s%sburst=%d width=%d len=%d)\n",
241 dcmd,
242 PXA_DCMD_STR(INCSRCADDR), PXA_DCMD_STR(INCTRGADDR),
243 PXA_DCMD_STR(FLOWSRC), PXA_DCMD_STR(FLOWTRG),
244 PXA_DCMD_STR(STARTIRQEN), PXA_DCMD_STR(ENDIRQEN),
245 PXA_DCMD_STR(ENDIAN), burst, width,
246 dcmd & PXA_DCMD_LENGTH);
247 phys_desc = desc->ddadr;
248 }
249 if (i == max_show)
250 seq_printf(s, "[%03d] Desc at %08lx ... max display reached\n",
251 i, phys_desc);
252 else
253 seq_printf(s, "[%03d] Desc at %08lx is %s\n",
254 i, phys_desc, phys_desc == DDADR_STOP ?
255 "DDADR_STOP" : "invalid");
256
257 return 0;
258}
259
260static int dbg_show_chan_state(struct seq_file *s, void *p)
261{
262 struct pxad_phy *phy = s->private;
263 u32 dcsr, dcmd;
264 int burst, width;
265 static const char * const str_prio[] = {
266 "high", "normal", "low", "invalid"
267 };
268
269 dcsr = _phy_readl_relaxed(phy, DCSR);
270 dcmd = _phy_readl_relaxed(phy, DCMD);
271 burst = dbg_burst_from_dcmd(dcmd);
272 width = (1 << ((dcmd >> 14) & 0x3)) >> 1;
273
274 seq_printf(s, "DMA channel %d\n", phy->idx);
275 seq_printf(s, "\tPriority : %s\n",
276 str_prio[(phy->idx & 0xf) / 4]);
277 seq_printf(s, "\tUnaligned transfer bit: %s\n",
278 _phy_readl_relaxed(phy, DALGN) & BIT(phy->idx) ?
279 "yes" : "no");
280 seq_printf(s, "\tDCSR = %08x (%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
281 dcsr, PXA_DCSR_STR(RUN), PXA_DCSR_STR(NODESC),
282 PXA_DCSR_STR(STOPIRQEN), PXA_DCSR_STR(EORIRQEN),
283 PXA_DCSR_STR(EORJMPEN), PXA_DCSR_STR(EORSTOPEN),
284 PXA_DCSR_STR(SETCMPST), PXA_DCSR_STR(CLRCMPST),
285 PXA_DCSR_STR(CMPST), PXA_DCSR_STR(EORINTR),
286 PXA_DCSR_STR(REQPEND), PXA_DCSR_STR(STOPSTATE),
287 PXA_DCSR_STR(ENDINTR), PXA_DCSR_STR(STARTINTR),
288 PXA_DCSR_STR(BUSERR));
289
290 seq_printf(s, "\tDCMD = %08x (%s%s%s%s%s%s%sburst=%d width=%d len=%d)\n",
291 dcmd,
292 PXA_DCMD_STR(INCSRCADDR), PXA_DCMD_STR(INCTRGADDR),
293 PXA_DCMD_STR(FLOWSRC), PXA_DCMD_STR(FLOWTRG),
294 PXA_DCMD_STR(STARTIRQEN), PXA_DCMD_STR(ENDIRQEN),
295 PXA_DCMD_STR(ENDIAN), burst, width, dcmd & PXA_DCMD_LENGTH);
296 seq_printf(s, "\tDSADR = %08x\n", _phy_readl_relaxed(phy, DSADR));
297 seq_printf(s, "\tDTADR = %08x\n", _phy_readl_relaxed(phy, DTADR));
298 seq_printf(s, "\tDDADR = %08x\n", _phy_readl_relaxed(phy, DDADR));
299
300 return 0;
301}
302
303static int dbg_show_state(struct seq_file *s, void *p)
304{
305 struct pxad_device *pdev = s->private;
306
307 /* basic device status */
308 seq_puts(s, "DMA engine status\n");
309 seq_printf(s, "\tChannel number: %d\n", pdev->nr_chans);
310
311 return 0;
312}
313
314#define DBGFS_FUNC_DECL(name) \
315static int dbg_open_##name(struct inode *inode, struct file *file) \
316{ \
317 return single_open(file, dbg_show_##name, inode->i_private); \
318} \
319static const struct file_operations dbg_fops_##name = { \
320 .owner = THIS_MODULE, \
321 .open = dbg_open_##name, \
322 .llseek = seq_lseek, \
323 .read = seq_read, \
324 .release = single_release, \
325}
326
327DBGFS_FUNC_DECL(state);
328DBGFS_FUNC_DECL(chan_state);
329DBGFS_FUNC_DECL(descriptors);
330DBGFS_FUNC_DECL(requester_chan);
331
332static struct dentry *pxad_dbg_alloc_chan(struct pxad_device *pdev,
333 int ch, struct dentry *chandir)
334{
335 char chan_name[11];
336 struct dentry *chan, *chan_state = NULL, *chan_descr = NULL;
337 struct dentry *chan_reqs = NULL;
338 void *dt;
339
340 scnprintf(chan_name, sizeof(chan_name), "%d", ch);
341 chan = debugfs_create_dir(chan_name, chandir);
342 dt = (void *)&pdev->phys[ch];
343
344 if (chan)
345 chan_state = debugfs_create_file("state", 0400, chan, dt,
346 &dbg_fops_chan_state);
347 if (chan_state)
348 chan_descr = debugfs_create_file("descriptors", 0400, chan, dt,
349 &dbg_fops_descriptors);
350 if (chan_descr)
351 chan_reqs = debugfs_create_file("requesters", 0400, chan, dt,
352 &dbg_fops_requester_chan);
353 if (!chan_reqs)
354 goto err_state;
355
356 return chan;
357
358err_state:
359 debugfs_remove_recursive(chan);
360 return NULL;
361}
362
363static void pxad_init_debugfs(struct pxad_device *pdev)
364{
365 int i;
366 struct dentry *chandir;
367
368 pdev->dbgfs_root = debugfs_create_dir(dev_name(pdev->slave.dev), NULL);
369 if (IS_ERR(pdev->dbgfs_root) || !pdev->dbgfs_root)
370 goto err_root;
371
372 pdev->dbgfs_state = debugfs_create_file("state", 0400, pdev->dbgfs_root,
373 pdev, &dbg_fops_state);
374 if (!pdev->dbgfs_state)
375 goto err_state;
376
377 pdev->dbgfs_chan =
378 kmalloc_array(pdev->nr_chans, sizeof(*pdev->dbgfs_state),
379 GFP_KERNEL);
380 if (!pdev->dbgfs_chan)
381 goto err_alloc;
382
383 chandir = debugfs_create_dir("channels", pdev->dbgfs_root);
384 if (!chandir)
385 goto err_chandir;
386
387 for (i = 0; i < pdev->nr_chans; i++) {
388 pdev->dbgfs_chan[i] = pxad_dbg_alloc_chan(pdev, i, chandir);
389 if (!pdev->dbgfs_chan[i])
390 goto err_chans;
391 }
392
393 return;
394err_chans:
395err_chandir:
396 kfree(pdev->dbgfs_chan);
397err_alloc:
398err_state:
399 debugfs_remove_recursive(pdev->dbgfs_root);
400err_root:
401 pr_err("pxad: debugfs is not available\n");
402}
403
404static void pxad_cleanup_debugfs(struct pxad_device *pdev)
405{
406 debugfs_remove_recursive(pdev->dbgfs_root);
407}
408#else
409static inline void pxad_init_debugfs(struct pxad_device *pdev) {}
410static inline void pxad_cleanup_debugfs(struct pxad_device *pdev) {}
411#endif
412
171static struct pxad_phy *lookup_phy(struct pxad_chan *pchan) 413static struct pxad_phy *lookup_phy(struct pxad_chan *pchan)
172{ 414{
173 int prio, i; 415 int prio, i;
@@ -982,6 +1224,7 @@ static int pxad_remove(struct platform_device *op)
982{ 1224{
983 struct pxad_device *pdev = platform_get_drvdata(op); 1225 struct pxad_device *pdev = platform_get_drvdata(op);
984 1226
1227 pxad_cleanup_debugfs(pdev);
985 pxad_free_channels(&pdev->slave); 1228 pxad_free_channels(&pdev->slave);
986 dma_async_device_unregister(&pdev->slave); 1229 dma_async_device_unregister(&pdev->slave);
987 return 0; 1230 return 0;
@@ -1154,6 +1397,7 @@ static int pxad_probe(struct platform_device *op)
1154 } 1397 }
1155 1398
1156 platform_set_drvdata(op, pdev); 1399 platform_set_drvdata(op, pdev);
1400 pxad_init_debugfs(pdev);
1157 dev_info(pdev->slave.dev, "initialized %d channels\n", dma_channels); 1401 dev_info(pdev->slave.dev, "initialized %d channels\n", dma_channels);
1158 return 0; 1402 return 0;
1159} 1403}