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authorDmitry Osipenko <digetx@gmail.com>2018-04-09 15:28:27 -0400
committerThierry Reding <treding@nvidia.com>2018-04-27 05:21:52 -0400
commitbf3fbdfbec947cdd04b2f2c4bce11534c8786eee (patch)
tree148f03b8cc51571af949a890ff912187955c2d35
parent5c8d08f3471265dfd2f6db6d381751848dbf7db3 (diff)
memory: tegra: Do not handle spurious interrupts
The ISR reads interrupts-enable mask, but doesn't utilize it. Apply the mask to the interrupt status and don't handle interrupts that MC driver haven't asked for. Kernel would disable spurious MC IRQ and report the error. This would happen only in a case of a very severe bug. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r--drivers/memory/tegra/mc.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
index a4803ac192bb..d2005b995821 100644
--- a/drivers/memory/tegra/mc.c
+++ b/drivers/memory/tegra/mc.c
@@ -252,8 +252,11 @@ static irqreturn_t tegra_mc_irq(int irq, void *data)
252 unsigned int bit; 252 unsigned int bit;
253 253
254 /* mask all interrupts to avoid flooding */ 254 /* mask all interrupts to avoid flooding */
255 status = mc_readl(mc, MC_INTSTATUS);
256 mask = mc_readl(mc, MC_INTMASK); 255 mask = mc_readl(mc, MC_INTMASK);
256 status = mc_readl(mc, MC_INTSTATUS) & mask;
257
258 if (!status)
259 return IRQ_NONE;
257 260
258 for_each_set_bit(bit, &status, 32) { 261 for_each_set_bit(bit, &status, 32) {
259 const char *error = status_names[bit] ?: "unknown"; 262 const char *error = status_names[bit] ?: "unknown";