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authorSimon Horman <horms+renesas@verge.net.au>2017-04-17 21:03:18 -0400
committerSimon Horman <horms+renesas@verge.net.au>2017-05-22 08:54:31 -0400
commitbdb3656e4c085de6f44b162554c2793492577834 (patch)
treefacacf25abce5c6b83694663cb58ba628ceaeeff
parentd2ae6fedc45a7fab6751987dfdc1b0faebe1ebb7 (diff)
arm64: dts: m3ulcb: Fix EthernetAVB PHY timing
Set PHY rxc-skew-ps to 1500 and all other values to their default values. This is intended to to address failures in the case of 1Gbps communication using the salvator-x board with the KSZ9031RNX phy. This has been reported to occur with both the r8a7795 (H3) and r8a7796 (M3-W) SoCs. Based in a similar patch for the r8a7796 salvator-x by Kazuya Mizuguchi. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts13
1 files changed, 1 insertions, 12 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
index c2a4549d3738..440d93e8388d 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
@@ -169,18 +169,7 @@
169 status = "okay"; 169 status = "okay";
170 170
171 phy0: ethernet-phy@0 { 171 phy0: ethernet-phy@0 {
172 rxc-skew-ps = <900>; 172 rxc-skew-ps = <1500>;
173 rxdv-skew-ps = <0>;
174 rxd0-skew-ps = <0>;
175 rxd1-skew-ps = <0>;
176 rxd2-skew-ps = <0>;
177 rxd3-skew-ps = <0>;
178 txc-skew-ps = <900>;
179 txen-skew-ps = <0>;
180 txd0-skew-ps = <0>;
181 txd1-skew-ps = <0>;
182 txd2-skew-ps = <0>;
183 txd3-skew-ps = <0>;
184 reg = <0>; 173 reg = <0>;
185 interrupt-parent = <&gpio2>; 174 interrupt-parent = <&gpio2>;
186 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 175 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;