aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorMarc Zyngier <marc.zyngier@arm.com>2017-10-27 10:28:52 -0400
committerChristoffer Dall <christoffer.dall@linaro.org>2017-11-10 03:44:36 -0500
commitbd94e7aea40387524b1d6c76b09785f5c3319116 (patch)
tree23339b6dab21ef65b4b2091d622305a88352c365
parent374be35e231e818ffbdb3f876e2775f22b727e80 (diff)
KVM: arm/arm64: GICv4: Prevent a VM using GICv4 from being saved
The GICv4 architecture doesn't make it easy for save/restore to work, as it doesn't give any guarantee that the pending state is written into the pending table. So let's not take any chance, and let's return an error if we encounter any LPI that has the HW bit set. In order for userspace to distinguish this error from other failure modes, use -EACCES as an error code. Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
-rw-r--r--Documentation/virtual/kvm/devices/arm-vgic-its.txt2
-rw-r--r--virt/kvm/arm/vgic/vgic-its.c9
2 files changed, 11 insertions, 0 deletions
diff --git a/Documentation/virtual/kvm/devices/arm-vgic-its.txt b/Documentation/virtual/kvm/devices/arm-vgic-its.txt
index 8d5830eab26a..4f0c9fc40365 100644
--- a/Documentation/virtual/kvm/devices/arm-vgic-its.txt
+++ b/Documentation/virtual/kvm/devices/arm-vgic-its.txt
@@ -64,6 +64,8 @@ Groups:
64 -EINVAL: Inconsistent restored data 64 -EINVAL: Inconsistent restored data
65 -EFAULT: Invalid guest ram access 65 -EFAULT: Invalid guest ram access
66 -EBUSY: One or more VCPUS are running 66 -EBUSY: One or more VCPUS are running
67 -EACCES: The virtual ITS is backed by a physical GICv4 ITS, and the
68 state is not available
67 69
68 KVM_DEV_ARM_VGIC_GRP_ITS_REGS 70 KVM_DEV_ARM_VGIC_GRP_ITS_REGS
69 Attributes: 71 Attributes:
diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c
index bf571f6d2b32..b8c1b724ba3e 100644
--- a/virt/kvm/arm/vgic/vgic-its.c
+++ b/virt/kvm/arm/vgic/vgic-its.c
@@ -1995,6 +1995,15 @@ static int vgic_its_save_itt(struct vgic_its *its, struct its_device *device)
1995 list_for_each_entry(ite, &device->itt_head, ite_list) { 1995 list_for_each_entry(ite, &device->itt_head, ite_list) {
1996 gpa_t gpa = base + ite->event_id * ite_esz; 1996 gpa_t gpa = base + ite->event_id * ite_esz;
1997 1997
1998 /*
1999 * If an LPI carries the HW bit, this means that this
2000 * interrupt is controlled by GICv4, and we do not
2001 * have direct access to that state. Let's simply fail
2002 * the save operation...
2003 */
2004 if (ite->irq->hw)
2005 return -EACCES;
2006
1998 ret = vgic_its_save_ite(its, device, ite, gpa, ite_esz); 2007 ret = vgic_its_save_ite(its, device, ite, gpa, ite_esz);
1999 if (ret) 2008 if (ret)
2000 return ret; 2009 return ret;