aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorRafael J. Wysocki <rafael.j.wysocki@intel.com>2017-09-03 18:05:13 -0400
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2017-09-03 18:05:13 -0400
commitbd87c8fb9d2e420e5ddffad0cd1abcadfca75dbd (patch)
treef45108c87680dad2396080cae8c24b5d7bde4bd6
parent45a7953c831c5885a4c6eddeeda4fe7628b3a96d (diff)
parentfded5fc8412a0bfadd2b130433109a5be7ffdf82 (diff)
Merge branch 'pm-cpufreq'
* pm-cpufreq: (33 commits) cpufreq: imx6q: Fix imx6sx low frequency support cpufreq: speedstep-lib: make several arrays static, makes code smaller cpufreq: ti: Fix 'of_node_put' being called twice in error handling path cpufreq: dt-platdev: Drop few entries from whitelist cpufreq: dt-platdev: Automatically create cpufreq device with OPP v2 ARM: ux500: don't select CPUFREQ_DT cpufreq: Convert to using %pOF instead of full_name cpufreq: Cap the default transition delay value to 10 ms cpufreq: dbx500: Delete obsolete driver mfd: db8500-prcmu: Get rid of cpufreq dependency cpufreq: enable the DT cpufreq driver on the Ux500 cpufreq: Loongson2: constify platform_device_id cpufreq: dt: Add r8a7796 support to to use generic cpufreq driver cpufreq: remove setting of policy->cpu in policy->cpus during init cpufreq: mediatek: add support of cpufreq to MT7622 SoC cpufreq: mediatek: add cleanups with the more generic naming cpufreq: rcar: Add support for R8A7795 SoC cpufreq: dt: Add rk3328 compatible to use generic cpufreq driver cpufreq: s5pv210: add missing of_node_put() cpufreq: Allow dynamic switching with CPUFREQ_ETERNAL latency ...
Diffstat
-rw-r--r--Documentation/admin-guide/pm/cpufreq.rst8
-rw-r--r--Documentation/devicetree/bindings/clock/mt8173-cpu-dvfs.txt83
-rw-r--r--Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt247
-rw-r--r--arch/arm/boot/dts/tango4-smp8758.dtsi1
-rw-r--r--drivers/cpufreq/Kconfig.arm21
-rw-r--r--drivers/cpufreq/Makefile4
-rw-r--r--drivers/cpufreq/arm_big_little.c10
-rw-r--r--drivers/cpufreq/cppc_cpufreq.c1
-rw-r--r--drivers/cpufreq/cpufreq-dt-platdev.c65
-rw-r--r--drivers/cpufreq/cpufreq-nforce2.c2
-rw-r--r--drivers/cpufreq/cpufreq.c34
-rw-r--r--drivers/cpufreq/cpufreq_conservative.c6
-rw-r--r--drivers/cpufreq/cpufreq_governor.c17
-rw-r--r--drivers/cpufreq/cpufreq_governor.h3
-rw-r--r--drivers/cpufreq/cpufreq_ondemand.c12
-rw-r--r--drivers/cpufreq/dbx500-cpufreq.c103
-rw-r--r--drivers/cpufreq/elanfreq.c4
-rw-r--r--drivers/cpufreq/gx-suspmod.c2
-rw-r--r--drivers/cpufreq/imx6q-cpufreq.c9
-rw-r--r--drivers/cpufreq/intel_pstate.c2
-rw-r--r--drivers/cpufreq/longrun.c1
-rw-r--r--drivers/cpufreq/loongson2_cpufreq.c2
-rw-r--r--drivers/cpufreq/mediatek-cpufreq.c (renamed from drivers/cpufreq/mt8173-cpufreq.c)29
-rw-r--r--drivers/cpufreq/pmac32-cpufreq.c7
-rw-r--r--drivers/cpufreq/pmac64-cpufreq.c2
-rw-r--r--drivers/cpufreq/s5pv210-cpufreq.c3
-rw-r--r--drivers/cpufreq/sa1100-cpufreq.c5
-rw-r--r--drivers/cpufreq/sa1110-cpufreq.c5
-rw-r--r--drivers/cpufreq/sh-cpufreq.c3
-rw-r--r--drivers/cpufreq/speedstep-ich.c2
-rw-r--r--drivers/cpufreq/speedstep-lib.c4
-rw-r--r--drivers/cpufreq/speedstep-smi.c2
-rw-r--r--drivers/cpufreq/sti-cpufreq.c8
-rw-r--r--drivers/cpufreq/tango-cpufreq.c38
-rw-r--r--drivers/cpufreq/ti-cpufreq.c4
-rw-r--r--drivers/cpufreq/unicore2-cpufreq.c3
-rw-r--r--drivers/mfd/db8500-prcmu.c62
-rw-r--r--include/linux/cpufreq.h18
-rw-r--r--kernel/sched/cpufreq_schedutil.c12
39 files changed, 468 insertions, 376 deletions
diff --git a/Documentation/admin-guide/pm/cpufreq.rst b/Documentation/admin-guide/pm/cpufreq.rst
index 7af83a92d2d6..47153e64dfb5 100644
--- a/Documentation/admin-guide/pm/cpufreq.rst
+++ b/Documentation/admin-guide/pm/cpufreq.rst
@@ -479,14 +479,6 @@ This governor exposes the following tunables:
479 479
480 # echo `$(($(cat cpuinfo_transition_latency) * 750 / 1000)) > ondemand/sampling_rate 480 # echo `$(($(cat cpuinfo_transition_latency) * 750 / 1000)) > ondemand/sampling_rate
481 481
482
483``min_sampling_rate``
484 The minimum value of ``sampling_rate``.
485
486 Equal to 10000 (10 ms) if :c:macro:`CONFIG_NO_HZ_COMMON` and
487 :c:data:`tick_nohz_active` are both set or to 20 times the value of
488 :c:data:`jiffies` in microseconds otherwise.
489
490``up_threshold`` 482``up_threshold``
491 If the estimated CPU load is above this value (in percent), the governor 483 If the estimated CPU load is above this value (in percent), the governor
492 will set the frequency to the maximum value allowed for the policy. 484 will set the frequency to the maximum value allowed for the policy.
diff --git a/Documentation/devicetree/bindings/clock/mt8173-cpu-dvfs.txt b/Documentation/devicetree/bindings/clock/mt8173-cpu-dvfs.txt
deleted file mode 100644
index 52b457c23eed..000000000000
--- a/Documentation/devicetree/bindings/clock/mt8173-cpu-dvfs.txt
+++ /dev/null
@@ -1,83 +0,0 @@
1Device Tree Clock bindins for CPU DVFS of Mediatek MT8173 SoC
2
3Required properties:
4- clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock names.
5- clock-names: Should contain the following:
6 "cpu" - The multiplexer for clock input of CPU cluster.
7 "intermediate" - A parent of "cpu" clock which is used as "intermediate" clock
8 source (usually MAINPLL) when the original CPU PLL is under
9 transition and not stable yet.
10 Please refer to Documentation/devicetree/bindings/clk/clock-bindings.txt for
11 generic clock consumer properties.
12- proc-supply: Regulator for Vproc of CPU cluster.
13
14Optional properties:
15- sram-supply: Regulator for Vsram of CPU cluster. When present, the cpufreq driver
16 needs to do "voltage tracking" to step by step scale up/down Vproc and
17 Vsram to fit SoC specific needs. When absent, the voltage scaling
18 flow is handled by hardware, hence no software "voltage tracking" is
19 needed.
20
21Example:
22--------
23 cpu0: cpu@0 {
24 device_type = "cpu";
25 compatible = "arm,cortex-a53";
26 reg = <0x000>;
27 enable-method = "psci";
28 cpu-idle-states = <&CPU_SLEEP_0>;
29 clocks = <&infracfg CLK_INFRA_CA53SEL>,
30 <&apmixedsys CLK_APMIXED_MAINPLL>;
31 clock-names = "cpu", "intermediate";
32 };
33
34 cpu1: cpu@1 {
35 device_type = "cpu";
36 compatible = "arm,cortex-a53";
37 reg = <0x001>;
38 enable-method = "psci";
39 cpu-idle-states = <&CPU_SLEEP_0>;
40 clocks = <&infracfg CLK_INFRA_CA53SEL>,
41 <&apmixedsys CLK_APMIXED_MAINPLL>;
42 clock-names = "cpu", "intermediate";
43 };
44
45 cpu2: cpu@100 {
46 device_type = "cpu";
47 compatible = "arm,cortex-a57";
48 reg = <0x100>;
49 enable-method = "psci";
50 cpu-idle-states = <&CPU_SLEEP_0>;
51 clocks = <&infracfg CLK_INFRA_CA57SEL>,
52 <&apmixedsys CLK_APMIXED_MAINPLL>;
53 clock-names = "cpu", "intermediate";
54 };
55
56 cpu3: cpu@101 {
57 device_type = "cpu";
58 compatible = "arm,cortex-a57";
59 reg = <0x101>;
60 enable-method = "psci";
61 cpu-idle-states = <&CPU_SLEEP_0>;
62 clocks = <&infracfg CLK_INFRA_CA57SEL>,
63 <&apmixedsys CLK_APMIXED_MAINPLL>;
64 clock-names = "cpu", "intermediate";
65 };
66
67 &cpu0 {
68 proc-supply = <&mt6397_vpca15_reg>;
69 };
70
71 &cpu1 {
72 proc-supply = <&mt6397_vpca15_reg>;
73 };
74
75 &cpu2 {
76 proc-supply = <&da9211_vcpu_reg>;
77 sram-supply = <&mt6397_vsramca7_reg>;
78 };
79
80 &cpu3 {
81 proc-supply = <&da9211_vcpu_reg>;
82 sram-supply = <&mt6397_vsramca7_reg>;
83 };
diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
new file mode 100644
index 000000000000..f6403089edcf
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
@@ -0,0 +1,247 @@
1Binding for MediaTek's CPUFreq driver
2=====================================
3
4Required properties:
5- clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock names.
6- clock-names: Should contain the following:
7 "cpu" - The multiplexer for clock input of CPU cluster.
8 "intermediate" - A parent of "cpu" clock which is used as "intermediate" clock
9 source (usually MAINPLL) when the original CPU PLL is under
10 transition and not stable yet.
11 Please refer to Documentation/devicetree/bindings/clk/clock-bindings.txt for
12 generic clock consumer properties.
13- operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp.txt
14 for detail.
15- proc-supply: Regulator for Vproc of CPU cluster.
16
17Optional properties:
18- sram-supply: Regulator for Vsram of CPU cluster. When present, the cpufreq driver
19 needs to do "voltage tracking" to step by step scale up/down Vproc and
20 Vsram to fit SoC specific needs. When absent, the voltage scaling
21 flow is handled by hardware, hence no software "voltage tracking" is
22 needed.
23- #cooling-cells:
24- cooling-min-level:
25- cooling-max-level:
26 Please refer to Documentation/devicetree/bindings/thermal/thermal.txt
27 for detail.
28
29Example 1 (MT7623 SoC):
30
31 cpu_opp_table: opp_table {
32 compatible = "operating-points-v2";
33 opp-shared;
34
35 opp-598000000 {
36 opp-hz = /bits/ 64 <598000000>;
37 opp-microvolt = <1050000>;
38 };
39
40 opp-747500000 {
41 opp-hz = /bits/ 64 <747500000>;
42 opp-microvolt = <1050000>;
43 };
44
45 opp-1040000000 {
46 opp-hz = /bits/ 64 <1040000000>;
47 opp-microvolt = <1150000>;
48 };
49
50 opp-1196000000 {
51 opp-hz = /bits/ 64 <1196000000>;
52 opp-microvolt = <1200000>;
53 };
54
55 opp-1300000000 {
56 opp-hz = /bits/ 64 <1300000000>;
57 opp-microvolt = <1300000>;
58 };
59 };
60
61 cpu0: cpu@0 {
62 device_type = "cpu";
63 compatible = "arm,cortex-a7";
64 reg = <0x0>;
65 clocks = <&infracfg CLK_INFRA_CPUSEL>,
66 <&apmixedsys CLK_APMIXED_MAINPLL>;
67 clock-names = "cpu", "intermediate";
68 operating-points-v2 = <&cpu_opp_table>;
69 #cooling-cells = <2>;
70 cooling-min-level = <0>;
71 cooling-max-level = <7>;
72 };
73 cpu@1 {
74 device_type = "cpu";
75 compatible = "arm,cortex-a7";
76 reg = <0x1>;
77 operating-points-v2 = <&cpu_opp_table>;
78 };
79 cpu@2 {
80 device_type = "cpu";
81 compatible = "arm,cortex-a7";
82 reg = <0x2>;
83 operating-points-v2 = <&cpu_opp_table>;
84 };
85 cpu@3 {
86 device_type = "cpu";
87 compatible = "arm,cortex-a7";
88 reg = <0x3>;
89 operating-points-v2 = <&cpu_opp_table>;
90 };
91
92Example 2 (MT8173 SoC):
93 cpu_opp_table_a: opp_table_a {
94 compatible = "operating-points-v2";
95 opp-shared;
96
97 opp-507000000 {
98 opp-hz = /bits/ 64 <507000000>;
99 opp-microvolt = <859000>;
100 };
101
102 opp-702000000 {
103 opp-hz = /bits/ 64 <702000000>;
104 opp-microvolt = <908000>;
105 };
106
107 opp-1001000000 {
108 opp-hz = /bits/ 64 <1001000000>;
109 opp-microvolt = <983000>;
110 };
111
112 opp-1105000000 {
113 opp-hz = /bits/ 64 <1105000000>;
114 opp-microvolt = <1009000>;
115 };
116
117 opp-1183000000 {
118 opp-hz = /bits/ 64 <1183000000>;
119 opp-microvolt = <1028000>;
120 };
121
122 opp-1404000000 {
123 opp-hz = /bits/ 64 <1404000000>;
124 opp-microvolt = <1083000>;
125 };
126
127 opp-1508000000 {
128 opp-hz = /bits/ 64 <1508000000>;
129 opp-microvolt = <1109000>;
130 };
131
132 opp-1573000000 {
133 opp-hz = /bits/ 64 <1573000000>;
134 opp-microvolt = <1125000>;
135 };
136 };
137
138 cpu_opp_table_b: opp_table_b {
139 compatible = "operating-points-v2";
140 opp-shared;
141
142 opp-507000000 {
143 opp-hz = /bits/ 64 <507000000>;
144 opp-microvolt = <828000>;
145 };
146
147 opp-702000000 {
148 opp-hz = /bits/ 64 <702000000>;
149 opp-microvolt = <867000>;
150 };
151
152 opp-1001000000 {
153 opp-hz = /bits/ 64 <1001000000>;
154 opp-microvolt = <927000>;
155 };
156
157 opp-1209000000 {
158 opp-hz = /bits/ 64 <1209000000>;
159 opp-microvolt = <968000>;
160 };
161
162 opp-1404000000 {
163 opp-hz = /bits/ 64 <1007000000>;
164 opp-microvolt = <1028000>;
165 };
166
167 opp-1612000000 {
168 opp-hz = /bits/ 64 <1612000000>;
169 opp-microvolt = <1049000>;
170 };
171
172 opp-1807000000 {
173 opp-hz = /bits/ 64 <1807000000>;
174 opp-microvolt = <1089000>;
175 };
176
177 opp-1989000000 {
178 opp-hz = /bits/ 64 <1989000000>;
179 opp-microvolt = <1125000>;
180 };
181 };
182
183 cpu0: cpu@0 {
184 device_type = "cpu";
185 compatible = "arm,cortex-a53";
186 reg = <0x000>;
187 enable-method = "psci";
188 cpu-idle-states = <&CPU_SLEEP_0>;
189 clocks = <&infracfg CLK_INFRA_CA53SEL>,
190 <&apmixedsys CLK_APMIXED_MAINPLL>;
191 clock-names = "cpu", "intermediate";
192 operating-points-v2 = <&cpu_opp_table_a>;
193 };
194
195 cpu1: cpu@1 {
196 device_type = "cpu";
197 compatible = "arm,cortex-a53";
198 reg = <0x001>;
199 enable-method = "psci";
200 cpu-idle-states = <&CPU_SLEEP_0>;
201 clocks = <&infracfg CLK_INFRA_CA53SEL>,
202 <&apmixedsys CLK_APMIXED_MAINPLL>;
203 clock-names = "cpu", "intermediate";
204 operating-points-v2 = <&cpu_opp_table_a>;
205 };
206
207 cpu2: cpu@100 {
208 device_type = "cpu";
209 compatible = "arm,cortex-a57";
210 reg = <0x100>;
211 enable-method = "psci";
212 cpu-idle-states = <&CPU_SLEEP_0>;
213 clocks = <&infracfg CLK_INFRA_CA57SEL>,
214 <&apmixedsys CLK_APMIXED_MAINPLL>;
215 clock-names = "cpu", "intermediate";
216 operating-points-v2 = <&cpu_opp_table_b>;
217 };
218
219 cpu3: cpu@101 {
220 device_type = "cpu";
221 compatible = "arm,cortex-a57";
222 reg = <0x101>;
223 enable-method = "psci";
224 cpu-idle-states = <&CPU_SLEEP_0>;
225 clocks = <&infracfg CLK_INFRA_CA57SEL>,
226 <&apmixedsys CLK_APMIXED_MAINPLL>;
227 clock-names = "cpu", "intermediate";
228 operating-points-v2 = <&cpu_opp_table_b>;
229 };
230
231 &cpu0 {
232 proc-supply = <&mt6397_vpca15_reg>;
233 };
234
235 &cpu1 {
236 proc-supply = <&mt6397_vpca15_reg>;
237 };
238
239 &cpu2 {
240 proc-supply = <&da9211_vcpu_reg>;
241 sram-supply = <&mt6397_vsramca7_reg>;
242 };
243
244 &cpu3 {
245 proc-supply = <&da9211_vcpu_reg>;
246 sram-supply = <&mt6397_vsramca7_reg>;
247 };
diff --git a/arch/arm/boot/dts/tango4-smp8758.dtsi b/arch/arm/boot/dts/tango4-smp8758.dtsi
index d2e65c46bcc7..eca33d568690 100644
--- a/arch/arm/boot/dts/tango4-smp8758.dtsi
+++ b/arch/arm/boot/dts/tango4-smp8758.dtsi
@@ -13,7 +13,6 @@
13 reg = <0>; 13 reg = <0>;
14 clocks = <&clkgen CPU_CLK>; 14 clocks = <&clkgen CPU_CLK>;
15 clock-latency = <1>; 15 clock-latency = <1>;
16 operating-points = <1215000 0 607500 0 405000 0 243000 0 135000 0>;
17 }; 16 };
18 17
19 cpu1: cpu@1 { 18 cpu1: cpu@1 {
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 2011fec2d6ad..bdce4488ded1 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -71,15 +71,6 @@ config ARM_HIGHBANK_CPUFREQ
71 71
72 If in doubt, say N. 72 If in doubt, say N.
73 73
74config ARM_DB8500_CPUFREQ
75 tristate "ST-Ericsson DB8500 cpufreq" if COMPILE_TEST && !ARCH_U8500
76 default ARCH_U8500
77 depends on HAS_IOMEM
78 depends on !CPU_THERMAL || THERMAL
79 help
80 This adds the CPUFreq driver for ST-Ericsson Ux500 (DB8500) SoC
81 series.
82
83config ARM_IMX6Q_CPUFREQ 74config ARM_IMX6Q_CPUFREQ
84 tristate "Freescale i.MX6 cpufreq support" 75 tristate "Freescale i.MX6 cpufreq support"
85 depends on ARCH_MXC 76 depends on ARCH_MXC
@@ -96,14 +87,13 @@ config ARM_KIRKWOOD_CPUFREQ
96 This adds the CPUFreq driver for Marvell Kirkwood 87 This adds the CPUFreq driver for Marvell Kirkwood
97 SoCs. 88 SoCs.
98 89
99config ARM_MT8173_CPUFREQ 90config ARM_MEDIATEK_CPUFREQ
100 tristate "Mediatek MT8173 CPUFreq support" 91 tristate "CPU Frequency scaling support for MediaTek SoCs"
101 depends on ARCH_MEDIATEK && REGULATOR 92 depends on ARCH_MEDIATEK && REGULATOR
102 depends on ARM64 || (ARM_CPU_TOPOLOGY && COMPILE_TEST)
103 depends on !CPU_THERMAL || THERMAL 93 depends on !CPU_THERMAL || THERMAL
104 select PM_OPP 94 select PM_OPP
105 help 95 help
106 This adds the CPUFreq driver support for Mediatek MT8173 SoC. 96 This adds the CPUFreq driver support for MediaTek SoCs.
107 97
108config ARM_OMAP2PLUS_CPUFREQ 98config ARM_OMAP2PLUS_CPUFREQ
109 bool "TI OMAP2+" 99 bool "TI OMAP2+"
@@ -242,6 +232,11 @@ config ARM_STI_CPUFREQ
242 this config option if you wish to add CPUFreq support for STi based 232 this config option if you wish to add CPUFreq support for STi based
243 SoCs. 233 SoCs.
244 234
235config ARM_TANGO_CPUFREQ
236 bool
237 depends on CPUFREQ_DT && ARCH_TANGO
238 default y
239
245config ARM_TEGRA20_CPUFREQ 240config ARM_TEGRA20_CPUFREQ
246 bool "Tegra20 CPUFreq support" 241 bool "Tegra20 CPUFreq support"
247 depends on ARCH_TEGRA 242 depends on ARCH_TEGRA
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index ab3a42cd29ef..c7af9b2a255e 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -53,12 +53,11 @@ obj-$(CONFIG_ARM_DT_BL_CPUFREQ) += arm_big_little_dt.o
53 53
54obj-$(CONFIG_ARM_BRCMSTB_AVS_CPUFREQ) += brcmstb-avs-cpufreq.o 54obj-$(CONFIG_ARM_BRCMSTB_AVS_CPUFREQ) += brcmstb-avs-cpufreq.o
55obj-$(CONFIG_ARCH_DAVINCI) += davinci-cpufreq.o 55obj-$(CONFIG_ARCH_DAVINCI) += davinci-cpufreq.o
56obj-$(CONFIG_ARM_DB8500_CPUFREQ) += dbx500-cpufreq.o
57obj-$(CONFIG_ARM_EXYNOS5440_CPUFREQ) += exynos5440-cpufreq.o 56obj-$(CONFIG_ARM_EXYNOS5440_CPUFREQ) += exynos5440-cpufreq.o
58obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ) += highbank-cpufreq.o 57obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ) += highbank-cpufreq.o
59obj-$(CONFIG_ARM_IMX6Q_CPUFREQ) += imx6q-cpufreq.o 58obj-$(CONFIG_ARM_IMX6Q_CPUFREQ) += imx6q-cpufreq.o
60obj-$(CONFIG_ARM_KIRKWOOD_CPUFREQ) += kirkwood-cpufreq.o 59obj-$(CONFIG_ARM_KIRKWOOD_CPUFREQ) += kirkwood-cpufreq.o
61obj-$(CONFIG_ARM_MT8173_CPUFREQ) += mt8173-cpufreq.o 60obj-$(CONFIG_ARM_MEDIATEK_CPUFREQ) += mediatek-cpufreq.o
62obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o 61obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o
63obj-$(CONFIG_ARM_PXA2xx_CPUFREQ) += pxa2xx-cpufreq.o 62obj-$(CONFIG_ARM_PXA2xx_CPUFREQ) += pxa2xx-cpufreq.o
64obj-$(CONFIG_PXA3xx) += pxa3xx-cpufreq.o 63obj-$(CONFIG_PXA3xx) += pxa3xx-cpufreq.o
@@ -75,6 +74,7 @@ obj-$(CONFIG_ARM_SA1110_CPUFREQ) += sa1110-cpufreq.o
75obj-$(CONFIG_ARM_SCPI_CPUFREQ) += scpi-cpufreq.o 74obj-$(CONFIG_ARM_SCPI_CPUFREQ) += scpi-cpufreq.o
76obj-$(CONFIG_ARM_SPEAR_CPUFREQ) += spear-cpufreq.o 75obj-$(CONFIG_ARM_SPEAR_CPUFREQ) += spear-cpufreq.o
77obj-$(CONFIG_ARM_STI_CPUFREQ) += sti-cpufreq.o 76obj-$(CONFIG_ARM_STI_CPUFREQ) += sti-cpufreq.o
77obj-$(CONFIG_ARM_TANGO_CPUFREQ) += tango-cpufreq.o
78obj-$(CONFIG_ARM_TEGRA20_CPUFREQ) += tegra20-cpufreq.o 78obj-$(CONFIG_ARM_TEGRA20_CPUFREQ) += tegra20-cpufreq.o
79obj-$(CONFIG_ARM_TEGRA124_CPUFREQ) += tegra124-cpufreq.o 79obj-$(CONFIG_ARM_TEGRA124_CPUFREQ) += tegra124-cpufreq.o
80obj-$(CONFIG_ARM_TEGRA186_CPUFREQ) += tegra186-cpufreq.o 80obj-$(CONFIG_ARM_TEGRA186_CPUFREQ) += tegra186-cpufreq.o
diff --git a/drivers/cpufreq/arm_big_little.c b/drivers/cpufreq/arm_big_little.c
index ea6d62547b10..17504129fd77 100644
--- a/drivers/cpufreq/arm_big_little.c
+++ b/drivers/cpufreq/arm_big_little.c
@@ -483,11 +483,8 @@ static int bL_cpufreq_init(struct cpufreq_policy *policy)
483 return ret; 483 return ret;
484 } 484 }
485 485
486 if (arm_bL_ops->get_transition_latency) 486 policy->cpuinfo.transition_latency =
487 policy->cpuinfo.transition_latency = 487 arm_bL_ops->get_transition_latency(cpu_dev);
488 arm_bL_ops->get_transition_latency(cpu_dev);
489 else
490 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
491 488
492 if (is_bL_switching_enabled()) 489 if (is_bL_switching_enabled())
493 per_cpu(cpu_last_req_freq, policy->cpu) = clk_get_cpu_rate(policy->cpu); 490 per_cpu(cpu_last_req_freq, policy->cpu) = clk_get_cpu_rate(policy->cpu);
@@ -622,7 +619,8 @@ int bL_cpufreq_register(struct cpufreq_arm_bL_ops *ops)
622 return -EBUSY; 619 return -EBUSY;
623 } 620 }
624 621
625 if (!ops || !strlen(ops->name) || !ops->init_opp_table) { 622 if (!ops || !strlen(ops->name) || !ops->init_opp_table ||
623 !ops->get_transition_latency) {
626 pr_err("%s: Invalid arm_bL_ops, exiting\n", __func__); 624 pr_err("%s: Invalid arm_bL_ops, exiting\n", __func__);
627 return -ENODEV; 625 return -ENODEV;
628 } 626 }
diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c
index 10be285c9055..a1c3025f9df7 100644
--- a/drivers/cpufreq/cppc_cpufreq.c
+++ b/drivers/cpufreq/cppc_cpufreq.c
@@ -172,7 +172,6 @@ static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
172 return -EFAULT; 172 return -EFAULT;
173 } 173 }
174 174
175 cpumask_set_cpu(policy->cpu, policy->cpus);
176 cpu->cur_policy = policy; 175 cpu->cur_policy = policy;
177 176
178 /* Set policy->cur to max now. The governors will adjust later. */ 177 /* Set policy->cur to max now. The governors will adjust later. */
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
index 1c262923fe58..a020da7940d6 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -9,11 +9,16 @@
9 9
10#include <linux/err.h> 10#include <linux/err.h>
11#include <linux/of.h> 11#include <linux/of.h>
12#include <linux/of_device.h>
12#include <linux/platform_device.h> 13#include <linux/platform_device.h>
13 14
14#include "cpufreq-dt.h" 15#include "cpufreq-dt.h"
15 16
16static const struct of_device_id machines[] __initconst = { 17/*
18 * Machines for which the cpufreq device is *always* created, mostly used for
19 * platforms using "operating-points" (V1) property.
20 */
21static const struct of_device_id whitelist[] __initconst = {
17 { .compatible = "allwinner,sun4i-a10", }, 22 { .compatible = "allwinner,sun4i-a10", },
18 { .compatible = "allwinner,sun5i-a10s", }, 23 { .compatible = "allwinner,sun5i-a10s", },
19 { .compatible = "allwinner,sun5i-a13", }, 24 { .compatible = "allwinner,sun5i-a13", },
@@ -22,7 +27,6 @@ static const struct of_device_id machines[] __initconst = {
22 { .compatible = "allwinner,sun6i-a31s", }, 27 { .compatible = "allwinner,sun6i-a31s", },
23 { .compatible = "allwinner,sun7i-a20", }, 28 { .compatible = "allwinner,sun7i-a20", },
24 { .compatible = "allwinner,sun8i-a23", }, 29 { .compatible = "allwinner,sun8i-a23", },
25 { .compatible = "allwinner,sun8i-a33", },
26 { .compatible = "allwinner,sun8i-a83t", }, 30 { .compatible = "allwinner,sun8i-a83t", },
27 { .compatible = "allwinner,sun8i-h3", }, 31 { .compatible = "allwinner,sun8i-h3", },
28 32
@@ -32,7 +36,6 @@ static const struct of_device_id machines[] __initconst = {
32 { .compatible = "arm,integrator-cp", }, 36 { .compatible = "arm,integrator-cp", },
33 37
34 { .compatible = "hisilicon,hi3660", }, 38 { .compatible = "hisilicon,hi3660", },
35 { .compatible = "hisilicon,hi6220", },
36 39
37 { .compatible = "fsl,imx27", }, 40 { .compatible = "fsl,imx27", },
38 { .compatible = "fsl,imx51", }, 41 { .compatible = "fsl,imx51", },
@@ -46,11 +49,8 @@ static const struct of_device_id machines[] __initconst = {
46 { .compatible = "samsung,exynos3250", }, 49 { .compatible = "samsung,exynos3250", },
47 { .compatible = "samsung,exynos4210", }, 50 { .compatible = "samsung,exynos4210", },
48 { .compatible = "samsung,exynos4212", }, 51 { .compatible = "samsung,exynos4212", },
49 { .compatible = "samsung,exynos4412", },
50 { .compatible = "samsung,exynos5250", }, 52 { .compatible = "samsung,exynos5250", },
51#ifndef CONFIG_BL_SWITCHER 53#ifndef CONFIG_BL_SWITCHER
52 { .compatible = "samsung,exynos5420", },
53 { .compatible = "samsung,exynos5433", },
54 { .compatible = "samsung,exynos5800", }, 54 { .compatible = "samsung,exynos5800", },
55#endif 55#endif
56 56
@@ -67,6 +67,8 @@ static const struct of_device_id machines[] __initconst = {
67 { .compatible = "renesas,r8a7792", }, 67 { .compatible = "renesas,r8a7792", },
68 { .compatible = "renesas,r8a7793", }, 68 { .compatible = "renesas,r8a7793", },
69 { .compatible = "renesas,r8a7794", }, 69 { .compatible = "renesas,r8a7794", },
70 { .compatible = "renesas,r8a7795", },
71 { .compatible = "renesas,r8a7796", },
70 { .compatible = "renesas,sh73a0", }, 72 { .compatible = "renesas,sh73a0", },
71 73
72 { .compatible = "rockchip,rk2928", }, 74 { .compatible = "rockchip,rk2928", },
@@ -76,17 +78,17 @@ static const struct of_device_id machines[] __initconst = {
76 { .compatible = "rockchip,rk3188", }, 78 { .compatible = "rockchip,rk3188", },
77 { .compatible = "rockchip,rk3228", }, 79 { .compatible = "rockchip,rk3228", },
78 { .compatible = "rockchip,rk3288", }, 80 { .compatible = "rockchip,rk3288", },
81 { .compatible = "rockchip,rk3328", },
79 { .compatible = "rockchip,rk3366", }, 82 { .compatible = "rockchip,rk3366", },
80 { .compatible = "rockchip,rk3368", }, 83 { .compatible = "rockchip,rk3368", },
81 { .compatible = "rockchip,rk3399", }, 84 { .compatible = "rockchip,rk3399", },
82 85
83 { .compatible = "sigma,tango4" },
84
85 { .compatible = "socionext,uniphier-pro5", },
86 { .compatible = "socionext,uniphier-pxs2", },
87 { .compatible = "socionext,uniphier-ld6b", }, 86 { .compatible = "socionext,uniphier-ld6b", },
88 { .compatible = "socionext,uniphier-ld11", }, 87
89 { .compatible = "socionext,uniphier-ld20", }, 88 { .compatible = "st-ericsson,u8500", },
89 { .compatible = "st-ericsson,u8540", },
90 { .compatible = "st-ericsson,u9500", },
91 { .compatible = "st-ericsson,u9540", },
90 92
91 { .compatible = "ti,omap2", }, 93 { .compatible = "ti,omap2", },
92 { .compatible = "ti,omap3", }, 94 { .compatible = "ti,omap3", },
@@ -94,27 +96,56 @@ static const struct of_device_id machines[] __initconst = {
94 { .compatible = "ti,omap5", }, 96 { .compatible = "ti,omap5", },
95 97
96 { .compatible = "xlnx,zynq-7000", }, 98 { .compatible = "xlnx,zynq-7000", },
99 { .compatible = "xlnx,zynqmp", },
97 100
98 { .compatible = "zte,zx296718", }, 101 { }
102};
99 103
104/*
105 * Machines for which the cpufreq device is *not* created, mostly used for
106 * platforms using "operating-points-v2" property.
107 */
108static const struct of_device_id blacklist[] __initconst = {
100 { } 109 { }
101}; 110};
102 111
112static bool __init cpu0_node_has_opp_v2_prop(void)
113{
114 struct device_node *np = of_cpu_device_node_get(0);
115 bool ret = false;
116
117 if (of_get_property(np, "operating-points-v2", NULL))
118 ret = true;
119
120 of_node_put(np);
121 return ret;
122}
123
103static int __init cpufreq_dt_platdev_init(void) 124static int __init cpufreq_dt_platdev_init(void)
104{ 125{
105 struct device_node *np = of_find_node_by_path("/"); 126 struct device_node *np = of_find_node_by_path("/");
106 const struct of_device_id *match; 127 const struct of_device_id *match;
128 const void *data = NULL;
107 129
108 if (!np) 130 if (!np)
109 return -ENODEV; 131 return -ENODEV;
110 132
111 match = of_match_node(machines, np); 133 match = of_match_node(whitelist, np);
134 if (match) {
135 data = match->data;
136 goto create_pdev;
137 }
138
139 if (cpu0_node_has_opp_v2_prop() && !of_match_node(blacklist, np))
140 goto create_pdev;
141
112 of_node_put(np); 142 of_node_put(np);
113 if (!match) 143 return -ENODEV;
114 return -ENODEV;
115 144
145create_pdev:
146 of_node_put(np);
116 return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt", 147 return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt",
117 -1, match->data, 148 -1, data,
118 sizeof(struct cpufreq_dt_platform_data))); 149 sizeof(struct cpufreq_dt_platform_data)));
119} 150}
120device_initcall(cpufreq_dt_platdev_init); 151device_initcall(cpufreq_dt_platdev_init);
diff --git a/drivers/cpufreq/cpufreq-nforce2.c b/drivers/cpufreq/cpufreq-nforce2.c
index 5503d491b016..dbf82f36d270 100644
--- a/drivers/cpufreq/cpufreq-nforce2.c
+++ b/drivers/cpufreq/cpufreq-nforce2.c
@@ -357,7 +357,6 @@ static int nforce2_cpu_init(struct cpufreq_policy *policy)
357 /* cpuinfo and default policy values */ 357 /* cpuinfo and default policy values */
358 policy->min = policy->cpuinfo.min_freq = min_fsb * fid * 100; 358 policy->min = policy->cpuinfo.min_freq = min_fsb * fid * 100;
359 policy->max = policy->cpuinfo.max_freq = max_fsb * fid * 100; 359 policy->max = policy->cpuinfo.max_freq = max_fsb * fid * 100;
360 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
361 360
362 return 0; 361 return 0;
363} 362}
@@ -369,6 +368,7 @@ static int nforce2_cpu_exit(struct cpufreq_policy *policy)
369 368
370static struct cpufreq_driver nforce2_driver = { 369static struct cpufreq_driver nforce2_driver = {
371 .name = "nforce2", 370 .name = "nforce2",
371 .flags = CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
372 .verify = nforce2_verify, 372 .verify = nforce2_verify,
373 .target = nforce2_target, 373 .target = nforce2_target,
374 .get = nforce2_get, 374 .get = nforce2_get,
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 9bf97a366029..c7ae67d6886d 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -524,6 +524,32 @@ unsigned int cpufreq_driver_resolve_freq(struct cpufreq_policy *policy,
524} 524}
525EXPORT_SYMBOL_GPL(cpufreq_driver_resolve_freq); 525EXPORT_SYMBOL_GPL(cpufreq_driver_resolve_freq);
526 526
527unsigned int cpufreq_policy_transition_delay_us(struct cpufreq_policy *policy)
528{
529 unsigned int latency;
530
531 if (policy->transition_delay_us)
532 return policy->transition_delay_us;
533
534 latency = policy->cpuinfo.transition_latency / NSEC_PER_USEC;
535 if (latency) {
536 /*
537 * For platforms that can change the frequency very fast (< 10
538 * us), the above formula gives a decent transition delay. But
539 * for platforms where transition_latency is in milliseconds, it
540 * ends up giving unrealistic values.
541 *
542 * Cap the default transition delay to 10 ms, which seems to be
543 * a reasonable amount of time after which we should reevaluate
544 * the frequency.
545 */
546 return min(latency * LATENCY_MULTIPLIER, (unsigned int)10000);
547 }
548
549 return LATENCY_MULTIPLIER;
550}
551EXPORT_SYMBOL_GPL(cpufreq_policy_transition_delay_us);
552
527/********************************************************************* 553/*********************************************************************
528 * SYSFS INTERFACE * 554 * SYSFS INTERFACE *
529 *********************************************************************/ 555 *********************************************************************/
@@ -1988,13 +2014,13 @@ static int cpufreq_init_governor(struct cpufreq_policy *policy)
1988 if (!policy->governor) 2014 if (!policy->governor)
1989 return -EINVAL; 2015 return -EINVAL;
1990 2016
1991 if (policy->governor->max_transition_latency && 2017 /* Platform doesn't want dynamic frequency switching ? */
1992 policy->cpuinfo.transition_latency > 2018 if (policy->governor->dynamic_switching &&
1993 policy->governor->max_transition_latency) { 2019 cpufreq_driver->flags & CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING) {
1994 struct cpufreq_governor *gov = cpufreq_fallback_governor(); 2020 struct cpufreq_governor *gov = cpufreq_fallback_governor();
1995 2021
1996 if (gov) { 2022 if (gov) {
1997 pr_warn("%s governor failed, too long transition latency of HW, fallback to %s governor\n", 2023 pr_warn("Can't use %s governor as dynamic switching is disallowed. Fallback to %s governor\n",
1998 policy->governor->name, gov->name); 2024 policy->governor->name, gov->name);
1999 policy->governor = gov; 2025 policy->governor = gov;
2000 } else { 2026 } else {
diff --git a/drivers/cpufreq/cpufreq_conservative.c b/drivers/cpufreq/cpufreq_conservative.c
index 88220ff3e1c2..f20f20a77d4d 100644
--- a/drivers/cpufreq/cpufreq_conservative.c
+++ b/drivers/cpufreq/cpufreq_conservative.c
@@ -246,7 +246,6 @@ gov_show_one_common(sampling_rate);
246gov_show_one_common(sampling_down_factor); 246gov_show_one_common(sampling_down_factor);
247gov_show_one_common(up_threshold); 247gov_show_one_common(up_threshold);
248gov_show_one_common(ignore_nice_load); 248gov_show_one_common(ignore_nice_load);
249gov_show_one_common(min_sampling_rate);
250gov_show_one(cs, down_threshold); 249gov_show_one(cs, down_threshold);
251gov_show_one(cs, freq_step); 250gov_show_one(cs, freq_step);
252 251
@@ -254,12 +253,10 @@ gov_attr_rw(sampling_rate);
254gov_attr_rw(sampling_down_factor); 253gov_attr_rw(sampling_down_factor);
255gov_attr_rw(up_threshold); 254gov_attr_rw(up_threshold);
256gov_attr_rw(ignore_nice_load); 255gov_attr_rw(ignore_nice_load);
257gov_attr_ro(min_sampling_rate);
258gov_attr_rw(down_threshold); 256gov_attr_rw(down_threshold);
259gov_attr_rw(freq_step); 257gov_attr_rw(freq_step);
260 258
261static struct attribute *cs_attributes[] = { 259static struct attribute *cs_attributes[] = {
262 &min_sampling_rate.attr,
263 &sampling_rate.attr, 260 &sampling_rate.attr,
264 &sampling_down_factor.attr, 261 &sampling_down_factor.attr,
265 &up_threshold.attr, 262 &up_threshold.attr,
@@ -297,10 +294,7 @@ static int cs_init(struct dbs_data *dbs_data)
297 dbs_data->up_threshold = DEF_FREQUENCY_UP_THRESHOLD; 294 dbs_data->up_threshold = DEF_FREQUENCY_UP_THRESHOLD;
298 dbs_data->sampling_down_factor = DEF_SAMPLING_DOWN_FACTOR; 295 dbs_data->sampling_down_factor = DEF_SAMPLING_DOWN_FACTOR;
299 dbs_data->ignore_nice_load = 0; 296 dbs_data->ignore_nice_load = 0;
300
301 dbs_data->tuners = tuners; 297 dbs_data->tuners = tuners;
302 dbs_data->min_sampling_rate = MIN_SAMPLING_RATE_RATIO *
303 jiffies_to_usecs(10);
304 298
305 return 0; 299 return 0;
306} 300}
diff --git a/drivers/cpufreq/cpufreq_governor.c b/drivers/cpufreq/cpufreq_governor.c
index 47e24b5384b3..eed069ecfd5e 100644
--- a/drivers/cpufreq/cpufreq_governor.c
+++ b/drivers/cpufreq/cpufreq_governor.c
@@ -47,14 +47,11 @@ ssize_t store_sampling_rate(struct gov_attr_set *attr_set, const char *buf,
47{ 47{
48 struct dbs_data *dbs_data = to_dbs_data(attr_set); 48 struct dbs_data *dbs_data = to_dbs_data(attr_set);
49 struct policy_dbs_info *policy_dbs; 49 struct policy_dbs_info *policy_dbs;
50 unsigned int rate;
51 int ret; 50 int ret;
52 ret = sscanf(buf, "%u", &rate); 51 ret = sscanf(buf, "%u", &dbs_data->sampling_rate);
53 if (ret != 1) 52 if (ret != 1)
54 return -EINVAL; 53 return -EINVAL;
55 54
56 dbs_data->sampling_rate = max(rate, dbs_data->min_sampling_rate);
57
58 /* 55 /*
59 * We are operating under dbs_data->mutex and so the list and its 56 * We are operating under dbs_data->mutex and so the list and its
60 * entries can't be freed concurrently. 57 * entries can't be freed concurrently.
@@ -392,7 +389,6 @@ int cpufreq_dbs_governor_init(struct cpufreq_policy *policy)
392 struct dbs_governor *gov = dbs_governor_of(policy); 389 struct dbs_governor *gov = dbs_governor_of(policy);
393 struct dbs_data *dbs_data; 390 struct dbs_data *dbs_data;
394 struct policy_dbs_info *policy_dbs; 391 struct policy_dbs_info *policy_dbs;
395 unsigned int latency;
396 int ret = 0; 392 int ret = 0;
397 393
398 /* State should be equivalent to EXIT */ 394 /* State should be equivalent to EXIT */
@@ -431,16 +427,7 @@ int cpufreq_dbs_governor_init(struct cpufreq_policy *policy)
431 if (ret) 427 if (ret)
432 goto free_policy_dbs_info; 428 goto free_policy_dbs_info;
433 429
434 /* policy latency is in ns. Convert it to us first */ 430 dbs_data->sampling_rate = cpufreq_policy_transition_delay_us(policy);
435 latency = policy->cpuinfo.transition_latency / 1000;
436 if (latency == 0)
437 latency = 1;
438
439 /* Bring kernel and HW constraints together */
440 dbs_data->min_sampling_rate = max(dbs_data->min_sampling_rate,
441 MIN_LATENCY_MULTIPLIER * latency);
442 dbs_data->sampling_rate = max(dbs_data->min_sampling_rate,
443 LATENCY_MULTIPLIER * latency);
444 431
445 if (!have_governor_per_policy()) 432 if (!have_governor_per_policy())
446 gov->gdbs_data = dbs_data; 433 gov->gdbs_data = dbs_data;
diff --git a/drivers/cpufreq/cpufreq_governor.h b/drivers/cpufreq/cpufreq_governor.h
index 0236ec2cd654..8463f5def0f5 100644
--- a/drivers/cpufreq/cpufreq_governor.h
+++ b/drivers/cpufreq/cpufreq_governor.h
@@ -41,7 +41,6 @@ enum {OD_NORMAL_SAMPLE, OD_SUB_SAMPLE};
41struct dbs_data { 41struct dbs_data {
42 struct gov_attr_set attr_set; 42 struct gov_attr_set attr_set;
43 void *tuners; 43 void *tuners;
44 unsigned int min_sampling_rate;
45 unsigned int ignore_nice_load; 44 unsigned int ignore_nice_load;
46 unsigned int sampling_rate; 45 unsigned int sampling_rate;
47 unsigned int sampling_down_factor; 46 unsigned int sampling_down_factor;
@@ -160,7 +159,7 @@ void cpufreq_dbs_governor_limits(struct cpufreq_policy *policy);
160#define CPUFREQ_DBS_GOVERNOR_INITIALIZER(_name_) \ 159#define CPUFREQ_DBS_GOVERNOR_INITIALIZER(_name_) \
161 { \ 160 { \
162 .name = _name_, \ 161 .name = _name_, \
163 .max_transition_latency = TRANSITION_LATENCY_LIMIT, \ 162 .dynamic_switching = true, \
164 .owner = THIS_MODULE, \ 163 .owner = THIS_MODULE, \
165 .init = cpufreq_dbs_governor_init, \ 164 .init = cpufreq_dbs_governor_init, \
166 .exit = cpufreq_dbs_governor_exit, \ 165 .exit = cpufreq_dbs_governor_exit, \
diff --git a/drivers/cpufreq/cpufreq_ondemand.c b/drivers/cpufreq/cpufreq_ondemand.c
index 3937acf7e026..6b423eebfd5d 100644
--- a/drivers/cpufreq/cpufreq_ondemand.c
+++ b/drivers/cpufreq/cpufreq_ondemand.c
@@ -319,7 +319,6 @@ gov_show_one_common(sampling_rate);
319gov_show_one_common(up_threshold); 319gov_show_one_common(up_threshold);
320gov_show_one_common(sampling_down_factor); 320gov_show_one_common(sampling_down_factor);
321gov_show_one_common(ignore_nice_load); 321gov_show_one_common(ignore_nice_load);
322gov_show_one_common(min_sampling_rate);
323gov_show_one_common(io_is_busy); 322gov_show_one_common(io_is_busy);
324gov_show_one(od, powersave_bias); 323gov_show_one(od, powersave_bias);
325 324
@@ -329,10 +328,8 @@ gov_attr_rw(up_threshold);
329gov_attr_rw(sampling_down_factor); 328gov_attr_rw(sampling_down_factor);
330gov_attr_rw(ignore_nice_load); 329gov_attr_rw(ignore_nice_load);
331gov_attr_rw(powersave_bias); 330gov_attr_rw(powersave_bias);
332gov_attr_ro(min_sampling_rate);
333 331
334static struct attribute *od_attributes[] = { 332static struct attribute *od_attributes[] = {
335 &min_sampling_rate.attr,
336 &sampling_rate.attr, 333 &sampling_rate.attr,
337 &up_threshold.attr, 334 &up_threshold.attr,
338 &sampling_down_factor.attr, 335 &sampling_down_factor.attr,
@@ -373,17 +370,8 @@ static int od_init(struct dbs_data *dbs_data)
373 if (idle_time != -1ULL) { 370 if (idle_time != -1ULL) {
374 /* Idle micro accounting is supported. Use finer thresholds */ 371 /* Idle micro accounting is supported. Use finer thresholds */
375 dbs_data->up_threshold = MICRO_FREQUENCY_UP_THRESHOLD; 372 dbs_data->up_threshold = MICRO_FREQUENCY_UP_THRESHOLD;
376 /*
377 * In nohz/micro accounting case we set the minimum frequency
378 * not depending on HZ, but fixed (very low).
379 */
380 dbs_data->min_sampling_rate = MICRO_FREQUENCY_MIN_SAMPLE_RATE;
381 } else { 373 } else {
382 dbs_data->up_threshold = DEF_FREQUENCY_UP_THRESHOLD; 374 dbs_data->up_threshold = DEF_FREQUENCY_UP_THRESHOLD;
383
384 /* For correct statistics, we need 10 ticks for each measure */
385 dbs_data->min_sampling_rate = MIN_SAMPLING_RATE_RATIO *
386 jiffies_to_usecs(10);
387 } 375 }
388 376
389 dbs_data->sampling_down_factor = DEF_SAMPLING_DOWN_FACTOR; 377 dbs_data->sampling_down_factor = DEF_SAMPLING_DOWN_FACTOR;
diff --git a/drivers/cpufreq/dbx500-cpufreq.c b/drivers/cpufreq/dbx500-cpufreq.c
deleted file mode 100644
index 4ee0431579c1..000000000000
--- a/drivers/cpufreq/dbx500-cpufreq.c
+++ /dev/null
@@ -1,103 +0,0 @@
1/*
2 * Copyright (C) STMicroelectronics 2009
3 * Copyright (C) ST-Ericsson SA 2010-2012
4 *
5 * License Terms: GNU General Public License v2
6 * Author: Sundar Iyer <sundar.iyer@stericsson.com>
7 * Author: Martin Persson <martin.persson@stericsson.com>
8 * Author: Jonas Aaberg <jonas.aberg@stericsson.com>
9 */
10
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/cpufreq.h>
14#include <linux/cpu_cooling.h>
15#include <linux/delay.h>
16#include <linux/slab.h>
17#include <linux/platform_device.h>
18#include <linux/clk.h>
19
20static struct cpufreq_frequency_table *freq_table;
21static struct clk *armss_clk;
22static struct thermal_cooling_device *cdev;
23
24static int dbx500_cpufreq_target(struct cpufreq_policy *policy,
25 unsigned int index)
26{
27 /* update armss clk frequency */
28 return clk_set_rate(armss_clk, freq_table[index].frequency * 1000);
29}
30
31static int dbx500_cpufreq_init(struct cpufreq_policy *policy)
32{
33 policy->clk = armss_clk;
34 return cpufreq_generic_init(policy, freq_table, 20 * 1000);
35}
36
37static int dbx500_cpufreq_exit(struct cpufreq_policy *policy)
38{
39 if (!IS_ERR(cdev))
40 cpufreq_cooling_unregister(cdev);
41 return 0;
42}
43
44static void dbx500_cpufreq_ready(struct cpufreq_policy *policy)
45{
46 cdev = cpufreq_cooling_register(policy);
47 if (IS_ERR(cdev))
48 pr_err("Failed to register cooling device %ld\n", PTR_ERR(cdev));
49 else
50 pr_info("Cooling device registered: %s\n", cdev->type);
51}
52
53static struct cpufreq_driver dbx500_cpufreq_driver = {
54 .flags = CPUFREQ_STICKY | CPUFREQ_CONST_LOOPS |
55 CPUFREQ_NEED_INITIAL_FREQ_CHECK,
56 .verify = cpufreq_generic_frequency_table_verify,
57 .target_index = dbx500_cpufreq_target,
58 .get = cpufreq_generic_get,
59 .init = dbx500_cpufreq_init,
60 .exit = dbx500_cpufreq_exit,
61 .ready = dbx500_cpufreq_ready,
62 .name = "DBX500",
63 .attr = cpufreq_generic_attr,
64};
65
66static int dbx500_cpufreq_probe(struct platform_device *pdev)
67{
68 struct cpufreq_frequency_table *pos;
69
70 freq_table = dev_get_platdata(&pdev->dev);
71 if (!freq_table) {
72 pr_err("dbx500-cpufreq: Failed to fetch cpufreq table\n");
73 return -ENODEV;
74 }
75
76 armss_clk = clk_get(&pdev->dev, "armss");
77 if (IS_ERR(armss_clk)) {
78 pr_err("dbx500-cpufreq: Failed to get armss clk\n");
79 return PTR_ERR(armss_clk);
80 }
81
82 pr_info("dbx500-cpufreq: Available frequencies:\n");
83 cpufreq_for_each_entry(pos, freq_table)
84 pr_info(" %d Mhz\n", pos->frequency / 1000);
85
86 return cpufreq_register_driver(&dbx500_cpufreq_driver);
87}
88
89static struct platform_driver dbx500_cpufreq_plat_driver = {
90 .driver = {
91 .name = "cpufreq-ux500",
92 },
93 .probe = dbx500_cpufreq_probe,
94};
95
96static int __init dbx500_cpufreq_register(void)
97{
98 return platform_driver_register(&dbx500_cpufreq_plat_driver);
99}
100device_initcall(dbx500_cpufreq_register);
101
102MODULE_LICENSE("GPL v2");
103MODULE_DESCRIPTION("cpufreq driver for DBX500");
diff --git a/drivers/cpufreq/elanfreq.c b/drivers/cpufreq/elanfreq.c
index bfce11cba1df..45e2ca62515e 100644
--- a/drivers/cpufreq/elanfreq.c
+++ b/drivers/cpufreq/elanfreq.c
@@ -165,9 +165,6 @@ static int elanfreq_cpu_init(struct cpufreq_policy *policy)
165 if (pos->frequency > max_freq) 165 if (pos->frequency > max_freq)
166 pos->frequency = CPUFREQ_ENTRY_INVALID; 166 pos->frequency = CPUFREQ_ENTRY_INVALID;
167 167
168 /* cpuinfo and default policy values */
169 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
170
171 return cpufreq_table_validate_and_show(policy, elanfreq_table); 168 return cpufreq_table_validate_and_show(policy, elanfreq_table);
172} 169}
173 170
@@ -196,6 +193,7 @@ __setup("elanfreq=", elanfreq_setup);
196 193
197static struct cpufreq_driver elanfreq_driver = { 194static struct cpufreq_driver elanfreq_driver = {
198 .get = elanfreq_get_cpu_frequency, 195 .get = elanfreq_get_cpu_frequency,
196 .flags = CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
199 .verify = cpufreq_generic_frequency_table_verify, 197 .verify = cpufreq_generic_frequency_table_verify,
200 .target_index = elanfreq_target, 198 .target_index = elanfreq_target,
201 .init = elanfreq_cpu_init, 199 .init = elanfreq_cpu_init,
diff --git a/drivers/cpufreq/gx-suspmod.c b/drivers/cpufreq/gx-suspmod.c
index 3488c9c175eb..8f52a06664e3 100644
--- a/drivers/cpufreq/gx-suspmod.c
+++ b/drivers/cpufreq/gx-suspmod.c
@@ -428,7 +428,6 @@ static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy)
428 policy->max = maxfreq; 428 policy->max = maxfreq;
429 policy->cpuinfo.min_freq = maxfreq / max_duration; 429 policy->cpuinfo.min_freq = maxfreq / max_duration;
430 policy->cpuinfo.max_freq = maxfreq; 430 policy->cpuinfo.max_freq = maxfreq;
431 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
432 431
433 return 0; 432 return 0;
434} 433}
@@ -438,6 +437,7 @@ static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy)
438 * MediaGX/Geode GX initialize cpufreq driver 437 * MediaGX/Geode GX initialize cpufreq driver
439 */ 438 */
440static struct cpufreq_driver gx_suspmod_driver = { 439static struct cpufreq_driver gx_suspmod_driver = {
440 .flags = CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
441 .get = gx_get_cpuspeed, 441 .get = gx_get_cpuspeed,
442 .verify = cpufreq_gx_verify, 442 .verify = cpufreq_gx_verify,
443 .target = cpufreq_gx_target, 443 .target = cpufreq_gx_target,
diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
index b6edd3ccaa55..14466a9b01c0 100644
--- a/drivers/cpufreq/imx6q-cpufreq.c
+++ b/drivers/cpufreq/imx6q-cpufreq.c
@@ -47,6 +47,7 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index)
47 struct dev_pm_opp *opp; 47 struct dev_pm_opp *opp;
48 unsigned long freq_hz, volt, volt_old; 48 unsigned long freq_hz, volt, volt_old;
49 unsigned int old_freq, new_freq; 49 unsigned int old_freq, new_freq;
50 bool pll1_sys_temp_enabled = false;
50 int ret; 51 int ret;
51 52
52 new_freq = freq_table[index].frequency; 53 new_freq = freq_table[index].frequency;
@@ -124,6 +125,10 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index)
124 if (freq_hz > clk_get_rate(pll2_pfd2_396m_clk)) { 125 if (freq_hz > clk_get_rate(pll2_pfd2_396m_clk)) {
125 clk_set_rate(pll1_sys_clk, new_freq * 1000); 126 clk_set_rate(pll1_sys_clk, new_freq * 1000);
126 clk_set_parent(pll1_sw_clk, pll1_sys_clk); 127 clk_set_parent(pll1_sw_clk, pll1_sys_clk);
128 } else {
129 /* pll1_sys needs to be enabled for divider rate change to work. */
130 pll1_sys_temp_enabled = true;
131 clk_prepare_enable(pll1_sys_clk);
127 } 132 }
128 } 133 }
129 134
@@ -135,6 +140,10 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index)
135 return ret; 140 return ret;
136 } 141 }
137 142
143 /* PLL1 is only needed until after ARM-PODF is set. */
144 if (pll1_sys_temp_enabled)
145 clk_disable_unprepare(pll1_sys_clk);
146
138 /* scaling down? scale voltage after frequency */ 147 /* scaling down? scale voltage after frequency */
139 if (new_freq < old_freq) { 148 if (new_freq < old_freq) {
140 ret = regulator_set_voltage_tol(arm_reg, volt, 0); 149 ret = regulator_set_voltage_tol(arm_reg, volt, 0);
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index 65ee4fcace1f..04dd5f46803d 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -2132,7 +2132,6 @@ static int __intel_pstate_cpu_init(struct cpufreq_policy *policy)
2132 policy->cpuinfo.max_freq *= cpu->pstate.scaling; 2132 policy->cpuinfo.max_freq *= cpu->pstate.scaling;
2133 2133
2134 intel_pstate_init_acpi_perf_limits(policy); 2134 intel_pstate_init_acpi_perf_limits(policy);
2135 cpumask_set_cpu(policy->cpu, policy->cpus);
2136 2135
2137 policy->fast_switch_possible = true; 2136 policy->fast_switch_possible = true;
2138 2137
@@ -2146,7 +2145,6 @@ static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
2146 if (ret) 2145 if (ret)
2147 return ret; 2146 return ret;
2148 2147
2149 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
2150 if (IS_ENABLED(CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE)) 2148 if (IS_ENABLED(CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE))
2151 policy->policy = CPUFREQ_POLICY_PERFORMANCE; 2149 policy->policy = CPUFREQ_POLICY_PERFORMANCE;
2152 else 2150 else
diff --git a/drivers/cpufreq/longrun.c b/drivers/cpufreq/longrun.c
index 074971b12635..542aa9adba1a 100644
--- a/drivers/cpufreq/longrun.c
+++ b/drivers/cpufreq/longrun.c
@@ -270,7 +270,6 @@ static int longrun_cpu_init(struct cpufreq_policy *policy)
270 /* cpuinfo and default policy values */ 270 /* cpuinfo and default policy values */
271 policy->cpuinfo.min_freq = longrun_low_freq; 271 policy->cpuinfo.min_freq = longrun_low_freq;
272 policy->cpuinfo.max_freq = longrun_high_freq; 272 policy->cpuinfo.max_freq = longrun_high_freq;
273 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
274 longrun_get_policy(policy); 273 longrun_get_policy(policy);
275 274
276 return 0; 275 return 0;
diff --git a/drivers/cpufreq/loongson2_cpufreq.c b/drivers/cpufreq/loongson2_cpufreq.c
index 9ac27b22476c..da344696beed 100644
--- a/drivers/cpufreq/loongson2_cpufreq.c
+++ b/drivers/cpufreq/loongson2_cpufreq.c
@@ -114,7 +114,7 @@ static struct cpufreq_driver loongson2_cpufreq_driver = {
114 .attr = cpufreq_generic_attr, 114 .attr = cpufreq_generic_attr,
115}; 115};
116 116
117static struct platform_device_id platform_device_ids[] = { 117static const struct platform_device_id platform_device_ids[] = {
118 { 118 {
119 .name = "loongson2_cpufreq", 119 .name = "loongson2_cpufreq",
120 }, 120 },
diff --git a/drivers/cpufreq/mt8173-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c
index f9f00fb4bc3a..18c4bd9a5c65 100644
--- a/drivers/cpufreq/mt8173-cpufreq.c
+++ b/drivers/cpufreq/mediatek-cpufreq.c
@@ -507,7 +507,7 @@ static int mtk_cpufreq_exit(struct cpufreq_policy *policy)
507 return 0; 507 return 0;
508} 508}
509 509
510static struct cpufreq_driver mt8173_cpufreq_driver = { 510static struct cpufreq_driver mtk_cpufreq_driver = {
511 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK | 511 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK |
512 CPUFREQ_HAVE_GOVERNOR_PER_POLICY, 512 CPUFREQ_HAVE_GOVERNOR_PER_POLICY,
513 .verify = cpufreq_generic_frequency_table_verify, 513 .verify = cpufreq_generic_frequency_table_verify,
@@ -520,7 +520,7 @@ static struct cpufreq_driver mt8173_cpufreq_driver = {
520 .attr = cpufreq_generic_attr, 520 .attr = cpufreq_generic_attr,
521}; 521};
522 522
523static int mt8173_cpufreq_probe(struct platform_device *pdev) 523static int mtk_cpufreq_probe(struct platform_device *pdev)
524{ 524{
525 struct mtk_cpu_dvfs_info *info, *tmp; 525 struct mtk_cpu_dvfs_info *info, *tmp;
526 int cpu, ret; 526 int cpu, ret;
@@ -547,7 +547,7 @@ static int mt8173_cpufreq_probe(struct platform_device *pdev)
547 list_add(&info->list_head, &dvfs_info_list); 547 list_add(&info->list_head, &dvfs_info_list);
548 } 548 }
549 549
550 ret = cpufreq_register_driver(&mt8173_cpufreq_driver); 550 ret = cpufreq_register_driver(&mtk_cpufreq_driver);
551 if (ret) { 551 if (ret) {
552 dev_err(&pdev->dev, "failed to register mtk cpufreq driver\n"); 552 dev_err(&pdev->dev, "failed to register mtk cpufreq driver\n");
553 goto release_dvfs_info_list; 553 goto release_dvfs_info_list;
@@ -564,15 +564,18 @@ release_dvfs_info_list:
564 return ret; 564 return ret;
565} 565}
566 566
567static struct platform_driver mt8173_cpufreq_platdrv = { 567static struct platform_driver mtk_cpufreq_platdrv = {
568 .driver = { 568 .driver = {
569 .name = "mt8173-cpufreq", 569 .name = "mtk-cpufreq",
570 }, 570 },
571 .probe = mt8173_cpufreq_probe, 571 .probe = mtk_cpufreq_probe,
572}; 572};
573 573
574/* List of machines supported by this driver */ 574/* List of machines supported by this driver */
575static const struct of_device_id mt8173_cpufreq_machines[] __initconst = { 575static const struct of_device_id mtk_cpufreq_machines[] __initconst = {
576 { .compatible = "mediatek,mt2701", },
577 { .compatible = "mediatek,mt7622", },
578 { .compatible = "mediatek,mt7623", },
576 { .compatible = "mediatek,mt817x", }, 579 { .compatible = "mediatek,mt817x", },
577 { .compatible = "mediatek,mt8173", }, 580 { .compatible = "mediatek,mt8173", },
578 { .compatible = "mediatek,mt8176", }, 581 { .compatible = "mediatek,mt8176", },
@@ -580,7 +583,7 @@ static const struct of_device_id mt8173_cpufreq_machines[] __initconst = {
580 { } 583 { }
581}; 584};
582 585
583static int __init mt8173_cpufreq_driver_init(void) 586static int __init mtk_cpufreq_driver_init(void)
584{ 587{
585 struct device_node *np; 588 struct device_node *np;
586 const struct of_device_id *match; 589 const struct of_device_id *match;
@@ -591,14 +594,14 @@ static int __init mt8173_cpufreq_driver_init(void)
591 if (!np) 594 if (!np)
592 return -ENODEV; 595 return -ENODEV;
593 596
594 match = of_match_node(mt8173_cpufreq_machines, np); 597 match = of_match_node(mtk_cpufreq_machines, np);
595 of_node_put(np); 598 of_node_put(np);
596 if (!match) { 599 if (!match) {
597 pr_warn("Machine is not compatible with mt8173-cpufreq\n"); 600 pr_warn("Machine is not compatible with mtk-cpufreq\n");
598 return -ENODEV; 601 return -ENODEV;
599 } 602 }
600 603
601 err = platform_driver_register(&mt8173_cpufreq_platdrv); 604 err = platform_driver_register(&mtk_cpufreq_platdrv);
602 if (err) 605 if (err)
603 return err; 606 return err;
604 607
@@ -608,7 +611,7 @@ static int __init mt8173_cpufreq_driver_init(void)
608 * and the device registration codes are put here to handle defer 611 * and the device registration codes are put here to handle defer
609 * probing. 612 * probing.
610 */ 613 */
611 pdev = platform_device_register_simple("mt8173-cpufreq", -1, NULL, 0); 614 pdev = platform_device_register_simple("mtk-cpufreq", -1, NULL, 0);
612 if (IS_ERR(pdev)) { 615 if (IS_ERR(pdev)) {
613 pr_err("failed to register mtk-cpufreq platform device\n"); 616 pr_err("failed to register mtk-cpufreq platform device\n");
614 return PTR_ERR(pdev); 617 return PTR_ERR(pdev);
@@ -616,4 +619,4 @@ static int __init mt8173_cpufreq_driver_init(void)
616 619
617 return 0; 620 return 0;
618} 621}
619device_initcall(mt8173_cpufreq_driver_init); 622device_initcall(mtk_cpufreq_driver_init);
diff --git a/drivers/cpufreq/pmac32-cpufreq.c b/drivers/cpufreq/pmac32-cpufreq.c
index ff44016ea031..61ae06ca008e 100644
--- a/drivers/cpufreq/pmac32-cpufreq.c
+++ b/drivers/cpufreq/pmac32-cpufreq.c
@@ -442,7 +442,8 @@ static struct cpufreq_driver pmac_cpufreq_driver = {
442 .init = pmac_cpufreq_cpu_init, 442 .init = pmac_cpufreq_cpu_init,
443 .suspend = pmac_cpufreq_suspend, 443 .suspend = pmac_cpufreq_suspend,
444 .resume = pmac_cpufreq_resume, 444 .resume = pmac_cpufreq_resume,
445 .flags = CPUFREQ_PM_NO_WARN, 445 .flags = CPUFREQ_PM_NO_WARN |
446 CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
446 .attr = cpufreq_generic_attr, 447 .attr = cpufreq_generic_attr,
447 .name = "powermac", 448 .name = "powermac",
448}; 449};
@@ -626,14 +627,16 @@ static int __init pmac_cpufreq_setup(void)
626 if (!value) 627 if (!value)
627 goto out; 628 goto out;
628 cur_freq = (*value) / 1000; 629 cur_freq = (*value) / 1000;
629 transition_latency = CPUFREQ_ETERNAL;
630 630
631 /* Check for 7447A based MacRISC3 */ 631 /* Check for 7447A based MacRISC3 */
632 if (of_machine_is_compatible("MacRISC3") && 632 if (of_machine_is_compatible("MacRISC3") &&
633 of_get_property(cpunode, "dynamic-power-step", NULL) && 633 of_get_property(cpunode, "dynamic-power-step", NULL) &&
634 PVR_VER(mfspr(SPRN_PVR)) == 0x8003) { 634 PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
635 pmac_cpufreq_init_7447A(cpunode); 635 pmac_cpufreq_init_7447A(cpunode);
636
637 /* Allow dynamic switching */
636 transition_latency = 8000000; 638 transition_latency = 8000000;
639 pmac_cpufreq_driver.flags &= ~CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING;
637 /* Check for other MacRISC3 machines */ 640 /* Check for other MacRISC3 machines */
638 } else if (of_machine_is_compatible("PowerBook3,4") || 641 } else if (of_machine_is_compatible("PowerBook3,4") ||
639 of_machine_is_compatible("PowerBook3,5") || 642 of_machine_is_compatible("PowerBook3,5") ||
diff --git a/drivers/cpufreq/pmac64-cpufreq.c b/drivers/cpufreq/pmac64-cpufreq.c
index 267e0894c62d..be623dd7b9f2 100644
--- a/drivers/cpufreq/pmac64-cpufreq.c
+++ b/drivers/cpufreq/pmac64-cpufreq.c
@@ -516,7 +516,7 @@ static int __init g5_pm72_cpufreq_init(struct device_node *cpunode)
516 goto bail; 516 goto bail;
517 } 517 }
518 518
519 DBG("cpufreq: i2c clock chip found: %s\n", hwclock->full_name); 519 DBG("cpufreq: i2c clock chip found: %pOF\n", hwclock);
520 520
521 /* Now get all the platform functions */ 521 /* Now get all the platform functions */
522 pfunc_cpu_getfreq = 522 pfunc_cpu_getfreq =
diff --git a/drivers/cpufreq/s5pv210-cpufreq.c b/drivers/cpufreq/s5pv210-cpufreq.c
index f82074eea779..5d31c2db12a3 100644
--- a/drivers/cpufreq/s5pv210-cpufreq.c
+++ b/drivers/cpufreq/s5pv210-cpufreq.c
@@ -602,6 +602,7 @@ static int s5pv210_cpufreq_probe(struct platform_device *pdev)
602 } 602 }
603 603
604 clk_base = of_iomap(np, 0); 604 clk_base = of_iomap(np, 0);
605 of_node_put(np);
605 if (!clk_base) { 606 if (!clk_base) {
606 pr_err("%s: failed to map clock registers\n", __func__); 607 pr_err("%s: failed to map clock registers\n", __func__);
607 return -EFAULT; 608 return -EFAULT;
@@ -612,6 +613,7 @@ static int s5pv210_cpufreq_probe(struct platform_device *pdev)
612 if (id < 0 || id >= ARRAY_SIZE(dmc_base)) { 613 if (id < 0 || id >= ARRAY_SIZE(dmc_base)) {
613 pr_err("%s: failed to get alias of dmc node '%s'\n", 614 pr_err("%s: failed to get alias of dmc node '%s'\n",
614 __func__, np->name); 615 __func__, np->name);
616 of_node_put(np);
615 return id; 617 return id;
616 } 618 }
617 619
@@ -619,6 +621,7 @@ static int s5pv210_cpufreq_probe(struct platform_device *pdev)
619 if (!dmc_base[id]) { 621 if (!dmc_base[id]) {
620 pr_err("%s: failed to map dmc%d registers\n", 622 pr_err("%s: failed to map dmc%d registers\n",
621 __func__, id); 623 __func__, id);
624 of_node_put(np);
622 return -EFAULT; 625 return -EFAULT;
623 } 626 }
624 } 627 }
diff --git a/drivers/cpufreq/sa1100-cpufreq.c b/drivers/cpufreq/sa1100-cpufreq.c
index 728eab77e8e0..e2d8a77c36d5 100644
--- a/drivers/cpufreq/sa1100-cpufreq.c
+++ b/drivers/cpufreq/sa1100-cpufreq.c
@@ -197,11 +197,12 @@ static int sa1100_target(struct cpufreq_policy *policy, unsigned int ppcr)
197 197
198static int __init sa1100_cpu_init(struct cpufreq_policy *policy) 198static int __init sa1100_cpu_init(struct cpufreq_policy *policy)
199{ 199{
200 return cpufreq_generic_init(policy, sa11x0_freq_table, CPUFREQ_ETERNAL); 200 return cpufreq_generic_init(policy, sa11x0_freq_table, 0);
201} 201}
202 202
203static struct cpufreq_driver sa1100_driver __refdata = { 203static struct cpufreq_driver sa1100_driver __refdata = {
204 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK, 204 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK |
205 CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
205 .verify = cpufreq_generic_frequency_table_verify, 206 .verify = cpufreq_generic_frequency_table_verify,
206 .target_index = sa1100_target, 207 .target_index = sa1100_target,
207 .get = sa11x0_getspeed, 208 .get = sa11x0_getspeed,
diff --git a/drivers/cpufreq/sa1110-cpufreq.c b/drivers/cpufreq/sa1110-cpufreq.c
index 2bac9b6cfeea..66e5fb088ecc 100644
--- a/drivers/cpufreq/sa1110-cpufreq.c
+++ b/drivers/cpufreq/sa1110-cpufreq.c
@@ -306,13 +306,14 @@ static int sa1110_target(struct cpufreq_policy *policy, unsigned int ppcr)
306 306
307static int __init sa1110_cpu_init(struct cpufreq_policy *policy) 307static int __init sa1110_cpu_init(struct cpufreq_policy *policy)
308{ 308{
309 return cpufreq_generic_init(policy, sa11x0_freq_table, CPUFREQ_ETERNAL); 309 return cpufreq_generic_init(policy, sa11x0_freq_table, 0);
310} 310}
311 311
312/* sa1110_driver needs __refdata because it must remain after init registers 312/* sa1110_driver needs __refdata because it must remain after init registers
313 * it with cpufreq_register_driver() */ 313 * it with cpufreq_register_driver() */
314static struct cpufreq_driver sa1110_driver __refdata = { 314static struct cpufreq_driver sa1110_driver __refdata = {
315 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK, 315 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK |
316 CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
316 .verify = cpufreq_generic_frequency_table_verify, 317 .verify = cpufreq_generic_frequency_table_verify,
317 .target_index = sa1110_target, 318 .target_index = sa1110_target,
318 .get = sa11x0_getspeed, 319 .get = sa11x0_getspeed,
diff --git a/drivers/cpufreq/sh-cpufreq.c b/drivers/cpufreq/sh-cpufreq.c
index 719c3d9f07fb..28893d435cf5 100644
--- a/drivers/cpufreq/sh-cpufreq.c
+++ b/drivers/cpufreq/sh-cpufreq.c
@@ -137,8 +137,6 @@ static int sh_cpufreq_cpu_init(struct cpufreq_policy *policy)
137 (clk_round_rate(cpuclk, ~0UL) + 500) / 1000; 137 (clk_round_rate(cpuclk, ~0UL) + 500) / 1000;
138 } 138 }
139 139
140 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
141
142 dev_info(dev, "CPU Frequencies - Minimum %u.%03u MHz, " 140 dev_info(dev, "CPU Frequencies - Minimum %u.%03u MHz, "
143 "Maximum %u.%03u MHz.\n", 141 "Maximum %u.%03u MHz.\n",
144 policy->min / 1000, policy->min % 1000, 142 policy->min / 1000, policy->min % 1000,
@@ -159,6 +157,7 @@ static int sh_cpufreq_cpu_exit(struct cpufreq_policy *policy)
159 157
160static struct cpufreq_driver sh_cpufreq_driver = { 158static struct cpufreq_driver sh_cpufreq_driver = {
161 .name = "sh", 159 .name = "sh",
160 .flags = CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
162 .get = sh_cpufreq_get, 161 .get = sh_cpufreq_get,
163 .target = sh_cpufreq_target, 162 .target = sh_cpufreq_target,
164 .verify = sh_cpufreq_verify, 163 .verify = sh_cpufreq_verify,
diff --git a/drivers/cpufreq/speedstep-ich.c b/drivers/cpufreq/speedstep-ich.c
index b86953a3ddc4..0412a246a785 100644
--- a/drivers/cpufreq/speedstep-ich.c
+++ b/drivers/cpufreq/speedstep-ich.c
@@ -207,7 +207,7 @@ static unsigned int speedstep_detect_chipset(void)
207 * 8100 which use a pretty old revision of the 82815 207 * 8100 which use a pretty old revision of the 82815
208 * host bridge. Abort on these systems. 208 * host bridge. Abort on these systems.
209 */ 209 */
210 static struct pci_dev *hostbridge; 210 struct pci_dev *hostbridge;
211 211
212 hostbridge = pci_get_subsys(PCI_VENDOR_ID_INTEL, 212 hostbridge = pci_get_subsys(PCI_VENDOR_ID_INTEL,
213 PCI_DEVICE_ID_INTEL_82815_MC, 213 PCI_DEVICE_ID_INTEL_82815_MC,
diff --git a/drivers/cpufreq/speedstep-lib.c b/drivers/cpufreq/speedstep-lib.c
index 1b8062182c81..ccab452a4ef5 100644
--- a/drivers/cpufreq/speedstep-lib.c
+++ b/drivers/cpufreq/speedstep-lib.c
@@ -35,7 +35,7 @@ static int relaxed_check;
35static unsigned int pentium3_get_frequency(enum speedstep_processor processor) 35static unsigned int pentium3_get_frequency(enum speedstep_processor processor)
36{ 36{
37 /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */ 37 /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */
38 struct { 38 static const struct {
39 unsigned int ratio; /* Frequency Multiplier (x10) */ 39 unsigned int ratio; /* Frequency Multiplier (x10) */
40 u8 bitmap; /* power on configuration bits 40 u8 bitmap; /* power on configuration bits
41 [27, 25:22] (in MSR 0x2a) */ 41 [27, 25:22] (in MSR 0x2a) */
@@ -58,7 +58,7 @@ static unsigned int pentium3_get_frequency(enum speedstep_processor processor)
58 }; 58 };
59 59
60 /* PIII(-M) FSB settings: see table b1-b of 24547206.pdf */ 60 /* PIII(-M) FSB settings: see table b1-b of 24547206.pdf */
61 struct { 61 static const struct {
62 unsigned int value; /* Front Side Bus speed in MHz */ 62 unsigned int value; /* Front Side Bus speed in MHz */
63 u8 bitmap; /* power on configuration bits [18: 19] 63 u8 bitmap; /* power on configuration bits [18: 19]
64 (in MSR 0x2a) */ 64 (in MSR 0x2a) */
diff --git a/drivers/cpufreq/speedstep-smi.c b/drivers/cpufreq/speedstep-smi.c
index 37b30071c220..d23f24ccff38 100644
--- a/drivers/cpufreq/speedstep-smi.c
+++ b/drivers/cpufreq/speedstep-smi.c
@@ -266,7 +266,6 @@ static int speedstep_cpu_init(struct cpufreq_policy *policy)
266 pr_debug("workaround worked.\n"); 266 pr_debug("workaround worked.\n");
267 } 267 }
268 268
269 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
270 return cpufreq_table_validate_and_show(policy, speedstep_freqs); 269 return cpufreq_table_validate_and_show(policy, speedstep_freqs);
271} 270}
272 271
@@ -290,6 +289,7 @@ static int speedstep_resume(struct cpufreq_policy *policy)
290 289
291static struct cpufreq_driver speedstep_driver = { 290static struct cpufreq_driver speedstep_driver = {
292 .name = "speedstep-smi", 291 .name = "speedstep-smi",
292 .flags = CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
293 .verify = cpufreq_generic_frequency_table_verify, 293 .verify = cpufreq_generic_frequency_table_verify,
294 .target_index = speedstep_target, 294 .target_index = speedstep_target,
295 .init = speedstep_cpu_init, 295 .init = speedstep_cpu_init,
diff --git a/drivers/cpufreq/sti-cpufreq.c b/drivers/cpufreq/sti-cpufreq.c
index d2d0430d09d4..47105735df12 100644
--- a/drivers/cpufreq/sti-cpufreq.c
+++ b/drivers/cpufreq/sti-cpufreq.c
@@ -65,8 +65,8 @@ static int sti_cpufreq_fetch_major(void) {
65 ret = of_property_read_u32_index(np, "st,syscfg", 65 ret = of_property_read_u32_index(np, "st,syscfg",
66 MAJOR_ID_INDEX, &major_offset); 66 MAJOR_ID_INDEX, &major_offset);
67 if (ret) { 67 if (ret) {
68 dev_err(dev, "No major number offset provided in %s [%d]\n", 68 dev_err(dev, "No major number offset provided in %pOF [%d]\n",
69 np->full_name, ret); 69 np, ret);
70 return ret; 70 return ret;
71 } 71 }
72 72
@@ -92,8 +92,8 @@ static int sti_cpufreq_fetch_minor(void)
92 MINOR_ID_INDEX, &minor_offset); 92 MINOR_ID_INDEX, &minor_offset);
93 if (ret) { 93 if (ret) {
94 dev_err(dev, 94 dev_err(dev,
95 "No minor number offset provided %s [%d]\n", 95 "No minor number offset provided %pOF [%d]\n",
96 np->full_name, ret); 96 np, ret);
97 return ret; 97 return ret;
98 } 98 }
99 99
diff --git a/drivers/cpufreq/tango-cpufreq.c b/drivers/cpufreq/tango-cpufreq.c
new file mode 100644
index 000000000000..89a7f860bfe8
--- /dev/null
+++ b/drivers/cpufreq/tango-cpufreq.c
@@ -0,0 +1,38 @@
1#include <linux/of.h>
2#include <linux/cpu.h>
3#include <linux/clk.h>
4#include <linux/pm_opp.h>
5#include <linux/platform_device.h>
6
7static const struct of_device_id machines[] __initconst = {
8 { .compatible = "sigma,tango4" },
9 { /* sentinel */ }
10};
11
12static int __init tango_cpufreq_init(void)
13{
14 struct device *cpu_dev = get_cpu_device(0);
15 unsigned long max_freq;
16 struct clk *cpu_clk;
17 void *res;
18
19 if (!of_match_node(machines, of_root))
20 return -ENODEV;
21
22 cpu_clk = clk_get(cpu_dev, NULL);
23 if (IS_ERR(cpu_clk))
24 return -ENODEV;
25
26 max_freq = clk_get_rate(cpu_clk);
27
28 dev_pm_opp_add(cpu_dev, max_freq / 1, 0);
29 dev_pm_opp_add(cpu_dev, max_freq / 2, 0);
30 dev_pm_opp_add(cpu_dev, max_freq / 3, 0);
31 dev_pm_opp_add(cpu_dev, max_freq / 5, 0);
32 dev_pm_opp_add(cpu_dev, max_freq / 9, 0);
33
34 res = platform_device_register_data(NULL, "cpufreq-dt", -1, NULL, 0);
35
36 return PTR_ERR_OR_ZERO(res);
37}
38device_initcall(tango_cpufreq_init);
diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
index a7b5658c0460..b29cd3398463 100644
--- a/drivers/cpufreq/ti-cpufreq.c
+++ b/drivers/cpufreq/ti-cpufreq.c
@@ -245,8 +245,6 @@ static int ti_cpufreq_init(void)
245 if (ret) 245 if (ret)
246 goto fail_put_node; 246 goto fail_put_node;
247 247
248 of_node_put(opp_data->opp_node);
249
250 ret = PTR_ERR_OR_ZERO(dev_pm_opp_set_supported_hw(opp_data->cpu_dev, 248 ret = PTR_ERR_OR_ZERO(dev_pm_opp_set_supported_hw(opp_data->cpu_dev,
251 version, VERSION_COUNT)); 249 version, VERSION_COUNT));
252 if (ret) { 250 if (ret) {
@@ -255,6 +253,8 @@ static int ti_cpufreq_init(void)
255 goto fail_put_node; 253 goto fail_put_node;
256 } 254 }
257 255
256 of_node_put(opp_data->opp_node);
257
258register_cpufreq_dt: 258register_cpufreq_dt:
259 platform_device_register_simple("cpufreq-dt", -1, NULL, 0); 259 platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
260 260
diff --git a/drivers/cpufreq/unicore2-cpufreq.c b/drivers/cpufreq/unicore2-cpufreq.c
index 6f9dfa80563a..db62d9844751 100644
--- a/drivers/cpufreq/unicore2-cpufreq.c
+++ b/drivers/cpufreq/unicore2-cpufreq.c
@@ -58,13 +58,12 @@ static int __init ucv2_cpu_init(struct cpufreq_policy *policy)
58 58
59 policy->min = policy->cpuinfo.min_freq = 250000; 59 policy->min = policy->cpuinfo.min_freq = 250000;
60 policy->max = policy->cpuinfo.max_freq = 1000000; 60 policy->max = policy->cpuinfo.max_freq = 1000000;
61 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
62 policy->clk = clk_get(NULL, "MAIN_CLK"); 61 policy->clk = clk_get(NULL, "MAIN_CLK");
63 return PTR_ERR_OR_ZERO(policy->clk); 62 return PTR_ERR_OR_ZERO(policy->clk);
64} 63}
65 64
66static struct cpufreq_driver ucv2_driver = { 65static struct cpufreq_driver ucv2_driver = {
67 .flags = CPUFREQ_STICKY, 66 .flags = CPUFREQ_STICKY | CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
68 .verify = ucv2_verify_speed, 67 .verify = ucv2_verify_speed,
69 .target = ucv2_target, 68 .target = ucv2_target,
70 .get = cpufreq_generic_get, 69 .get = cpufreq_generic_get,
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index 5c739ac752e8..5970b8def548 100644
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -33,7 +33,6 @@
33#include <linux/mfd/abx500/ab8500.h> 33#include <linux/mfd/abx500/ab8500.h>
34#include <linux/regulator/db8500-prcmu.h> 34#include <linux/regulator/db8500-prcmu.h>
35#include <linux/regulator/machine.h> 35#include <linux/regulator/machine.h>
36#include <linux/cpufreq.h>
37#include <linux/platform_data/ux500_wdt.h> 36#include <linux/platform_data/ux500_wdt.h>
38#include <linux/platform_data/db8500_thermal.h> 37#include <linux/platform_data/db8500_thermal.h>
39#include "dbx500-prcmu-regs.h" 38#include "dbx500-prcmu-regs.h"
@@ -1692,32 +1691,27 @@ static long round_clock_rate(u8 clock, unsigned long rate)
1692 return rounded_rate; 1691 return rounded_rate;
1693} 1692}
1694 1693
1695/* CPU FREQ table, may be changed due to if MAX_OPP is supported. */ 1694static const unsigned long armss_freqs[] = {
1696static struct cpufreq_frequency_table db8500_cpufreq_table[] = { 1695 200000000,
1697 { .frequency = 200000, .driver_data = ARM_EXTCLK,}, 1696 400000000,
1698 { .frequency = 400000, .driver_data = ARM_50_OPP,}, 1697 800000000,
1699 { .frequency = 800000, .driver_data = ARM_100_OPP,}, 1698 998400000
1700 { .frequency = CPUFREQ_TABLE_END,}, /* To be used for MAX_OPP. */
1701 { .frequency = CPUFREQ_TABLE_END,},
1702}; 1699};
1703 1700
1704static long round_armss_rate(unsigned long rate) 1701static long round_armss_rate(unsigned long rate)
1705{ 1702{
1706 struct cpufreq_frequency_table *pos; 1703 unsigned long freq = 0;
1707 long freq = 0; 1704 int i;
1708
1709 /* cpufreq table frequencies is in KHz. */
1710 rate = rate / 1000;
1711 1705
1712 /* Find the corresponding arm opp from the cpufreq table. */ 1706 /* Find the corresponding arm opp from the cpufreq table. */
1713 cpufreq_for_each_entry(pos, db8500_cpufreq_table) { 1707 for (i = 0; i < ARRAY_SIZE(armss_freqs); i++) {
1714 freq = pos->frequency; 1708 freq = armss_freqs[i];
1715 if (freq == rate) 1709 if (rate <= freq)
1716 break; 1710 break;
1717 } 1711 }
1718 1712
1719 /* Return the last valid value, even if a match was not found. */ 1713 /* Return the last valid value, even if a match was not found. */
1720 return freq * 1000; 1714 return freq;
1721} 1715}
1722 1716
1723#define MIN_PLL_VCO_RATE 600000000ULL 1717#define MIN_PLL_VCO_RATE 600000000ULL
@@ -1854,21 +1848,23 @@ static void set_clock_rate(u8 clock, unsigned long rate)
1854 1848
1855static int set_armss_rate(unsigned long rate) 1849static int set_armss_rate(unsigned long rate)
1856{ 1850{
1857 struct cpufreq_frequency_table *pos; 1851 unsigned long freq;
1858 1852 u8 opps[] = { ARM_EXTCLK, ARM_50_OPP, ARM_100_OPP, ARM_MAX_OPP };
1859 /* cpufreq table frequencies is in KHz. */ 1853 int i;
1860 rate = rate / 1000;
1861 1854
1862 /* Find the corresponding arm opp from the cpufreq table. */ 1855 /* Find the corresponding arm opp from the cpufreq table. */
1863 cpufreq_for_each_entry(pos, db8500_cpufreq_table) 1856 for (i = 0; i < ARRAY_SIZE(armss_freqs); i++) {
1864 if (pos->frequency == rate) 1857 freq = armss_freqs[i];
1858 if (rate == freq)
1865 break; 1859 break;
1860 }
1866 1861
1867 if (pos->frequency != rate) 1862 if (rate != freq)
1868 return -EINVAL; 1863 return -EINVAL;
1869 1864
1870 /* Set the new arm opp. */ 1865 /* Set the new arm opp. */
1871 return db8500_prcmu_set_arm_opp(pos->driver_data); 1866 pr_debug("SET ARM OPP 0x%02x\n", opps[i]);
1867 return db8500_prcmu_set_arm_opp(opps[i]);
1872} 1868}
1873 1869
1874static int set_plldsi_rate(unsigned long rate) 1870static int set_plldsi_rate(unsigned long rate)
@@ -3049,12 +3045,6 @@ static const struct mfd_cell db8500_prcmu_devs[] = {
3049 .pdata_size = sizeof(db8500_regulators), 3045 .pdata_size = sizeof(db8500_regulators),
3050 }, 3046 },
3051 { 3047 {
3052 .name = "cpufreq-ux500",
3053 .of_compatible = "stericsson,cpufreq-ux500",
3054 .platform_data = &db8500_cpufreq_table,
3055 .pdata_size = sizeof(db8500_cpufreq_table),
3056 },
3057 {
3058 .name = "cpuidle-dbx500", 3048 .name = "cpuidle-dbx500",
3059 .of_compatible = "stericsson,cpuidle-dbx500", 3049 .of_compatible = "stericsson,cpuidle-dbx500",
3060 }, 3050 },
@@ -3067,14 +3057,6 @@ static const struct mfd_cell db8500_prcmu_devs[] = {
3067 }, 3057 },
3068}; 3058};
3069 3059
3070static void db8500_prcmu_update_cpufreq(void)
3071{
3072 if (prcmu_has_arm_maxopp()) {
3073 db8500_cpufreq_table[3].frequency = 1000000;
3074 db8500_cpufreq_table[3].driver_data = ARM_MAX_OPP;
3075 }
3076}
3077
3078static int db8500_prcmu_register_ab8500(struct device *parent) 3060static int db8500_prcmu_register_ab8500(struct device *parent)
3079{ 3061{
3080 struct device_node *np; 3062 struct device_node *np;
@@ -3160,8 +3142,6 @@ static int db8500_prcmu_probe(struct platform_device *pdev)
3160 3142
3161 prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET); 3143 prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET);
3162 3144
3163 db8500_prcmu_update_cpufreq();
3164
3165 err = mfd_add_devices(&pdev->dev, 0, common_prcmu_devs, 3145 err = mfd_add_devices(&pdev->dev, 0, common_prcmu_devs,
3166 ARRAY_SIZE(common_prcmu_devs), NULL, 0, db8500_irq_domain); 3146 ARRAY_SIZE(common_prcmu_devs), NULL, 0, db8500_irq_domain);
3167 if (err) { 3147 if (err) {
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index f10a9b3761cd..5f40522ec98c 100644
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -370,6 +370,12 @@ struct cpufreq_driver {
370 */ 370 */
371#define CPUFREQ_NEED_INITIAL_FREQ_CHECK (1 << 5) 371#define CPUFREQ_NEED_INITIAL_FREQ_CHECK (1 << 5)
372 372
373/*
374 * Set by drivers to disallow use of governors with "dynamic_switching" flag
375 * set.
376 */
377#define CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING (1 << 6)
378
373int cpufreq_register_driver(struct cpufreq_driver *driver_data); 379int cpufreq_register_driver(struct cpufreq_driver *driver_data);
374int cpufreq_unregister_driver(struct cpufreq_driver *driver_data); 380int cpufreq_unregister_driver(struct cpufreq_driver *driver_data);
375 381
@@ -487,14 +493,8 @@ static inline unsigned long cpufreq_scale(unsigned long old, u_int div,
487 * polling frequency is 1000 times the transition latency of the processor. The 493 * polling frequency is 1000 times the transition latency of the processor. The
488 * ondemand governor will work on any processor with transition latency <= 10ms, 494 * ondemand governor will work on any processor with transition latency <= 10ms,
489 * using appropriate sampling rate. 495 * using appropriate sampling rate.
490 *
491 * For CPUs with transition latency > 10ms (mostly drivers with CPUFREQ_ETERNAL)
492 * the ondemand governor will not work. All times here are in us (microseconds).
493 */ 496 */
494#define MIN_SAMPLING_RATE_RATIO (2)
495#define LATENCY_MULTIPLIER (1000) 497#define LATENCY_MULTIPLIER (1000)
496#define MIN_LATENCY_MULTIPLIER (20)
497#define TRANSITION_LATENCY_LIMIT (10 * 1000 * 1000)
498 498
499struct cpufreq_governor { 499struct cpufreq_governor {
500 char name[CPUFREQ_NAME_LEN]; 500 char name[CPUFREQ_NAME_LEN];
@@ -507,9 +507,8 @@ struct cpufreq_governor {
507 char *buf); 507 char *buf);
508 int (*store_setspeed) (struct cpufreq_policy *policy, 508 int (*store_setspeed) (struct cpufreq_policy *policy,
509 unsigned int freq); 509 unsigned int freq);
510 unsigned int max_transition_latency; /* HW must be able to switch to 510 /* For governors which change frequency dynamically by themselves */
511 next freq faster than this value in nano secs or we 511 bool dynamic_switching;
512 will fallback to performance governor */
513 struct list_head governor_list; 512 struct list_head governor_list;
514 struct module *owner; 513 struct module *owner;
515}; 514};
@@ -525,6 +524,7 @@ int __cpufreq_driver_target(struct cpufreq_policy *policy,
525 unsigned int relation); 524 unsigned int relation);
526unsigned int cpufreq_driver_resolve_freq(struct cpufreq_policy *policy, 525unsigned int cpufreq_driver_resolve_freq(struct cpufreq_policy *policy,
527 unsigned int target_freq); 526 unsigned int target_freq);
527unsigned int cpufreq_policy_transition_delay_us(struct cpufreq_policy *policy);
528int cpufreq_register_governor(struct cpufreq_governor *governor); 528int cpufreq_register_governor(struct cpufreq_governor *governor);
529void cpufreq_unregister_governor(struct cpufreq_governor *governor); 529void cpufreq_unregister_governor(struct cpufreq_governor *governor);
530 530
diff --git a/kernel/sched/cpufreq_schedutil.c b/kernel/sched/cpufreq_schedutil.c
index 29a397067ffa..45fcf21ad685 100644
--- a/kernel/sched/cpufreq_schedutil.c
+++ b/kernel/sched/cpufreq_schedutil.c
@@ -528,16 +528,7 @@ static int sugov_init(struct cpufreq_policy *policy)
528 goto stop_kthread; 528 goto stop_kthread;
529 } 529 }
530 530
531 if (policy->transition_delay_us) { 531 tunables->rate_limit_us = cpufreq_policy_transition_delay_us(policy);
532 tunables->rate_limit_us = policy->transition_delay_us;
533 } else {
534 unsigned int lat;
535
536 tunables->rate_limit_us = LATENCY_MULTIPLIER;
537 lat = policy->cpuinfo.transition_latency / NSEC_PER_USEC;
538 if (lat)
539 tunables->rate_limit_us *= lat;
540 }
541 532
542 policy->governor_data = sg_policy; 533 policy->governor_data = sg_policy;
543 sg_policy->tunables = tunables; 534 sg_policy->tunables = tunables;
@@ -655,6 +646,7 @@ static void sugov_limits(struct cpufreq_policy *policy)
655static struct cpufreq_governor schedutil_gov = { 646static struct cpufreq_governor schedutil_gov = {
656 .name = "schedutil", 647 .name = "schedutil",
657 .owner = THIS_MODULE, 648 .owner = THIS_MODULE,
649 .dynamic_switching = true,
658 .init = sugov_init, 650 .init = sugov_init,
659 .exit = sugov_exit, 651 .exit = sugov_exit,
660 .start = sugov_start, 652 .start = sugov_start,
generated by cgit v1.2.2 (git 2.25.0) at 2026-04-07 02:28:57 -0400