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authorCristian Stoica <cristian.stoica@freescale.com>2016-05-19 11:11:18 -0400
committerHerbert Xu <herbert@gondor.apana.org.au>2016-05-31 04:41:53 -0400
commitbd52f1c23255a7c355268215c3c75aabbe11a67a (patch)
tree8bdcc1b3c872e0f8749d0506625b48caf0e2134f
parentd54fc90cc9723d73eef25d09efcef412a6c89d60 (diff)
crypto: caam - fix offset field in hw sg entries
The offset field is 13 bits wide; make sure we don't overwrite more than that in the caam hardware scatter gather structure. Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-rw-r--r--drivers/crypto/caam/desc.h2
-rw-r--r--drivers/crypto/caam/sg_sw_sec4.h8
2 files changed, 5 insertions, 5 deletions
diff --git a/drivers/crypto/caam/desc.h b/drivers/crypto/caam/desc.h
index 1e93c6af2275..fe30ff69088c 100644
--- a/drivers/crypto/caam/desc.h
+++ b/drivers/crypto/caam/desc.h
@@ -20,7 +20,7 @@
20#define SEC4_SG_BPID_MASK 0x000000ff 20#define SEC4_SG_BPID_MASK 0x000000ff
21#define SEC4_SG_BPID_SHIFT 16 21#define SEC4_SG_BPID_SHIFT 16
22#define SEC4_SG_LEN_MASK 0x3fffffff /* Excludes EXT and FINAL */ 22#define SEC4_SG_LEN_MASK 0x3fffffff /* Excludes EXT and FINAL */
23#define SEC4_SG_OFFS_MASK 0x00001fff 23#define SEC4_SG_OFFSET_MASK 0x00001fff
24 24
25struct sec4_sg_entry { 25struct sec4_sg_entry {
26#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_IMX 26#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_IMX
diff --git a/drivers/crypto/caam/sg_sw_sec4.h b/drivers/crypto/caam/sg_sw_sec4.h
index 12ec6616e89d..2311341b7356 100644
--- a/drivers/crypto/caam/sg_sw_sec4.h
+++ b/drivers/crypto/caam/sg_sw_sec4.h
@@ -11,12 +11,12 @@ struct sec4_sg_entry;
11 * convert single dma address to h/w link table format 11 * convert single dma address to h/w link table format
12 */ 12 */
13static inline void dma_to_sec4_sg_one(struct sec4_sg_entry *sec4_sg_ptr, 13static inline void dma_to_sec4_sg_one(struct sec4_sg_entry *sec4_sg_ptr,
14 dma_addr_t dma, u32 len, u32 offset) 14 dma_addr_t dma, u32 len, u16 offset)
15{ 15{
16 sec4_sg_ptr->ptr = dma; 16 sec4_sg_ptr->ptr = dma;
17 sec4_sg_ptr->len = len; 17 sec4_sg_ptr->len = len;
18 sec4_sg_ptr->buf_pool_id = 0; 18 sec4_sg_ptr->buf_pool_id = 0;
19 sec4_sg_ptr->offset = offset; 19 sec4_sg_ptr->offset = offset & SEC4_SG_OFFSET_MASK;
20#ifdef DEBUG 20#ifdef DEBUG
21 print_hex_dump(KERN_ERR, "sec4_sg_ptr@: ", 21 print_hex_dump(KERN_ERR, "sec4_sg_ptr@: ",
22 DUMP_PREFIX_ADDRESS, 16, 4, sec4_sg_ptr, 22 DUMP_PREFIX_ADDRESS, 16, 4, sec4_sg_ptr,
@@ -30,7 +30,7 @@ static inline void dma_to_sec4_sg_one(struct sec4_sg_entry *sec4_sg_ptr,
30 */ 30 */
31static inline struct sec4_sg_entry * 31static inline struct sec4_sg_entry *
32sg_to_sec4_sg(struct scatterlist *sg, int sg_count, 32sg_to_sec4_sg(struct scatterlist *sg, int sg_count,
33 struct sec4_sg_entry *sec4_sg_ptr, u32 offset) 33 struct sec4_sg_entry *sec4_sg_ptr, u16 offset)
34{ 34{
35 while (sg_count) { 35 while (sg_count) {
36 dma_to_sec4_sg_one(sec4_sg_ptr, sg_dma_address(sg), 36 dma_to_sec4_sg_one(sec4_sg_ptr, sg_dma_address(sg),
@@ -48,7 +48,7 @@ sg_to_sec4_sg(struct scatterlist *sg, int sg_count,
48 */ 48 */
49static inline void sg_to_sec4_sg_last(struct scatterlist *sg, int sg_count, 49static inline void sg_to_sec4_sg_last(struct scatterlist *sg, int sg_count,
50 struct sec4_sg_entry *sec4_sg_ptr, 50 struct sec4_sg_entry *sec4_sg_ptr,
51 u32 offset) 51 u16 offset)
52{ 52{
53 sec4_sg_ptr = sg_to_sec4_sg(sg, sg_count, sec4_sg_ptr, offset); 53 sec4_sg_ptr = sg_to_sec4_sg(sg, sg_count, sec4_sg_ptr, offset);
54 sec4_sg_ptr->len |= SEC4_SG_LEN_FIN; 54 sec4_sg_ptr->len |= SEC4_SG_LEN_FIN;