diff options
author | Ulrich Hecht <uli+renesas@fpond.eu> | 2018-09-25 12:33:37 -0400 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2018-09-26 05:16:41 -0400 |
commit | bcf3003438ea464594f668a61cf2344a7f82f91c (patch) | |
tree | 747e67213a87fe2a7e8dc201dd7450342145806c | |
parent | 74fe39abbf745737754effe64f5f6c574fbb1412 (diff) |
arm64: dts: renesas: r8a77995: draak: Enable HDMI display output
Adds LVDS decoder, HDMI encoder and connector for the Draak board.
The LVDS0 and LVDS1 encoders can use the DU_DOTCLKIN0, DU_DOTCLKIN1 and
EXTAL externals clocks. Two of them are provided to the SoC on the Draak
board, hook them up in DT.
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 98 |
1 files changed, 97 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index e39b73005381..2405eaad0296 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts | |||
@@ -2,7 +2,7 @@ | |||
2 | /* | 2 | /* |
3 | * Device Tree Source for the Draak board | 3 | * Device Tree Source for the Draak board |
4 | * | 4 | * |
5 | * Copyright (C) 2016 Renesas Electronics Corp. | 5 | * Copyright (C) 2016-2018 Renesas Electronics Corp. |
6 | * Copyright (C) 2017 Glider bvba | 6 | * Copyright (C) 2017 Glider bvba |
7 | */ | 7 | */ |
8 | 8 | ||
@@ -45,6 +45,41 @@ | |||
45 | }; | 45 | }; |
46 | }; | 46 | }; |
47 | 47 | ||
48 | hdmi-out { | ||
49 | compatible = "hdmi-connector"; | ||
50 | type = "a"; | ||
51 | |||
52 | port { | ||
53 | hdmi_con_out: endpoint { | ||
54 | remote-endpoint = <&adv7511_out>; | ||
55 | }; | ||
56 | }; | ||
57 | }; | ||
58 | |||
59 | lvds-decoder { | ||
60 | compatible = "thine,thc63lvd1024"; | ||
61 | vcc-supply = <®_3p3v>; | ||
62 | |||
63 | ports { | ||
64 | #address-cells = <1>; | ||
65 | #size-cells = <0>; | ||
66 | |||
67 | port@0 { | ||
68 | reg = <0>; | ||
69 | thc63lvd1024_in: endpoint { | ||
70 | remote-endpoint = <&lvds0_out>; | ||
71 | }; | ||
72 | }; | ||
73 | |||
74 | port@2 { | ||
75 | reg = <2>; | ||
76 | thc63lvd1024_out: endpoint { | ||
77 | remote-endpoint = <&adv7511_in>; | ||
78 | }; | ||
79 | }; | ||
80 | }; | ||
81 | }; | ||
82 | |||
48 | memory@48000000 { | 83 | memory@48000000 { |
49 | device_type = "memory"; | 84 | device_type = "memory"; |
50 | /* first 128MB is reserved for secure area. */ | 85 | /* first 128MB is reserved for secure area. */ |
@@ -190,6 +225,43 @@ | |||
190 | 225 | ||
191 | }; | 226 | }; |
192 | 227 | ||
228 | hdmi-encoder@39 { | ||
229 | compatible = "adi,adv7511w"; | ||
230 | reg = <0x39>, <0x3f>, <0x38>, <0x3c>; | ||
231 | reg-names = "main", "edid", "packet", "cec"; | ||
232 | interrupt-parent = <&gpio1>; | ||
233 | interrupts = <28 IRQ_TYPE_LEVEL_LOW>; | ||
234 | |||
235 | /* Depends on LVDS */ | ||
236 | max-clock = <135000000>; | ||
237 | min-vrefresh = <50>; | ||
238 | |||
239 | adi,input-depth = <8>; | ||
240 | adi,input-colorspace = "rgb"; | ||
241 | adi,input-clock = "1x"; | ||
242 | adi,input-style = <1>; | ||
243 | adi,input-justification = "evenly"; | ||
244 | |||
245 | ports { | ||
246 | #address-cells = <1>; | ||
247 | #size-cells = <0>; | ||
248 | |||
249 | port@0 { | ||
250 | reg = <0>; | ||
251 | adv7511_in: endpoint { | ||
252 | remote-endpoint = <&thc63lvd1024_out>; | ||
253 | }; | ||
254 | }; | ||
255 | |||
256 | port@1 { | ||
257 | reg = <1>; | ||
258 | adv7511_out: endpoint { | ||
259 | remote-endpoint = <&hdmi_con_out>; | ||
260 | }; | ||
261 | }; | ||
262 | }; | ||
263 | }; | ||
264 | |||
193 | hdmi-decoder@4c { | 265 | hdmi-decoder@4c { |
194 | compatible = "adi,adv7612"; | 266 | compatible = "adi,adv7612"; |
195 | reg = <0x4c>; | 267 | reg = <0x4c>; |
@@ -240,6 +312,30 @@ | |||
240 | status = "okay"; | 312 | status = "okay"; |
241 | }; | 313 | }; |
242 | 314 | ||
315 | &lvds0 { | ||
316 | status = "okay"; | ||
317 | |||
318 | clocks = <&cpg CPG_MOD 727>, | ||
319 | <&x12_clk>, | ||
320 | <&extal_clk>; | ||
321 | clock-names = "fck", "dclkin.0", "extal"; | ||
322 | |||
323 | ports { | ||
324 | port@1 { | ||
325 | lvds0_out: endpoint { | ||
326 | remote-endpoint = <&thc63lvd1024_in>; | ||
327 | }; | ||
328 | }; | ||
329 | }; | ||
330 | }; | ||
331 | |||
332 | &lvds1 { | ||
333 | clocks = <&cpg CPG_MOD 727>, | ||
334 | <&x12_clk>, | ||
335 | <&extal_clk>; | ||
336 | clock-names = "fck", "dclkin.0", "extal"; | ||
337 | }; | ||
338 | |||
243 | &ohci0 { | 339 | &ohci0 { |
244 | status = "okay"; | 340 | status = "okay"; |
245 | }; | 341 | }; |