perf tools: Add Intel PT support for PSB periods

The PSB packet is a synchronization packet that provides a starting
point for decoding or recovery from errors.

This patch adds support for a new Intel PT feature that allows the
frequency of PSB packets to be specified.

Support for this feature is indicated by
/sys/bus/event_source/devices/intel_pt/caps/psb_cyc which contains "1"
if the feature is supported and "0" otherwise.

The PSB period can be specified as a PMU config term e.g. perf record -e
intel_pt/psb_period=2/u sleep 1

The default value is 3 or the nearest lower value that is supported.  0
is always supported.

Valid values are given by:

/sys/bus/event_source/devices/intel_pt/caps/psb_periods

which contains a hexadecimal value, the bits of which represent valid
values e.g. bit 2 set means value 2 is valid.

The value is converted to the approximate number of trace bytes between
PSB packets as:

	2 ^ (value + 11)

e.g. value 3 means 16KiB bytes between PSBs

If an invalid value is entered, the error message will give a list of
valid values e.g.

	$ perf record -e intel_pt/psb_period=15/u uname
	Invalid psb_period for intel_pt. Valid values are: 0-5

tools/perf/Documentation/intel-pt.txt is updated in a later patch as
there are a number of new features being added.

For more information about PSB periods refer to the Intel 64 and IA-32
Architectures SDM Chapter 36 Intel Processor Trace from June 2015 or
later.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Link: http://lkml.kernel.org/r/1437150840-31811-18-git-send-email-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

1 files changed, 210 insertions, 7 deletions

diff --git a/tools/perf/arch/x86/util/intel-pt.c b/tools/perf/arch/x86/util/intel-pt.c
index da7d2c15e611..145975b003a7 100644
--- a/tools/perf/arch/x86/util/intel-pt.c
+++ b/tools/perf/arch/x86/util/intel-pt.c
@@ -99,17 +99,121 @@ static int intel_pt_parse_terms(struct list_head *formats, const char *str,
         return intel_pt_parse_terms_with_default(formats, str, config);
 }
 
-static size_t intel_pt_psb_period(struct perf_pmu *intel_pt_pmu __maybe_unused,
-                                  struct perf_evlist *evlist __maybe_unused)
+static u64 intel_pt_masked_bits(u64 mask, u64 bits)
 {
-        return 256;
+        const u64 top_bit = 1ULL << 63;
+        u64 res = 0;
+        int i;
+
+        for (i = 0; i < 64; i++) {
+                if (mask & top_bit) {
+                        res <<= 1;
+                        if (bits & top_bit)
+                                res |= 1;
+                }
+                mask <<= 1;
+                bits <<= 1;
+        }
+
+        return res;
+}
+
+static int intel_pt_read_config(struct perf_pmu *intel_pt_pmu, const char *str,
+                                struct perf_evlist *evlist, u64 *res)
+{
+        struct perf_evsel *evsel;
+        u64 mask;
+
+        *res = 0;
+
+        mask = perf_pmu__format_bits(&intel_pt_pmu->format, str);
+        if (!mask)
+                return -EINVAL;
+
+        evlist__for_each(evlist, evsel) {
+                if (evsel->attr.type == intel_pt_pmu->type) {
+                        *res = intel_pt_masked_bits(mask, evsel->attr.config);
+                        return 0;
+                }
+        }
+
+        return -EINVAL;
+}
+
+static size_t intel_pt_psb_period(struct perf_pmu *intel_pt_pmu,
+                                  struct perf_evlist *evlist)
+{
+        u64 val;
+        int err, topa_multiple_entries;
+        size_t psb_period;
+
+        if (perf_pmu__scan_file(intel_pt_pmu, "caps/topa_multiple_entries",
+                                "%d", &topa_multiple_entries) != 1)
+                topa_multiple_entries = 0;
+
+        /*
+         * Use caps/topa_multiple_entries to indicate early hardware that had
+         * extra frequent PSBs.
+         */
+        if (!topa_multiple_entries) {
+                psb_period = 256;
+                goto out;
+        }
+
+        err = intel_pt_read_config(intel_pt_pmu, "psb_period", evlist, &val);
+        if (err)
+                val = 0;
+
+        psb_period = 1 << (val + 11);
+out:
+        pr_debug2("%s psb_period %zu\n", intel_pt_pmu->name, psb_period);
+        return psb_period;
+}
+
+static int intel_pt_pick_bit(int bits, int target)
+{
+        int pos, pick = -1;
+
+        for (pos = 0; bits; bits >>= 1, pos++) {
+                if (bits & 1) {
+                        if (pos <= target || pick < 0)
+                                pick = pos;
+                        if (pos >= target)
+                                break;
+                }
+        }
+
+        return pick;
 }
 
 static u64 intel_pt_default_config(struct perf_pmu *intel_pt_pmu)
 {
+        char buf[256];
+        int psb_cyc, psb_periods, psb_period;
+        int pos = 0;
         u64 config;
 
-        intel_pt_parse_terms(&intel_pt_pmu->format, "tsc", &config);
+        pos += scnprintf(buf + pos, sizeof(buf) - pos, "tsc");
+
+        if (perf_pmu__scan_file(intel_pt_pmu, "caps/psb_cyc", "%d",
+                                &psb_cyc) != 1)
+                psb_cyc = 1;
+
+        if (psb_cyc) {
+                if (perf_pmu__scan_file(intel_pt_pmu, "caps/psb_periods", "%x",
+                                        &psb_periods) != 1)
+                        psb_periods = 0;
+                if (psb_periods) {
+                        psb_period = intel_pt_pick_bit(psb_periods, 3);
+                        pos += scnprintf(buf + pos, sizeof(buf) - pos,
+                                         ",psb_period=%d", psb_period);
+                }
+        }
+
+        pr_debug2("%s default config: %s\n", intel_pt_pmu->name, buf);
+
+        intel_pt_parse_terms(&intel_pt_pmu->format, buf, &config);
+
         return config;
 }
 
@@ -239,6 +343,103 @@ static int intel_pt_track_switches(struct perf_evlist *evlist)
         return 0;
 }
 
+static void intel_pt_valid_str(char *str, size_t len, u64 valid)
+{
+        unsigned int val, last = 0, state = 1;
+        int p = 0;
+
+        str[0] = '\0';
+
+        for (val = 0; val <= 64; val++, valid >>= 1) {
+                if (valid & 1) {
+                        last = val;
+                        switch (state) {
+                        case 0:
+                                p += scnprintf(str + p, len - p, ",");
+                                /* Fall through */
+                        case 1:
+                                p += scnprintf(str + p, len - p, "%u", val);
+                                state = 2;
+                                break;
+                        case 2:
+                                state = 3;
+                                break;
+                        case 3:
+                                state = 4;
+                                break;
+                        default:
+                                break;
+                        }
+                } else {
+                        switch (state) {
+                        case 3:
+                                p += scnprintf(str + p, len - p, ",%u", last);
+                                state = 0;
+                                break;
+                        case 4:
+                                p += scnprintf(str + p, len - p, "-%u", last);
+                                state = 0;
+                                break;
+                        default:
+                                break;
+                        }
+                        if (state != 1)
+                                state = 0;
+                }
+        }
+}
+
+static int intel_pt_val_config_term(struct perf_pmu *intel_pt_pmu,
+                                    const char *caps, const char *name,
+                                    const char *supported, u64 config)
+{
+        char valid_str[256];
+        unsigned int shift;
+        unsigned long long valid;
+        u64 bits;
+        int ok;
+
+        if (perf_pmu__scan_file(intel_pt_pmu, caps, "%llx", &valid) != 1)
+                valid = 0;
+
+        if (supported &&
+            perf_pmu__scan_file(intel_pt_pmu, supported, "%d", &ok) == 1 && !ok)