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authorHelge Deller <deller@gmx.de>2017-11-13 10:07:40 -0500
committerHelge Deller <deller@gmx.de>2017-11-17 09:27:42 -0500
commitbc5a768e567df51f43778da381477f6555f3824c (patch)
treed948697e87b0d07226930f131a4b7a000769b70e
parent3744d988c05a27f40408003352841aefadba1324 (diff)
parisc: Make some PDC structures accessible in uapi headers
While working on a qemu and SeaBIOS-port to parisc, those PDC structures are useful to have accessible from userspace. Signed-off-by: Helge Deller <deller@gmx.de>
Diffstat
-rw-r--r--arch/parisc/include/asm/pdc.h255
-rw-r--r--arch/parisc/include/uapi/asm/pdc.h256
2 files changed, 250 insertions, 261 deletions
diff --git a/arch/parisc/include/asm/pdc.h b/arch/parisc/include/asm/pdc.h
index efee44a5e063..339e83ddb39e 100644
--- a/arch/parisc/include/asm/pdc.h
+++ b/arch/parisc/include/asm/pdc.h
@@ -18,261 +18,6 @@ extern unsigned long parisc_cell_loc; /* cell location of CPU (PAT) */
18#define PDC_TYPE_SYSTEM_MAP 1 /* 32-bit, but supports PDC_SYSTEM_MAP */ 18#define PDC_TYPE_SYSTEM_MAP 1 /* 32-bit, but supports PDC_SYSTEM_MAP */
19#define PDC_TYPE_SNAKE 2 /* Doesn't support SYSTEM_MAP */ 19#define PDC_TYPE_SNAKE 2 /* Doesn't support SYSTEM_MAP */
20 20
21struct pdc_chassis_info { /* for PDC_CHASSIS_INFO */
22 unsigned long actcnt; /* actual number of bytes returned */
23 unsigned long maxcnt; /* maximum number of bytes that could be returned */
24};
25
26struct pdc_coproc_cfg { /* for PDC_COPROC_CFG */
27 unsigned long ccr_functional;
28 unsigned long ccr_present;
29 unsigned long revision;
30 unsigned long model;
31};
32
33struct pdc_model { /* for PDC_MODEL */
34 unsigned long hversion;
35 unsigned long sversion;
36 unsigned long hw_id;
37 unsigned long boot_id;
38 unsigned long sw_id;
39 unsigned long sw_cap;
40 unsigned long arch_rev;
41 unsigned long pot_key;
42 unsigned long curr_key;
43};
44
45struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
46 unsigned long
47#ifdef CONFIG_64BIT
48 cc_padW:32,
49#endif
50 cc_alias: 4, /* alias boundaries for virtual addresses */
51 cc_block: 4, /* to determine most efficient stride */
52 cc_line : 3, /* maximum amount written back as a result of store (multiple of 16 bytes) */
53 cc_shift: 2, /* how much to shift cc_block left */
54 cc_wt : 1, /* 0 = WT-Dcache, 1 = WB-Dcache */
55 cc_sh : 2, /* 0 = separate I/D-cache, else shared I/D-cache */
56 cc_cst : 3, /* 0 = incoherent D-cache, 1=coherent D-cache */
57 cc_pad1 : 10, /* reserved */
58 cc_hv : 3; /* hversion dependent */
59};
60
61struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */
62 unsigned long tc_pad0:12, /* reserved */
63#ifdef CONFIG_64BIT
64 tc_padW:32,
65#endif
66 tc_sh : 2, /* 0 = separate I/D-TLB, else shared I/D-TLB */
67 tc_hv : 1, /* HV */
68 tc_page : 1, /* 0 = 2K page-size-machine, 1 = 4k page size */
69 tc_cst : 3, /* 0 = incoherent operations, else coherent operations */
70 tc_aid : 5, /* ITLB: width of access ids of processor (encoded!) */
71 tc_sr : 8; /* ITLB: width of space-registers (encoded) */
72};
73
74struct pdc_cache_info { /* main-PDC_CACHE-structure (caches & TLB's) */
75 /* I-cache */
76 unsigned long ic_size; /* size in bytes */
77 struct pdc_cache_cf ic_conf; /* configuration */
78 unsigned long ic_base; /* base-addr */
79 unsigned long ic_stride;
80 unsigned long ic_count;
81 unsigned long ic_loop;
82 /* D-cache */
83 unsigned long dc_size; /* size in bytes */
84 struct pdc_cache_cf dc_conf; /* configuration */
85 unsigned long dc_base; /* base-addr */
86 unsigned long dc_stride;
87 unsigned long dc_count;
88 unsigned long dc_loop;
89 /* Instruction-TLB */
90 unsigned long it_size; /* number of entries in I-TLB */
91 struct pdc_tlb_cf it_conf; /* I-TLB-configuration */
92 unsigned long it_sp_base;
93 unsigned long it_sp_stride;
94 unsigned long it_sp_count;
95 unsigned long it_off_base;
96 unsigned long it_off_stride;
97 unsigned long it_off_count;
98 unsigned long it_loop;
99 /* data-TLB */
100 unsigned long dt_size; /* number of entries in D-TLB */
101 struct pdc_tlb_cf dt_conf; /* D-TLB-configuration */
102 unsigned long dt_sp_base;
103 unsigned long dt_sp_stride;
104 unsigned long dt_sp_count;
105 unsigned long dt_off_base;
106 unsigned long dt_off_stride;
107 unsigned long dt_off_count;
108 unsigned long dt_loop;
109};
110
111#if 0
112/* If you start using the next struct, you'll have to adjust it to
113 * work with 64-bit firmware I think -PB
114 */
115struct pdc_iodc { /* PDC_IODC */
116 unsigned char hversion_model;
117 unsigned char hversion;
118 unsigned char spa;
119 unsigned char type;
120 unsigned int sversion_rev:4;
121 unsigned int sversion_model:19;
122 unsigned int sversion_opt:8;
123 unsigned char rev;
124 unsigned char dep;
125 unsigned char features;
126 unsigned char pad1;
127 unsigned int checksum:16;
128 unsigned int length:16;
129 unsigned int pad[15];
130} __attribute__((aligned(8))) ;
131#endif
132
133#ifndef CONFIG_PA20
134/* no BLTBs in pa2.0 processors */
135struct pdc_btlb_info_range {
136 __u8 res00;
137 __u8 num_i;
138 __u8 num_d;
139 __u8 num_comb;
140};
141
142struct pdc_btlb_info { /* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
143 unsigned int min_size; /* minimum size of BTLB in pages */
144 unsigned int max_size; /* maximum size of BTLB in pages */
145 struct pdc_btlb_info_range fixed_range_info;
146 struct pdc_btlb_info_range variable_range_info;
147};
148
149#endif /* !CONFIG_PA20 */
150
151struct pdc_mem_retinfo { /* PDC_MEM/PDC_MEM_MEMINFO (return info) */
152 unsigned long pdt_size;
153 unsigned long pdt_entries;
154 unsigned long pdt_status;
155 unsigned long first_dbe_loc;
156 unsigned long good_mem;
157};
158
159struct pdc_mem_read_pdt { /* PDC_MEM/PDC_MEM_READ_PDT (return info) */
160 unsigned long pdt_entries;
161};
162
163#ifdef CONFIG_64BIT
164struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */
165 unsigned long entries_returned;
166 unsigned long entries_total;
167};
168
169struct pdc_memory_table { /* PDC_MEM/PDC_MEM_TABLE (arguments) */
170 unsigned long paddr;
171 unsigned int pages;
172 unsigned int reserved;
173};
174#endif /* CONFIG_64BIT */
175
176struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */
177 unsigned long mod_addr;
178 unsigned long mod_pgs;
179 unsigned long add_addrs;
180};
181
182struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
183 unsigned long mod_addr;
184 unsigned long mod_pgs;
185};
186
187struct pdc_initiator { /* PDC_INITIATOR */
188 int host_id;
189 int factor;
190 int width;
191 int mode;
192};
193
194struct hardware_path {
195 char flags; /* see bit definitions below */
196 char bc[6]; /* Bus Converter routing info to a specific */
197 /* I/O adaptor (< 0 means none, > 63 resvd) */
198 char mod; /* fixed field of specified module */
199};
200
201/*
202 * Device path specifications used by PDC.
203 */
204struct pdc_module_path {
205 struct hardware_path path;
206 unsigned int layers[6]; /* device-specific info (ctlr #, unit # ...) */
207};
208
209#ifndef CONFIG_PA20
210/* Only used on some pre-PA2.0 boxes */
211struct pdc_memory_map { /* PDC_MEMORY_MAP */
212 unsigned long hpa; /* mod's register set address */
213 unsigned long more_pgs; /* number of additional I/O pgs */
214};
215#endif
216
217struct pdc_tod {
218 unsigned long tod_sec;
219 unsigned long tod_usec;
220};
221
222/* architected results from PDC_PIM/transfer hpmc on a PA1.1 machine */
223
224struct pdc_hpmc_pim_11 { /* PDC_PIM */
225 __u32 gr[32];
226 __u32 cr[32];
227 __u32 sr[8];
228 __u32 iasq_back;
229 __u32 iaoq_back;
230 __u32 check_type;
231 __u32 cpu_state;
232 __u32 rsvd1;
233 __u32 cache_check;
234 __u32 tlb_check;
235 __u32 bus_check;
236 __u32 assists_check;
237 __u32 rsvd2;
238 __u32 assist_state;
239 __u32 responder_addr;
240 __u32 requestor_addr;
241 __u32 path_info;
242 __u64 fr[32];
243};
244
245/*
246 * architected results from PDC_PIM/transfer hpmc on a PA2.0 machine
247 *
248 * Note that PDC_PIM doesn't care whether or not wide mode was enabled
249 * so the results are different on PA1.1 vs. PA2.0 when in narrow mode.
250 *
251 * Note also that there are unarchitected results available, which
252 * are hversion dependent. Do a "ser pim 0 hpmc" after rebooting, since
253 * the firmware is probably the best way of printing hversion dependent
254 * data.
255 */
256
257struct pdc_hpmc_pim_20 { /* PDC_PIM */
258 __u64 gr[32];
259 __u64 cr[32];
260 __u64 sr[8];
261 __u64 iasq_back;
262 __u64 iaoq_back;
263 __u32 check_type;
264 __u32 cpu_state;
265 __u32 cache_check;
266 __u32 tlb_check;
267 __u32 bus_check;
268 __u32 assists_check;
269 __u32 assist_state;
270 __u32 path_info;
271 __u64 responder_addr;
272 __u64 requestor_addr;
273 __u64 fr[32];
274};
275
276void pdc_console_init(void); /* in pdc_console.c */ 21void pdc_console_init(void); /* in pdc_console.c */
277void pdc_console_restart(void); 22void pdc_console_restart(void);
278 23
diff --git a/arch/parisc/include/uapi/asm/pdc.h b/arch/parisc/include/uapi/asm/pdc.h
index 0ad117617f1a..593eeb573138 100644
--- a/arch/parisc/include/uapi/asm/pdc.h
+++ b/arch/parisc/include/uapi/asm/pdc.h
@@ -16,6 +16,7 @@
16#define PDC_ERROR -3 /* Call could not complete without an error */ 16#define PDC_ERROR -3 /* Call could not complete without an error */
17#define PDC_NE_MOD -5 /* Module not found */ 17#define PDC_NE_MOD -5 /* Module not found */
18#define PDC_NE_CELL_MOD -7 /* Cell module not found */ 18#define PDC_NE_CELL_MOD -7 /* Cell module not found */
19#define PDC_NE_BOOTDEV -9 /* Cannot locate a console device or boot device */
19#define PDC_INVALID_ARG -10 /* Called with an invalid argument */ 20#define PDC_INVALID_ARG -10 /* Called with an invalid argument */
20#define PDC_BUS_POW_WARN -12 /* Call could not complete in allowed power budget */ 21#define PDC_BUS_POW_WARN -12 /* Call could not complete in allowed power budget */
21#define PDC_NOT_NARROW -17 /* Narrow mode not supported */ 22#define PDC_NOT_NARROW -17 /* Narrow mode not supported */
@@ -340,9 +341,6 @@
340 341
341#if !defined(__ASSEMBLY__) 342#if !defined(__ASSEMBLY__)
342 343
343#include <linux/types.h>
344
345
346/* flags of the device_path */ 344/* flags of the device_path */
347#define PF_AUTOBOOT 0x80 345#define PF_AUTOBOOT 0x80
348#define PF_AUTOSEARCH 0x40 346#define PF_AUTOSEARCH 0x40
@@ -418,9 +416,255 @@ struct zeropage {
418 int pad430[116]; 416 int pad430[116];
419 417
420 /* [0x600] processor dependent */ 418 /* [0x600] processor dependent */
421 __u32 pad600[1]; 419 unsigned int pad600[1];
422 __u32 proc_sti; /* pointer to STI ROM */ 420 unsigned int proc_sti; /* pointer to STI ROM */
423 __u32 pad608[126]; 421 unsigned int pad608[126];
422};
423
424struct pdc_chassis_info { /* for PDC_CHASSIS_INFO */
425 unsigned long actcnt; /* actual number of bytes returned */
426 unsigned long maxcnt; /* maximum number of bytes that could be returned */
427};
428
429struct pdc_coproc_cfg { /* for PDC_COPROC_CFG */
430 unsigned long ccr_functional;
431 unsigned long ccr_present;
432 unsigned long revision;
433 unsigned long model;
434};
435
436struct pdc_model { /* for PDC_MODEL */
437 unsigned long hversion;
438 unsigned long sversion;
439 unsigned long hw_id;
440 unsigned long boot_id;
441 unsigned long sw_id;
442 unsigned long sw_cap;
443 unsigned long arch_rev;
444 unsigned long pot_key;
445 unsigned long curr_key;
446};
447
448struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
449 unsigned long
450#ifdef __LP64__
451 cc_padW:32,
452#endif
453 cc_alias: 4, /* alias boundaries for virtual addresses */
454 cc_block: 4, /* to determine most efficient stride */
455 cc_line : 3, /* maximum amount written back as a result of store (multiple of 16 bytes) */
456 cc_shift: 2, /* how much to shift cc_block left */
457 cc_wt : 1, /* 0 = WT-Dcache, 1 = WB-Dcache */
458 cc_sh : 2, /* 0 = separate I/D-cache, else shared I/D-cache */
459 cc_cst : 3, /* 0 = incoherent D-cache, 1=coherent D-cache */
460 cc_pad1 : 10, /* reserved */
461 cc_hv : 3; /* hversion dependent */
462};
463
464struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */
465 unsigned long tc_pad0:12, /* reserved */
466#ifdef __LP64__
467 tc_padW:32,
468#endif
469 tc_sh : 2, /* 0 = separate I/D-TLB, else shared I/D-TLB */
470 tc_hv : 1, /* HV */
471 tc_page : 1, /* 0 = 2K page-size-machine, 1 = 4k page size */
472 tc_cst : 3, /* 0 = incoherent operations, else coherent operations */
473 tc_aid : 5, /* ITLB: width of access ids of processor (encoded!) */
474 tc_sr : 8; /* ITLB: width of space-registers (encoded) */
475};
476
477struct pdc_cache_info { /* main-PDC_CACHE-structure (caches & TLB's) */
478 /* I-cache */
479 unsigned long ic_size; /* size in bytes */
480 struct pdc_cache_cf ic_conf; /* configuration */
481 unsigned long ic_base; /* base-addr */
482 unsigned long ic_stride;
483 unsigned long ic_count;
484 unsigned long ic_loop;
485 /* D-cache */
486 unsigned long dc_size; /* size in bytes */
487 struct pdc_cache_cf dc_conf; /* configuration */
488 unsigned long dc_base; /* base-addr */
489 unsigned long dc_stride;
490 unsigned long dc_count;
491 unsigned long dc_loop;
492 /* Instruction-TLB */
493 unsigned long it_size; /* number of entries in I-TLB */
494 struct pdc_tlb_cf it_conf; /* I-TLB-configuration */
495 unsigned long it_sp_base;
496 unsigned long it_sp_stride;
497 unsigned long it_sp_count;
498 unsigned long it_off_base;
499 unsigned long it_off_stride;
500 unsigned long it_off_count;
501 unsigned long it_loop;
502 /* data-TLB */
503 unsigned long dt_size; /* number of entries in D-TLB */
504 struct pdc_tlb_cf dt_conf; /* D-TLB-configuration */
505 unsigned long dt_sp_base;
506 unsigned long dt_sp_stride;
507 unsigned long dt_sp_count;
508 unsigned long dt_off_base;
509 unsigned long dt_off_stride;
510 unsigned long dt_off_count;
511 unsigned long dt_loop;
512};
513
514/* Might need adjustment to work with 64-bit firmware */
515struct pdc_iodc { /* PDC_IODC */
516 unsigned char hversion_model;
517 unsigned char hversion;
518 unsigned char spa;
519 unsigned char type;
520 unsigned int sversion_rev:4;
521 unsigned int sversion_model:19;
522 unsigned int sversion_opt:8;
523 unsigned char rev;
524 unsigned char dep;
525 unsigned char features;
526 unsigned char pad1;
527 unsigned int checksum:16;
528 unsigned int length:16;
529 unsigned int pad[15];
530} __attribute__((aligned(8))) ;
531
532/* no BLTBs in pa2.0 processors */
533struct pdc_btlb_info_range {
534 unsigned char res00;
535 unsigned char num_i;
536 unsigned char num_d;
537 unsigned char num_comb;
538};
539
540struct pdc_btlb_info { /* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
541 unsigned int min_size; /* minimum size of BTLB in pages */
542 unsigned int max_size; /* maximum size of BTLB in pages */
543 struct pdc_btlb_info_range fixed_range_info;
544 struct pdc_btlb_info_range variable_range_info;
545};
546
547struct pdc_mem_retinfo { /* PDC_MEM/PDC_MEM_MEMINFO (return info) */
548 unsigned long pdt_size;
549 unsigned long pdt_entries;
550 unsigned long pdt_status;
551 unsigned long first_dbe_loc;
552 unsigned long good_mem;
553};
554
555struct pdc_mem_read_pdt { /* PDC_MEM/PDC_MEM_READ_PDT (return info) */
556 unsigned long pdt_entries;
557};
558
559#ifdef __LP64__
560struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */
561 unsigned long entries_returned;
562 unsigned long entries_total;
563};
564
565struct pdc_memory_table { /* PDC_MEM/PDC_MEM_TABLE (arguments) */
566 unsigned long paddr;
567 unsigned int pages;
568 unsigned int reserved;
569};
570#endif /* __LP64__ */
571
572struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */
573 unsigned long mod_addr;
574 unsigned long mod_pgs;
575 unsigned long add_addrs;
576};
577
578struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
579 unsigned long mod_addr;
580 unsigned long mod_pgs;
581};
582
583struct pdc_initiator { /* PDC_INITIATOR */
584 int host_id;
585 int factor;
586 int width;
587 int mode;
588};
589
590struct hardware_path {
591 char flags; /* see bit definitions below */
592 char bc[6]; /* Bus Converter routing info to a specific */
593 /* I/O adaptor (< 0 means none, > 63 resvd) */
594 char mod; /* fixed field of specified module */
595};
596
597/*
598 * Device path specifications used by PDC.
599 */
600struct pdc_module_path {
601 struct hardware_path path;
602 unsigned int layers[6]; /* device-specific info (ctlr #, unit # ...) */
603};
604
605/* Only used on some pre-PA2.0 boxes */
606struct pdc_memory_map { /* PDC_MEMORY_MAP */
607 unsigned long hpa; /* mod's register set address */
608 unsigned long more_pgs; /* number of additional I/O pgs */
609};
610
611struct pdc_tod {
612 unsigned long tod_sec;
613 unsigned long tod_usec;
614};
615
616/* architected results from PDC_PIM/transfer hpmc on a PA1.1 machine */
617
618struct pdc_hpmc_pim_11 { /* PDC_PIM */
619 unsigned int gr[32];
620 unsigned int cr[32];
621 unsigned int sr[8];
622 unsigned int iasq_back;
623 unsigned int iaoq_back;
624 unsigned int check_type;
625 unsigned int cpu_state;
626 unsigned int rsvd1;
627 unsigned int cache_check;
628 unsigned int tlb_check;
629 unsigned int bus_check;
630 unsigned int assists_check;
631 unsigned int rsvd2;
632 unsigned int assist_state;
633 unsigned int responder_addr;
634 unsigned int requestor_addr;
635 unsigned int path_info;
636 unsigned long long fr[32];
637};
638
639/*
640 * architected results from PDC_PIM/transfer hpmc on a PA2.0 machine
641 *
642 * Note that PDC_PIM doesn't care whether or not wide mode was enabled
643 * so the results are different on PA1.1 vs. PA2.0 when in narrow mode.
644 *
645 * Note also that there are unarchitected results available, which
646 * are hversion dependent. Do a "ser pim 0 hpmc" after rebooting, since
647 * the firmware is probably the best way of printing hversion dependent
648 * data.
649 */
650
651struct pdc_hpmc_pim_20 { /* PDC_PIM */
652 unsigned long long gr[32];
653 unsigned long long cr[32];
654 unsigned long long sr[8];
655 unsigned long long iasq_back;
656 unsigned long long iaoq_back;
657 unsigned int check_type;
658 unsigned int cpu_state;
659 unsigned int cache_check;
660 unsigned int tlb_check;
661 unsigned int bus_check;
662 unsigned int assists_check;
663 unsigned int assist_state;
664 unsigned int path_info;
665 unsigned long long responder_addr;
666 unsigned long long requestor_addr;
667 unsigned long long fr[32];
424}; 668};
425 669
426#endif /* !defined(__ASSEMBLY__) */ 670#endif /* !defined(__ASSEMBLY__) */
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-15 09:00:41 -0400