diff options
author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2018-07-20 04:50:45 -0400 |
---|---|---|
committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2018-08-28 10:14:55 -0400 |
commit | bae120f8acb2b6082c34abc1a4c1a3716febb31d (patch) | |
tree | 13a9b657cb9c9bd527071a8a86b97a6651d80fda | |
parent | 007a93891dca11dc6f62866ab0c1e25a0db6422c (diff) |
arm64: uniphier: dts: add more clocks to Denali NAND controller node
Catch up with the new binding of the Denali IP where three clocks,
"nand", "nand_x", "ecc" are required.
For UniPhier SoCs, the "nand_x" and "ecc" are tied up because they
are both 200MHz.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
-rw-r--r-- | arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 3 | ||||
-rw-r--r-- | arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 3 | ||||
-rw-r--r-- | arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 3 |
3 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi index d63b56e944de..5640daccac55 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | |||
@@ -571,7 +571,8 @@ | |||
571 | interrupts = <0 65 4>; | 571 | interrupts = <0 65 4>; |
572 | pinctrl-names = "default"; | 572 | pinctrl-names = "default"; |
573 | pinctrl-0 = <&pinctrl_nand>; | 573 | pinctrl-0 = <&pinctrl_nand>; |
574 | clocks = <&sys_clk 2>; | 574 | clock-names = "nand", "nand_x", "ecc"; |
575 | clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; | ||
575 | resets = <&sys_rst 2>; | 576 | resets = <&sys_rst 2>; |
576 | }; | 577 | }; |
577 | }; | 578 | }; |
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi index caf112629caa..6932cefb689a 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | |||
@@ -628,7 +628,8 @@ | |||
628 | interrupts = <0 65 4>; | 628 | interrupts = <0 65 4>; |
629 | pinctrl-names = "default"; | 629 | pinctrl-names = "default"; |
630 | pinctrl-0 = <&pinctrl_nand>; | 630 | pinctrl-0 = <&pinctrl_nand>; |
631 | clocks = <&sys_clk 2>; | 631 | clock-names = "nand", "nand_x", "ecc"; |
632 | clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; | ||
632 | resets = <&sys_rst 2>; | 633 | resets = <&sys_rst 2>; |
633 | }; | 634 | }; |
634 | }; | 635 | }; |
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi index 2a4cf427f5d3..fd2bcd46642b 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | |||
@@ -455,7 +455,8 @@ | |||
455 | interrupts = <0 65 4>; | 455 | interrupts = <0 65 4>; |
456 | pinctrl-names = "default"; | 456 | pinctrl-names = "default"; |
457 | pinctrl-0 = <&pinctrl_nand>; | 457 | pinctrl-0 = <&pinctrl_nand>; |
458 | clocks = <&sys_clk 2>; | 458 | clock-names = "nand", "nand_x", "ecc"; |
459 | clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; | ||
459 | resets = <&sys_rst 2>; | 460 | resets = <&sys_rst 2>; |
460 | }; | 461 | }; |
461 | }; | 462 | }; |